JPS5965490A - Manufacture of semiconductor light emitting element array - Google Patents

Manufacture of semiconductor light emitting element array

Info

Publication number
JPS5965490A
JPS5965490A JP57175160A JP17516082A JPS5965490A JP S5965490 A JPS5965490 A JP S5965490A JP 57175160 A JP57175160 A JP 57175160A JP 17516082 A JP17516082 A JP 17516082A JP S5965490 A JPS5965490 A JP S5965490A
Authority
JP
Japan
Prior art keywords
light emitting
semiconductor light
grooves
substrate
pellets
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57175160A
Other languages
Japanese (ja)
Inventor
Yojiro Kamei
洋次郎 亀井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Co Ltd
Original Assignee
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Co Ltd filed Critical Ricoh Co Ltd
Priority to JP57175160A priority Critical patent/JPS5965490A/en
Publication of JPS5965490A publication Critical patent/JPS5965490A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/27011—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature
    • H01L2224/27013—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature for holding or confining the layer connector, e.g. solder flow barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83385—Shape, e.g. interlocking features

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Led Device Packages (AREA)

Abstract

PURPOSE:To prevent a conductive adhesive from creeping etc. in case of die- bonding by a method wherein multiple grooves are provided on a substrate corresponding to the array of LED pellets. CONSTITUTION:Firstly grooves 5 are provided on the gaps of LED pellets arrayal on a substrate 3 and secondly the arrayal excluding the grooves 5 is coated with conductive adhesive 2 by screen-printing and the like to mount the LED pellets 1 thereon by pressure fixing. Thirdly the substrate 3 whereon the LED pellets are mounted is exposed to atmosphere at 150 deg.C to thermoset the conductive adhesive. Through these procedures, the conductive adhesive 2a softened to be liquefied dangles in the grooves 5 preventing it from overflowing along the sides of the LED pellets 1.

Description

【発明の詳細な説明】 〔技術分野〕 本発明は半導体発光素子アレイの製造方法に関する。[Detailed description of the invention] 〔Technical field〕 The present invention relates to a method for manufacturing a semiconductor light emitting device array.

〔従来技術〕[Prior art]

半導体発光素子として代表的な発光ダイオード（Ｌｉｇ
ｈｔ’　Ｅｍｉｔｔｉｎｇ’　Ｄｉｏｄｅ、以下ＬＦｉ
Ｄという）はペレット単体のものをマトリックヌ状に形
成してアレイとし、デイヌブレイとして使用されること
がある。ＬＥ’Ｄは、小型に製作でき、応答速度が速く
、高輝度でしかも多色表示が可能である点でディスプレ
イ装置に適しているが、アレイを構成するためにｔｉＬ
ＫＤ素子を規則的に位置精度良くしかも局密度に配置す
る必要がある。The light emitting diode (Lig) is a typical semiconductor light emitting device.
ht'Emitting' Diode, hereinafter referred to as LFi
(referred to as D) is an array formed by forming a single pellet into a matrix shape, and is sometimes used as a deine bray. LED'D is suitable for display devices because it can be manufactured in a small size, has a fast response speed, and can display high brightness and multiple colors.
It is necessary to arrange the KD elements regularly with good positional accuracy and at a local density.

このための従来技術としては例えば特開昭５６−１８４
８０に示された技術がある。こｉｔは、ＬＥＤペレット
を塔載するアルミナ等のセラミックの基板上にドライフ
ィルム等のフォトレジスト膜を貼り付け、写真技術によ
ｐＬＫＤペレットを塔載する部分にエツチングによる開
口を行い、その開口部に釧ベーヌト等の導電性接着剤を
塗布して・１．、　ＦｉＤペレット（ｉ＝上向きに固定
するダイボンディングを行い、配線後に７オトレジヌｌ
を除去することによりＬＥＤペレットを規則的に位置精
度良く配列することができるものである。As a conventional technique for this purpose, for example, Japanese Patent Application Laid-Open No. 56-184
There is a technique shown in 80. This involves pasting a photoresist film such as a dry film on a ceramic substrate such as alumina on which the LED pellets are mounted, etching an opening in the area on which the pLKD pellets are to be mounted using photographic technology, and etching the opening. 1. Apply a conductive adhesive such as Senu Beineto to the , FiD pellet (i = die bonding to fix upward, and after wiring, 7 Otoregine l
By removing the LED pellets, the LED pellets can be arranged regularly and with high positional accuracy.

ところが、この方法はＬＥＤベレット同士の間隔が広い
場合には良好な結果が得られるが、間隔が狭くなった場
合は問題が生ずる。第１図はこのような例を示した例で
あって、基板３の上にスクリーン印刷、ヌタンビング等
の方法で塗布された導電性接着剤２の上にＬＩＤベレッ
ト１を圧着して熱処理を行うことによ勺ダイボンディン
グを行った際、圧着時の圧力あるいは熱処理時の熱によ
り接着剤が軟化し、フォトレジスト族を越え、隣接する
ベレット間の隙間に接着剤が押し上げられた回り込み部
分４が生じている。このような状態では回り込んだ導電
性接着剤４により隣接するＬＥＤベレット間でのショー
ト、ＬＥＤベレット内のＰＮ接合のショートなどが発生
することがめシ、歩留りを減少させる原因となっている
にの対策としてはフォトレジストの厚さを増加させるこ
と、及び接着剤の量を減少させることが考えら詐るが、
フォトレジストの厚さについてはエツチングを行うため
に数μｍの厚さに押える必要があり、また接着剤の量は
接着強度の低下を避けるために一定量以下に減少させる
ことはできない。However, although this method provides good results when the distance between the LED pellets is wide, problems arise when the distance between the LED pellets becomes narrow. FIG. 1 shows an example of this, in which an LID pellet 1 is pressure-bonded onto a conductive adhesive 2 coated on a substrate 3 by a method such as screen printing or tamping, and heat treatment is performed. In particular, when die bonding is performed, the adhesive softens due to the pressure during compression or the heat during heat treatment, and wraparound portions 4 where the adhesive is pushed past the photoresist layer and into the gaps between adjacent pellets are formed. It is occurring. In such a state, the conductive adhesive 4 that has gone around can cause short circuits between adjacent LED pellets, short circuits in the PN junction within the LED pellets, etc., which is a cause of a decrease in yield. As a countermeasure, increasing the thickness of the photoresist and decreasing the amount of adhesive may be considered, but
The thickness of the photoresist must be kept to a few micrometers in order to perform etching, and the amount of adhesive cannot be reduced below a certain amount to avoid deterioration of adhesive strength.

〔目的〕〔the purpose〕

そこで本発明は、基板上にＬＦｆＤペレットを導電性接
着剤によりダイボンディングする際に接着剤の回り込み
等を防止し、歩留りの高い半導体発光素子アレイの製造
法を提供することを目的とする。SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a method for manufacturing a semiconductor light emitting element array with high yield by preventing the adhesive from going around when die-bonding LFfD pellets onto a substrate using a conductive adhesive.

〔実施例〕〔Example〕

以下、第２図ないし第４図を参照しながら本発明のいく
つかの実施例を説明する。Hereinafter, some embodiments of the present invention will be described with reference to FIGS. 2 to 4.

第２図は基板３のＬＥＤペレット配置部の間隙部にｒＩ
４５を設ける工程を有する実施例であって、基板３には
まずＬＥＤペレット配置部の間隙部に溝５が設けられる
。次にこの溝５を除いた基板３のＬＥＤペレット配置部
に導電性接着剤２をスクリーン印刷等により塗布し、Ｌ
ＥＤペレット１を圧着によりマウントする。次にＬＦｆ
Ｄペレットｌがマウントされた基板３を例えば１５０　
Ｃの雰囲気に置き、４′＃Ｌ性接着剤の加熱硬化を行う
。この方法によれば圧着時の圧力や加熱時の熱により軟
化流動化した導電性接着剤２９は溝５の中に垂れ下シ、
ＬＥＤペレット１の側面にまで回り込むことはない。Figure 2 shows rI in the gap between the LED pellets on the board 3.
In this embodiment, the groove 5 is first provided in the gap between the LED pellet arrangement portions of the substrate 3. Next, the conductive adhesive 2 is applied to the LED pellet arrangement portion of the substrate 3 excluding the groove 5 by screen printing, etc., and the L
Mount the ED pellet 1 by pressure bonding. Then LFf
For example, the substrate 3 on which the D pellet l is mounted is 150
The 4'#L adhesive is heated and cured in an atmosphere of C. According to this method, the conductive adhesive 29, which has been softened and fluidized by the pressure during crimping and the heat during heating, hangs down into the groove 5.
It does not go around to the side of the LED pellet 1.

第３図は、基板３のＬＦｉＤペレット配置１１部の間隙
部に２本の溝５ａおよび５ｂを設けた実施例を示す。こ
の実施例ではＬＥＤベレットｌをマウントした場合、隣
シ合った半導体発光素子ベレット１の下からはみ出した
導電性接着剤２はそれぞれ異った゛溝内に垂れ下るため
、よりショート等の発生の可能性が少ないという利点を
有する。FIG. 3 shows an embodiment in which two grooves 5a and 5b are provided in the gap of the LFiD pellet arrangement 11 of the substrate 3. In this embodiment, when the LED pellets 1 are mounted, the conductive adhesive 2 protruding from the bottom of the adjacent semiconductor light emitting device pellets 1 hangs down into different grooves, making it more likely that short circuits will occur. It has the advantage of being less sensitive.

第４図は、基板３のＩＦｊＤベレットｌの間隙部に溝５
を設け、ＬＥＤペレット１の下部にも溝６を設けた本発
明の池の実施例を示す。このようにすることにより、余
分な導電性接着剤をより多く吸収することができる。FIG. 4 shows grooves 5 in the gap between the IFjD pellets l of the substrate 3
An embodiment of the pond of the present invention is shown in which a groove 6 is also provided at the bottom of the LED pellet 1. By doing so, more excess conductive adhesive can be absorbed.

以上の実施例において、半導体基板上に設ける溝の幅、
深さなどは、塗布する導電性接着剤の量、ＬＥｉＤペレ
ットの大きさ、ＩＫＤペレット間の間隔の大きさなどか
ら適宜定めればよい。In the above embodiments, the width of the groove provided on the semiconductor substrate,
The depth and the like may be determined as appropriate based on the amount of conductive adhesive to be applied, the size of the LEiD pellets, the size of the interval between IKD pellets, etc.

〔効果〕〔effect〕

本発明にかかる半導体発光素子アレイの製造方法によれ
ば、基板上にＬＩＩＣＤペレットの配置位置に対応した
複数の溝を設けることにより、ダイボンディングの際に
軟化し流動化した余分な導電性接着剤を吸収し、ＬＥＤ
ペレット間の間隙への導電性接着剤の回り込みを防止す
ることができるので、導電１性接着剤がＬＥＤベレット
間に存在することによるベレット同士のショート、ＬＩ
ＩＸＤペレット上に存在することによるＰＮ接合のショ
ートなどの発生を防止し、歩留りの向上、信頼性の向上
などを図ることができる。According to the method for manufacturing a semiconductor light emitting device array according to the present invention, by providing a plurality of grooves on the substrate corresponding to the placement positions of the LIICD pellets, excess conductive adhesive that is softened and fluidized during die bonding can be removed. absorbs and LED
Since it is possible to prevent the conductive adhesive from entering the gap between the pellets, it is possible to prevent short circuits between the pellets due to the presence of the conductive adhesive between the LED pellets.
It is possible to prevent the occurrence of short circuits in PN junctions due to the presence on the IXD pellets, thereby improving yield and reliability.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は従来の半導体発光素子アレイの製造方法を示す
断面図、第２図は本発明にかかる半導体発光素子アレイ
の製造方法の一実施例を示す断面図、第３図および第４
図は本発明にかかる半導体発光素子プレイの製造方法の
池の実施例を示す断面図である。 ｌ・・・半導体発光素子ペレット、２・・・導電性接着
剤、３・・・基板、４・・・回夛込み部分、５．５ａ、
５ｂ、６・・・溝。 出願人代理人　　猪　股　　　清FIG. 1 is a sectional view showing a conventional method for manufacturing a semiconductor light emitting device array, FIG. 2 is a sectional view showing an embodiment of the method for manufacturing a semiconductor light emitting device array according to the present invention, and FIGS.
The figure is a cross-sectional view showing an embodiment of the method of manufacturing a semiconductor light emitting device play according to the present invention. l...Semiconductor light emitting element pellet, 2...Conductive adhesive, 3...Substrate, 4...Recirculation part, 5.5a,
5b, 6... Groove. Applicant's agent Kiyoshi Inomata

Claims (1)

【特許請求の範囲】 １、基板上に熱硬化性の導電性接着剤を所定の場所に塗
布した後複数の半導体発光素子ペレットを規則的に配置
しダイボンディングを行う半導体発光素子プレイの製造
方法に８いて、前記基板上に前記半導体発光素子ペレッ
トの配置位置に対応した複数の溝を設ける工程と、前記
溝を除いた前記基板上に前記導電性接着剤を塗布する工
程と、 前記半導体発光素子ペレットを所定位置にマウントする
工程と、 加熱により接着剤を硬化きせる工程を有する半導体発光
素子アレイの製造方法。 ２、複数の溝を設ける工程が、基板の半導体発光素子ペ
レット配置部の間隙部に溝を設けるものである特許請求
の範囲第１項記載の半導体発光素子アレイの製造方法。 ３、半導体発光素子ベレット配置部の間隙部に設ける溝
が複数である特許請求の範囲第２項記載の半導体発光素
子アレイの製造方法。 先祖数の溝を設ける工程が、基板の半導体発光素子ベレ
ット配置部および間隙部にそれぞれ溝を設けるものであ
る特許請求の範囲第１項記載の半導体発光素子アレイの
製造方法。[Claims] 1. A method for manufacturing a semiconductor light emitting device play, in which a thermosetting conductive adhesive is applied to a predetermined location on a substrate, and then a plurality of semiconductor light emitting device pellets are regularly arranged and die bonding is performed. (8) providing a plurality of grooves on the substrate corresponding to the arrangement positions of the semiconductor light emitting element pellets; and applying the conductive adhesive on the substrate excluding the grooves; A method for manufacturing a semiconductor light emitting element array, comprising: mounting an element pellet in a predetermined position; and curing an adhesive by heating. 2. The method of manufacturing a semiconductor light emitting device array according to claim 1, wherein the step of providing a plurality of grooves is to provide grooves in the gaps between the semiconductor light emitting device pellet arrangement portions of the substrate. 3. The method of manufacturing a semiconductor light emitting element array according to claim 2, wherein a plurality of grooves are provided in the gap between the semiconductor light emitting element pellet arrangement parts. 2. The method of manufacturing a semiconductor light emitting device array according to claim 1, wherein the step of providing grooves in the number of ancestors is to provide grooves in the semiconductor light emitting device pellet arrangement portion and the gap portion of the substrate, respectively.
JP57175160A 1982-10-05 1982-10-05 Manufacture of semiconductor light emitting element array Pending JPS5965490A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57175160A JPS5965490A (en) 1982-10-05 1982-10-05 Manufacture of semiconductor light emitting element array

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57175160A JPS5965490A (en) 1982-10-05 1982-10-05 Manufacture of semiconductor light emitting element array

Publications (1)

Publication Number Publication Date
JPS5965490A true JPS5965490A (en) 1984-04-13

Family

ID=15991308

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57175160A Pending JPS5965490A (en) 1982-10-05 1982-10-05 Manufacture of semiconductor light emitting element array

Country Status (1)

Country Link
JP (1) JPS5965490A (en)

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5066599A (en) * 1989-07-27 1991-11-19 Fujitsu Limited Silicon crystal oxygen evaluation method using fourier transform infrared spectroscopy (ftir) and semiconductor device fabrication method using the same
US5102824A (en) * 1990-11-05 1992-04-07 California Institute Of Technology Method of manufacturing a distributed light emitting diode flat-screen display for use in televisions
WO2009028612A1 (en) * 2007-08-28 2009-03-05 Panasonic Electric Works Co., Ltd. Light emitting device
JP2009054896A (en) * 2007-08-28 2009-03-12 Panasonic Electric Works Co Ltd Light emitting device
JP2009054897A (en) * 2007-08-28 2009-03-12 Panasonic Electric Works Co Ltd Light emitting device
JP2010171289A (en) * 2009-01-26 2010-08-05 Oki Data Corp Image display apparatus
JP2015500562A (en) * 2011-11-18 2015-01-05 ルクスビュー テクノロジー コーポレイション Micro light emitting diode
US20150295154A1 (en) * 2005-02-03 2015-10-15 Epistar Corporation Light emitting device and manufacturing method thereof
US9463613B2 (en) 2011-11-18 2016-10-11 Apple Inc. Micro device transfer head heater assembly and method of transferring a micro device
US9620478B2 (en) 2011-11-18 2017-04-11 Apple Inc. Method of fabricating a micro device transfer head
US9831383B2 (en) 2011-11-18 2017-11-28 Apple Inc. LED array

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5066599A (en) * 1989-07-27 1991-11-19 Fujitsu Limited Silicon crystal oxygen evaluation method using fourier transform infrared spectroscopy (ftir) and semiconductor device fabrication method using the same
US5102824A (en) * 1990-11-05 1992-04-07 California Institute Of Technology Method of manufacturing a distributed light emitting diode flat-screen display for use in televisions
US10978615B2 (en) 2005-02-03 2021-04-13 Epistar Corporation Plurality of light emitting devices having opaque insulating layer between them
US20150295154A1 (en) * 2005-02-03 2015-10-15 Epistar Corporation Light emitting device and manufacturing method thereof
US8664674B2 (en) 2007-08-28 2014-03-04 Panasonic Corporation Light emitting diode device preventing short circuiting between adjacent light emitting diode chips
EP2197045A1 (en) * 2007-08-28 2010-06-16 Panasonic Electric Works Co., Ltd Light emitting device
EP2197045A4 (en) * 2007-08-28 2013-05-29 Panasonic Corp Light emitting device
JP2009054897A (en) * 2007-08-28 2009-03-12 Panasonic Electric Works Co Ltd Light emitting device
WO2009028612A1 (en) * 2007-08-28 2009-03-05 Panasonic Electric Works Co., Ltd. Light emitting device
JP2009054896A (en) * 2007-08-28 2009-03-12 Panasonic Electric Works Co Ltd Light emitting device
JP2010171289A (en) * 2009-01-26 2010-08-05 Oki Data Corp Image display apparatus
US9463613B2 (en) 2011-11-18 2016-10-11 Apple Inc. Micro device transfer head heater assembly and method of transferring a micro device
US9620478B2 (en) 2011-11-18 2017-04-11 Apple Inc. Method of fabricating a micro device transfer head
US9831383B2 (en) 2011-11-18 2017-11-28 Apple Inc. LED array
US10121864B2 (en) 2011-11-18 2018-11-06 Apple Inc. Micro device transfer head heater assembly and method of transferring a micro device
US10297712B2 (en) 2011-11-18 2019-05-21 Apple Inc. Micro LED display
US10607961B2 (en) 2011-11-18 2020-03-31 Apple Inc. Micro device transfer head heater assembly and method of transferring a micro device
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US11552046B2 (en) 2011-11-18 2023-01-10 Apple Inc. Micro device transfer head assembly

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