JPS5912670A - Facsimile device - Google Patents

Facsimile device

Info

Publication number
JPS5912670A
JPS5912670A JP12170582A JP12170582A JPS5912670A JP S5912670 A JPS5912670 A JP S5912670A JP 12170582 A JP12170582 A JP 12170582A JP 12170582 A JP12170582 A JP 12170582A JP S5912670 A JPS5912670 A JP S5912670A
Authority
JP
Japan
Prior art keywords
transmission
memory
picture signal
image signal
speed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12170582A
Other languages
Japanese (ja)
Inventor
Masao Kakeya
掛谷 昌男
Kazunori Kimura
和紀 木村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP12170582A priority Critical patent/JPS5912670A/en
Publication of JPS5912670A publication Critical patent/JPS5912670A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/32Circuits or arrangements for control or supervision between transmitter and receiver or between image input and image output device, e.g. between a still-image camera and its memory or between a still-image camera and a printer device

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Storing Facsimile Image Data (AREA)
  • Facsimile Transmission Control (AREA)

Abstract

PURPOSE:To eliminate the need for a speed converting memory such as RAM, to simplify the circuit constitution, and to control the transmission speed of a picture signal, by using a shift register mounted on a reception recording head in common for a picture signal holding memory at the transmission of a picture signal. CONSTITUTION:A transmission picture signal Stp outputted from a CCD unit 11 and a receiving picture signal Srp from a modulation and demodulation circuit 14 are selected at a selector 12 and applied to a shift register 15 mounted on a thermal head through the transmission or receiving by a selection signal Ss from a control section 16. The register 15 is used in common as a memory of picture signal holding at the transmission of picture signal, a shift clock Cs is applied from the control section 16 to the register 15, a picture signal for one line's share is written in the register 15 in order and the outputted picture signal Stp is applied to a mixing circuit 13. Further, the clock Cs is made coincident with the picture signal transfer speed of the CCD 11, the speed conversion memory such as RAM is eliminated for the need and the circuit constitution is simplified.

Description

【発明の詳細な説明】 (1)  発明の属する技術分野の説明本発明は、ファ
クシミリ装置に関し、特に、送受兼用型のファクシミリ
装置における送信画信号画信号の読み取り部にCCDイ
メージセンサを、また記録部にサーマルヘッドを利用し
た送受兼用型の従来のファクシミ’)装置の画信号の送
信、受信部の機能構成を框1図に示す、第1図において
、1はCCDイメージセンサ、アンプ、A/D変換部等
を含むCCDユニットである。2は送信画信号Sep。
DETAILED DESCRIPTION OF THE INVENTION (1) Description of the technical field to which the invention pertains The present invention relates to a facsimile device, and in particular, to a facsimile device that can be used for both sending and receiving purposes. Figure 1 shows the functional configuration of the image signal transmitting and receiving part of a conventional facsimile machine that uses a thermal head for both sending and receiving functions. This is a CCD unit that includes a D converter and the like. 2 is a transmission image signal Sep.

受信画信号srpを一時的に保持するメモリであシ、3
はファクシミリ伝送手順のpAasgBにおいて位相信
号SPAを変復調回路に送出し、また、pAasgCに
おいて画信号に位相信号を挿入する為の混合回路である
。4は回線へ送出する信号の変調部及び回線から受信す
る信号の復調部から成る変復調回路である。5はサーマ
ルヘッドに搭載される受信画像情報保持用のシフトレジ
スタであシ、6は回語全体の制御をする制御部である。
A memory for temporarily holding the received image signal srp, 3
is a mixing circuit for sending the phase signal SPA to the modulation/demodulation circuit in pAasgB of the facsimile transmission procedure, and for inserting the phase signal into the image signal in pAasgC. Reference numeral 4 denotes a modulation/demodulation circuit consisting of a modulation section for signals sent to the line and a demodulation section for signals received from the line. 5 is a shift register mounted on the thermal head for holding received image information, and 6 is a control unit that controls the entire diversion.

一般にこのような構成のファクシミリ装置において、C
CDによυ読み取った画信号stpを1ビツトずつ回線
へ送出する場合、CCDから読み出される画信号Sep
の速度は回線への転送速度に比して高速である。そこで
、CCDユニット1から読み出される画信号Stpをメ
モリ2に一時的に保持し、該メモリから回線への転送速
度に合わせて画信号を読み出すことによって速度変換を
行なっている。
Generally, in a facsimile machine with such a configuration, C
When the image signal stp read by the CD is sent to the line one bit at a time, the image signal Sep read from the CCD
The speed is faster than the transfer speed to the line. Therefore, the image signal Stp read out from the CCD unit 1 is temporarily held in the memory 2, and speed conversion is performed by reading out the image signal from the memory in accordance with the transfer speed to the line.

このように従来の方式では画信号の送出速度制御のため
に最低1ライン分の画信号を記憶可能なRAM等の付加
回路を必要とするという欠点を有していた。
As described above, the conventional system has the drawback of requiring an additional circuit such as a RAM capable of storing at least one line of image signals in order to control the sending speed of the image signals.

(3)  発明の詳細な説明 本発明は従来の上記欠点を除去する為になされたもので
あシ、従って本発明の目的は、前記RAM等の付加回路
を排除し、簡単な回路構成で画信号送出速度制御部を実
現することができる新規なファクシミリ装置を提供する
ことにある。
(3) Detailed Description of the Invention The present invention has been made to eliminate the above-mentioned drawbacks of the conventional technology. Therefore, an object of the present invention is to eliminate the additional circuits such as the RAM, and to realize an image display with a simple circuit configuration. An object of the present invention is to provide a new facsimile machine that can realize a signal transmission speed control section.

(4)  発明の構成 上記目的を達成する為に、本発明に係るファクタはす装
置は、受信記録ヘッドに搭載される記録画像情報保持用
のメモリを有するファクシミリ装置において、CCDユ
ニットから出力される送信画信号と変復調回路から出力
される受信画信号のいずれかを選択するセレクタと、該
セレクタの出力が送信画信号のときには該送信画信号を
前記CCDユニットの画信号転送速度に一致させた第1
のクロックで前記メモリに転送し且つ回線の画信号送出
速度に一致させた第2のクロックで前記メモリから前記
送信画信号を前配回線へ送出し、前記セレクタの出力が
受信信号のときには該受信信号を前記fM2のクロック
で前記メモリに転送する手段とを具備し、前記メモリを
送信時に送信画像情報保持用メモリとして使用し、送信
、受信の画像情報保持用メモリを兼用している。
(4) Structure of the Invention In order to achieve the above object, a factor hash device according to the present invention is provided in a facsimile machine having a memory for holding recorded image information mounted on a receiving recording head. a selector for selecting either the transmitted image signal or the received image signal output from the modulation/demodulation circuit; and a selector for making the transmitted image signal match the image signal transfer rate of the CCD unit when the output of the selector is the transmitted image signal. 1
The transmission image signal is transferred to the memory at a clock of and means for transferring a signal to the memory using the fM2 clock, and the memory is used as a memory for holding transmission image information during transmission, and is also used as a memory for holding image information for transmission and reception.

(5)  発明の詳細な説明 次に本発明をその好ましい一実施例について第2図及び
第3図を参照しながら具体的に説明する。
(5) Detailed Description of the Invention Next, a preferred embodiment of the present invention will be specifically described with reference to FIGS. 2 and 3.

@2図は本発明の一実施例を示すブロック構成図である
。第2図において、参照番号11.13.14゜15.
1〜まそれぞれ第1図の参照番号1.3.4.5.6に
相当するCCDユニット、混合回路、変復調回路、サー
マルヘッドのシフトレジスタ、制御部をそれぞれ示す。
@2 Figure is a block configuration diagram showing an embodiment of the present invention. In FIG. 2, reference numbers 11.13.14°15.
1 to 1 respectively show a CCD unit, a mixing circuit, a modulation/demodulation circuit, a shift register of a thermal head, and a control section corresponding to reference numbers 1, 3, 4, 5, and 6 in FIG.

12のセレクタはシフトレジスタ15ヘシフト入力する
データを送信/受信によってセレクト信号S8により切
換えるためのものである。
The 12 selectors are used to switch data to be shifted into the shift register 15 by transmission/reception using a select signal S8.

この上うな構成により、シフトレジスタ15は前述のよ
うに送信画信号Stpの送出速度制御用メモリとしても
利用することができる。即ち、送信時には、CCDユニ
ット11より読み出される2値化画4%号は、CCDの
画信号転送速度でサーマルヘッドのシフトレジスタ15
へ1ライン分ずつ画信号の第1ビツト目から順次シフト
入力される。この画信号5tj)のシフトレジスタ15
への転送はCCDQ画信号転送速度にシフトレジスタ1
5のシフトクロックC8の周期を一致させることによシ
簡単に実現される。この転送はファクシミリ伝送手順p
AaagCのへγ相区間中に有力われる。位相区間が終
了すると、シフトレジスタ15のシフトクロックC8の
周期を回線への画信号の送出速度に一致させることによ
シフトレジスタ15から回線へ画信号の第1ビツト目か
ら順次1ピツトずつ送出される。
With this configuration, the shift register 15 can also be used as a memory for controlling the transmission speed of the transmission image signal Stp, as described above. That is, at the time of transmission, the 4% binary image read out from the CCD unit 11 is transferred to the shift register 15 of the thermal head at the image signal transfer rate of the CCD.
The image signal is sequentially shifted and input one line at a time, starting from the first bit. This image signal 5tj) shift register 15
Transfer to shift register 1 at CCDQ image signal transfer rate
This can be easily realized by matching the periods of the shift clocks C8 of No. 5. This transfer is a facsimile transmission procedure p.
It is dominant during the γ-phase interval of AaagC. When the phase period ends, by matching the period of the shift clock C8 of the shift register 15 with the transmission speed of the image signal to the line, the shift register 15 sends out the image signal one pit at a time to the line, starting from the first bit. Ru.

画信号の受信時にもやは9、シフトレジスタ15のシフ
トクロックの周期を回線から送られ1くる画信号Srp
の速度に一致させることによシ、画信号Srpはシフト
レジスタ15へ1ピツトずつシフト入力され、1ライン
分の転送が終了すると印字が開始される。
When the image signal is received, the image signal Srp is 9, and the cycle of the shift clock of the shift register 15 is sent from the line to 1.
The image signal Srp is shifted into the shift register 15 one pit at a time, and printing is started when the transfer of one line is completed.

第3図は第2図の構成から成る装置間で通信した場合の
送信側及び受信側のphaseCにおけるタイミングチ
ャートを示したものである。(a)が送信側、(b)が
それに対する受信側のタイミングチャートである。送信
位相S’pA及び受信位相S”phのHレベルが位相区
間を示しており、08′は送信側のサーマルヘッドのシ
フトレジスタへ供給されるシフトクロックであシ、C8
″は受信側のサーマルヘッドのシフトレジス=りへ供給
されるシフトクロックである0図では主走査方向1ライ
ン分の画素数をn(固とし、1ft61のシフトパルス
で1 rlk素がシフトされる。
FIG. 3 shows a timing chart in phase C on the transmitting side and the receiving side when communicating between the devices having the configuration shown in FIG. 2. (a) is a timing chart of the transmitting side, and (b) is a timing chart of the receiving side. The H level of the transmission phase S'pA and the reception phase S''ph indicates the phase interval, and 08' is the shift clock supplied to the shift register of the thermal head on the transmission side, and C8
'' is a shift clock supplied to the shift register of the thermal head on the receiving side. In the figure, the number of pixels for one line in the main scanning direction is fixed to n (1 rlk pixel is shifted by a shift pulse of 1 ft61).

送信側では、位相区間中にシフトクロック# C/s1
のような高速のシフトパルスでCCDユニット11から
シフトレジスタ15へ転送された%個の画信号が回線へ
の送出速度に合わせたシフトクロックnc’ssのよう
な低速のシフトパルスによって、シフトレジスタ15か
ら回線へ1ビツトずつ送出される。
On the transmitting side, during the phase interval the shift clock #C/s1
% image signals transferred from the CCD unit 11 to the shift register 15 using a high-speed shift pulse such as is sent out one bit at a time to the line.

一方、受信側では、変復調回路14の2値化復調出力の
りら有効部分(復調出力のうち位相部分を除いたもの)
が1ライン分ずつシフトクロック群σ’&3によってシ
フトレジスタ15ヘシフト入力される。この場合、シフ
トクロック群Cl1l+3の周期はシフトクロックp 
C’82の周期に等しい。1ライン分のシフト入力が終
了すると、シフトレジスタ上のデータはランチされて保
持され、次ラインの画信号をシフトレジスタへシフト入
力しながら同時に印字が実行される。
On the other hand, on the receiving side, the effective part of the binary demodulated output of the modulation/demodulation circuit 14 (the demodulated output excluding the phase part)
is shifted into the shift register 15 one line at a time by the shift clock group σ'&3. In this case, the period of the shift clock group Cl1l+3 is the shift clock p
It is equal to the period of C'82. When the shift input for one line is completed, the data on the shift register is launched and held, and printing is executed simultaneously while the image signal of the next line is shifted and input to the shift register.

(5)  発明の詳細な説明 以上のように、受信記録ヘッドに搭載されるシフトレジ
スタを画信号送出時の画信号保持用メモリとして兼用す
ることにより、従来の回路に比してRAM等の速度変換
用のメモリは不要となp1回路構成は簡単になる。また
、シフトレジスタのシフトクロックの周期を制御するだ
けで両信号の送出速度制御が可能となるので、制御部の
構成も簡単になるという効果がある。
(5) Detailed Description of the Invention As described above, by using the shift register mounted on the receiving recording head as a memory for holding image signals when transmitting image signals, the speed of RAM etc. can be increased compared to conventional circuits. No memory for conversion is required, and the p1 circuit configuration becomes simple. Furthermore, since the sending speeds of both signals can be controlled simply by controlling the cycle of the shift clock of the shift register, the configuration of the control section can also be simplified.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は画信号読み取υ部にCCDイメージセンサを、
記録部にサーマルヘッドを利用した従来の送受兼用型の
ファクシミリ装置の機能構成図、第2図は本発明の一実
施例を示すブロック構成図、第3図は第2図の実施例に
基づく送信側及び受信側のシフトクロックのタイミング
チャートである。 1 、11.、、CCDユニット、200.メモリ、3
.13.、。 混合回路、4.14.、、変復調回路、5.15.、、
サーマルヘッドのシフトレジスタ、6.16.、、制御
部、5ep00.送信画信号、Sr7ノ01.受信画信
号、871h、、、位相信号、S’ph、、、送信位相
、S″ph、、、受信位相、SL−*セレクト信号、C
m、、、シフトクロック、C′8e**送信側のサーマ
ルヘッドに供給されるシフトクロック、C”L+e受信
側のサーマルヘッドに供給されるシフトクロック、3.
2.、、セ1/クタ 特許出願人   日本電気株式会社 代 理 人    弁理士 熊 谷 雄太部%府庁長官
 若 杉 和 夫 殿 1 事件の表示 昭和57年特杵願第121705号 2 発明の名称 ファクシミリ装置u 3 補正をする者 事件との関係   特許出願人 住 R丁 東京都港区芝五丁目33番1号名 称 (4
23)日本′亀気株式会社代表者 社艮 関 本 忠 
弘 4  代  理  人 住 所 神奈川県座間市栗yA2215−22711a
谷特許事務所 1、本願明細書第7頁第19行1(5)発明の詳細な説
明」とあるを[(6)  発明の効果の説[す月と訂正
する。
Figure 1 shows a CCD image sensor in the image signal reading section.
A functional configuration diagram of a conventional sending/receiving type facsimile machine that uses a thermal head in the recording section. Fig. 2 is a block diagram showing an embodiment of the present invention. Fig. 3 is a transmission diagram based on the embodiment of Fig. 2. FIG. 4 is a timing chart of shift clocks on the receiving side and the receiving side. FIG. 1, 11. , , CCD unit, 200. memory, 3
.. 13. ,. Mixed circuit, 4.14. ,,modulation/demodulation circuit, 5.15. ,,
Thermal head shift register, 6.16. ,,control unit,5ep00. Transmission image signal, Sr7no01. Received image signal, 871h, , Phase signal, S'ph, , Transmission phase, S″ph, , Reception phase, SL-*Select signal, C
m, , Shift clock, C'8e** Shift clock supplied to the thermal head on the transmitting side, C"L+e Shift clock supplied to the thermal head on the receiving side, 3.
2. ,, Kuta Patent Applicant NEC Co., Ltd. Agent Patent Attorney Yutabe Kumagai% Chief Cabinet Secretary Kazuo Wakasugi Tono 1 Indication of Case 1981 Special Request No. 121705 2 Name of Invention Facsimile Machine u 3 Relationship with the case of the person making the amendment Patent Applicant Residence R-Chome 5-33-1 Shiba, Minato-ku, Tokyo Name (4)
23) Tadashi Sekimoto, Representative of Nippon'Kameki Co., Ltd.
Hiro 4th Osamu Address KuriyA2215-22711a, Zama City, Kanagawa Prefecture
Tani Patent Office 1, page 7 of the specification, line 19, 1 (5) Detailed explanation of the invention is corrected to ``(6) Theory of the effects of the invention.

Claims (1)

【特許請求の範囲】[Claims] 受信記録ヘッドに搭載される記録画像情報保持用のメモ
リを有するファクシミリ装置において、CCDユニット
から出力される送信画信号と変復調回路から出力される
受信画信号のいずれかを選択するセレクタと、該セレク
タの出力が送信画信号のときには該送信画信号を前記C
CDユニットの画信号転送速度に一致させた第1のクロ
ックで前記メモリに転送し且つ回線の画信号送出速度に
一致させた第2のクロックで前記メモリから前記送信画
信号を前記回線へ送出し、前記セレクタの出力が受信信
号のときにL該受倍信号を前記第2のクロックで前記メ
モリに転送する手段とを具備し、1iiJ記メモリを送
信時に送信画像情報保持用メモリとして使用することに
よシ送信、受信の画像情報保持用メモリを兼用すること
を特徴としたファクシミリ装置。
In a facsimile machine having a memory for holding recorded image information mounted on a reception recording head, a selector for selecting either a transmission image signal output from a CCD unit or a reception image signal output from a modulation/demodulation circuit; When the output of C is a transmission image signal, the transmission image signal is
Transferring the image signal to the memory using a first clock that matches the image signal transfer speed of the CD unit, and sending the image signal from the memory to the line using a second clock that matches the image signal sending speed of the line. , means for transferring the multiplied signal to the memory using the second clock when the output of the selector is a received signal, and 1iiJ memory is used as a memory for holding transmission image information at the time of transmission. A facsimile device that is characterized in that it doubles as a memory for holding image information for transmission and reception.
JP12170582A 1982-07-12 1982-07-12 Facsimile device Pending JPS5912670A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12170582A JPS5912670A (en) 1982-07-12 1982-07-12 Facsimile device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12170582A JPS5912670A (en) 1982-07-12 1982-07-12 Facsimile device

Publications (1)

Publication Number Publication Date
JPS5912670A true JPS5912670A (en) 1984-01-23

Family

ID=14817837

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12170582A Pending JPS5912670A (en) 1982-07-12 1982-07-12 Facsimile device

Country Status (1)

Country Link
JP (1) JPS5912670A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6072476A (en) * 1983-09-29 1985-04-24 Fujitsu Ltd Facsimile transmitter and receiver
US7157539B2 (en) 2002-04-26 2007-01-02 Canon Kabushiki Kaisha Polymerizable compound, polymer compound and block polymer compound, and composition, image-forming method and image-forming apparatus using the same

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5124114A (en) * 1974-07-30 1976-02-26 Sharp Kk
JPS5475210A (en) * 1977-11-29 1979-06-15 Toshiba Corp Facsimile unit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5124114A (en) * 1974-07-30 1976-02-26 Sharp Kk
JPS5475210A (en) * 1977-11-29 1979-06-15 Toshiba Corp Facsimile unit

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6072476A (en) * 1983-09-29 1985-04-24 Fujitsu Ltd Facsimile transmitter and receiver
JPH0546140B2 (en) * 1983-09-29 1993-07-13 Fujitsu Ltd
US7157539B2 (en) 2002-04-26 2007-01-02 Canon Kabushiki Kaisha Polymerizable compound, polymer compound and block polymer compound, and composition, image-forming method and image-forming apparatus using the same
US7491780B2 (en) 2002-04-26 2009-02-17 Canon Kabushiki Kaisha Polymerizable compound, polymer compound and block polymer compound, and composition, image-forming method and image-forming apparatus using the same

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