JPS58103122A - Manufacture of compound semiconductor device - Google Patents
Manufacture of compound semiconductor deviceInfo
- Publication number
- JPS58103122A JPS58103122A JP20214081A JP20214081A JPS58103122A JP S58103122 A JPS58103122 A JP S58103122A JP 20214081 A JP20214081 A JP 20214081A JP 20214081 A JP20214081 A JP 20214081A JP S58103122 A JPS58103122 A JP S58103122A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- compound semiconductor
- protective film
- annealing process
- iron
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 13
- 150000001875 compounds Chemical class 0.000 title claims abstract description 10
- 238000004519 manufacturing process Methods 0.000 title claims description 4
- 238000000034 method Methods 0.000 claims abstract description 12
- 238000000137 annealing Methods 0.000 claims abstract description 10
- 239000000758 substrate Substances 0.000 claims abstract 3
- 239000004020 conductor Substances 0.000 claims description 4
- 238000010438 heat treatment Methods 0.000 claims description 2
- SBEQWOXEGHQIMW-UHFFFAOYSA-N silicon Chemical compound [Si].[Si] SBEQWOXEGHQIMW-UHFFFAOYSA-N 0.000 claims 1
- 229910052710 silicon Inorganic materials 0.000 claims 1
- 239000010703 silicon Substances 0.000 claims 1
- 230000001681 protective effect Effects 0.000 abstract description 8
- 238000009792 diffusion process Methods 0.000 abstract description 5
- 230000006866 deterioration Effects 0.000 abstract description 3
- 238000004544 sputter deposition Methods 0.000 abstract description 3
- 238000000354 decomposition reaction Methods 0.000 abstract description 2
- 230000002542 deteriorative effect Effects 0.000 abstract description 2
- 238000010494 dissociation reaction Methods 0.000 abstract description 2
- 230000005593 dissociations Effects 0.000 abstract description 2
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 abstract 6
- 229910052742 iron Inorganic materials 0.000 abstract 3
- 230000003213 activating effect Effects 0.000 abstract 1
- 238000005229 chemical vapour deposition Methods 0.000 abstract 1
- 238000002513 implantation Methods 0.000 abstract 1
- 230000003647 oxidation Effects 0.000 abstract 1
- 238000007254 oxidation reaction Methods 0.000 abstract 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 230000001590 oxidative effect Effects 0.000 description 2
- 239000012535 impurity Substances 0.000 description 1
- 229910017464 nitrogen compound Inorganic materials 0.000 description 1
- 150000002830 nitrogen compounds Chemical class 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
- H01L21/3245—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering of AIIIBV compounds
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Formation Of Insulating Films (AREA)
Abstract
Description
【発明の詳細な説明】 本発明は化合物半導体装置の製造方法に関する。[Detailed description of the invention] The present invention relates to a method for manufacturing a compound semiconductor device.
化合物半導体を用いた半導体装置の製造方法にとって、
イオン注入技術は不純物活性領域を作成する上で極めて
重要な技術である。しかるにイオン注入層を活性層にす
る工程に必要なアニール処理は比較的高温、（５００℃
〜 ）の熱処理を必要とし、その結果化合物半導体の
分解等による劣化という問題があった。そのためアニー
ル工程における化合物半導体の表面保護は重要な課題と
なっているが、末だ十分な解決はなされていない。For the manufacturing method of semiconductor devices using compound semiconductors,
Ion implantation technology is an extremely important technology for creating impurity active regions. However, the annealing process required to turn the ion-implanted layer into an active layer is performed at a relatively high temperature (500°C).
~) heat treatment is required, resulting in the problem of deterioration due to decomposition of the compound semiconductor. Therefore, protecting the surface of compound semiconductors during the annealing process has become an important issue, but a satisfactory solution has not yet been achieved.
本発明の目的は化合物半導体、特にＧａＡｓ系牛導体へ
のイオン注入のアニール工程に用いて、良好な結果が得
られる保護膜の形成方法を提供することにある。SUMMARY OF THE INVENTION An object of the present invention is to provide a method for forming a protective film that can be used in an annealing process for ion implantation into a compound semiconductor, particularly a GaAs-based conductor, and which can provide good results.
以下、本発明の実施例について説明する。Examples of the present invention will be described below.
従来、保護膜としては旧の酸化物や窒素化合物等が用い
られている。特に、酸化物はＧａの拡散係数が大きい九
めＧＪＩＡＩ系牛導体の表面から０１が解離し、表面が
劣化する欠点がある。−万、窒化物はＣＶＤ、スパッタ
等の方法により形成している丸め、ピンホールやクラッ
ク等が多く保護膜としては不適歯であるとともに、ＡＩ
が解離しやすい欠点がある。Conventionally, conventional oxides, nitrogen compounds, and the like have been used as protective films. In particular, oxides have the disadvantage that 01 dissociates from the surface of the GJIAI conductor, which has a large Ga diffusion coefficient, resulting in surface deterioration. - Nitride has many roundings, pinholes, cracks, etc. formed by methods such as CVD and sputtering, making it unsuitable as a protective film.
It has the disadvantage that it is easy to dissociate.
本発明はかかる欠点を克服するものである。すなわち、
保護膜としてスパッタやＣＶＤ法で形成した８４層を用
いるものである。Ｓｉ層は旧の酸化物層に比較し、Ｇａ
の拡散係数は数分の１と′小さく、またＡｓの拡散係数
は更に無視しうる程に小さい、しかも、アニール工程を
加圧され九酸化性雰囲気で行なう事によｐイオン注入層
を活性化させるためのアニール工程と同時に、Ｓム層を
表面から酸化せしめ絶縁性保護膜とする事が可能である
。この時Ｓム層は体積膨張をおこすので、ピンホールや
クラックを排除することもできる。The present invention overcomes these drawbacks. That is,
As a protective film, 84 layers formed by sputtering or CVD are used. Compared to the old oxide layer, the Si layer
The diffusion coefficient of As is only a few times smaller, and the diffusion coefficient of As is even more negligible.Furthermore, the p-ion implanted layer is activated by performing the annealing process in a pressurized non-oxidizing atmosphere. Simultaneously with the annealing step for the purpose of oxidizing the SM layer from the surface, it is possible to form an insulating protective film. At this time, since the SM layer undergoes volumetric expansion, pinholes and cracks can also be eliminated.
その結果ＡｓおよびＧｉの解離を最小限に留める事も可
能で、ＧａＡｓ系牛導体の表面を劣化せしめる事なくイ
オン注入層のアニールが可能となる。As a result, the dissociation of As and Gi can be kept to a minimum, and the ion-implanted layer can be annealed without deteriorating the surface of the GaAs conductor.
Claims (1)
を形成する工程と、しかる後熱処理によシ化曾物牛導体
基板のイオン注入層をアニールする工程とを含むことｔ
％黴とする化合物半導体装置の製造方法。forming a layer of silicon on the ion-implanted compound semiconductor substrate; and then annealing the ion-implanted layer of the silicon silicon conductor substrate by heat treatment.
A method for manufacturing a compound semiconductor device using mold.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20214081A JPS58103122A (en) | 1981-12-15 | 1981-12-15 | Manufacture of compound semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20214081A JPS58103122A (en) | 1981-12-15 | 1981-12-15 | Manufacture of compound semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58103122A true JPS58103122A (en) | 1983-06-20 |
Family
ID=16452617
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20214081A Pending JPS58103122A (en) | 1981-12-15 | 1981-12-15 | Manufacture of compound semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58103122A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61201425A (en) * | 1985-02-27 | 1986-09-06 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | Treatment of gaas substrate |
| US4634474A (en) * | 1984-10-09 | 1987-01-06 | At&T Bell Laboratories | Coating of III-V and II-VI compound semiconductors |
| US5086321A (en) * | 1988-06-15 | 1992-02-04 | International Business Machines Corporation | Unpinned oxide-compound semiconductor structures and method of forming same |
| US5188978A (en) * | 1990-03-02 | 1993-02-23 | International Business Machines Corporation | Controlled silicon doping of III-V compounds by thermal oxidation of silicon capping layer |
-
1981
- 1981-12-15 JP JP20214081A patent/JPS58103122A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4634474A (en) * | 1984-10-09 | 1987-01-06 | At&T Bell Laboratories | Coating of III-V and II-VI compound semiconductors |
| JPS61201425A (en) * | 1985-02-27 | 1986-09-06 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | Treatment of gaas substrate |
| US5086321A (en) * | 1988-06-15 | 1992-02-04 | International Business Machines Corporation | Unpinned oxide-compound semiconductor structures and method of forming same |
| US5188978A (en) * | 1990-03-02 | 1993-02-23 | International Business Machines Corporation | Controlled silicon doping of III-V compounds by thermal oxidation of silicon capping layer |
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