JPS5799010A - High dynamic range digital agc system - Google Patents

High dynamic range digital agc system

Info

Publication number
JPS5799010A
JPS5799010A JP17509980A JP17509980A JPS5799010A JP S5799010 A JPS5799010 A JP S5799010A JP 17509980 A JP17509980 A JP 17509980A JP 17509980 A JP17509980 A JP 17509980A JP S5799010 A JPS5799010 A JP S5799010A
Authority
JP
Japan
Prior art keywords
output
converter
circuit
attenuation
variable attenuator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP17509980A
Other languages
Japanese (ja)
Other versions
JPS6314529B2 (en
Inventor
Kazuo Murano
Shigeyuki Umigami
Kuninosuke Ihira
Toshitaka Tsuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP17509980A priority Critical patent/JPS5799010A/en
Publication of JPS5799010A publication Critical patent/JPS5799010A/en
Publication of JPS6314529B2 publication Critical patent/JPS6314529B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03GCONTROL OF AMPLIFICATION
    • H03G7/00Volume compression or expansion in amplifiers
    • H03G7/002Volume compression or expansion in amplifiers in untuned or low-frequency amplifiers, e.g. audio amplifiers
    • H03G7/005Volume compression or expansion in amplifiers in untuned or low-frequency amplifiers, e.g. audio amplifiers using discontinuously variable devices, e.g. switch-operated

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Analogue/Digital Conversion (AREA)
  • Control Of Amplification And Gain Control (AREA)

Abstract

PURPOSE:To extend the dynamic range and to cancel undesired discontinuity, by controlling a variable attenuator provided at an input side based on an output level of a companding A/D converter and also an AGC coefficient. CONSTITUTION:An output of a companding A/D converter 1 is detected at a level detection circuit 6, and when an output of the converter 1 exceeds the 1st threshold value of a certain value, an attenuation control circuit 7 controls a variable attenuator 9 provided at an input state of the converter 1 to increase the attenuation. If the attenuation by the variable attenuator 9 is changed, an AGC coefficient generating circuit 5 is controlled via a delay circuit 8 with an output from a level detecting circuit 6, and the coefficient generated at the circuit 5 is changed in accordance with the change in the attenuation by the variable attenuator 9, allowing to avoid rapid change in the output signal level.
JP17509980A 1980-12-11 1980-12-11 High dynamic range digital agc system Granted JPS5799010A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17509980A JPS5799010A (en) 1980-12-11 1980-12-11 High dynamic range digital agc system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17509980A JPS5799010A (en) 1980-12-11 1980-12-11 High dynamic range digital agc system

Publications (2)

Publication Number Publication Date
JPS5799010A true JPS5799010A (en) 1982-06-19
JPS6314529B2 JPS6314529B2 (en) 1988-03-31

Family

ID=15990231

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17509980A Granted JPS5799010A (en) 1980-12-11 1980-12-11 High dynamic range digital agc system

Country Status (1)

Country Link
JP (1) JPS5799010A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0069515A2 (en) * 1981-06-30 1983-01-12 Fujitsu Limited A digital automatic gain control circuit
JPH07312553A (en) * 1994-05-19 1995-11-28 Nec Corp A/d converter circuit
JP2005507568A (en) * 2001-02-16 2005-03-17 クゥアルコム・インコーポレイテッド Direct convert receiver architecture
JP2008259035A (en) * 2007-04-06 2008-10-23 Anritsu Corp Digitizer
JP2019052906A (en) * 2017-09-14 2019-04-04 アンリツ株式会社 Signal analyzer and method for optimizing dynamic range of signal analyzer

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5024063A (en) * 1973-07-04 1975-03-14
JPS55110303A (en) * 1979-02-15 1980-08-25 Mitsubishi Electric Corp Analog input adjustment system of ddc
JPS55115723A (en) * 1979-02-21 1980-09-05 Siemens Ag Method of enhancing accuracy of digital to analog converter or analog to digital converter

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5024063A (en) * 1973-07-04 1975-03-14
JPS55110303A (en) * 1979-02-15 1980-08-25 Mitsubishi Electric Corp Analog input adjustment system of ddc
JPS55115723A (en) * 1979-02-21 1980-09-05 Siemens Ag Method of enhancing accuracy of digital to analog converter or analog to digital converter

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0069515A2 (en) * 1981-06-30 1983-01-12 Fujitsu Limited A digital automatic gain control circuit
JPH07312553A (en) * 1994-05-19 1995-11-28 Nec Corp A/d converter circuit
JP2005507568A (en) * 2001-02-16 2005-03-17 クゥアルコム・インコーポレイテッド Direct convert receiver architecture
US8626099B2 (en) 2001-02-16 2014-01-07 Qualcomm Incorporated Direct conversion receiver architecture
US8634790B2 (en) 2001-02-16 2014-01-21 Qualcomm Incorporated Direct conversion receiver architecture with digital fine resolution variable gain amplification
JP2008259035A (en) * 2007-04-06 2008-10-23 Anritsu Corp Digitizer
JP4516975B2 (en) * 2007-04-06 2010-08-04 アンリツ株式会社 Digitizer
JP2019052906A (en) * 2017-09-14 2019-04-04 アンリツ株式会社 Signal analyzer and method for optimizing dynamic range of signal analyzer

Also Published As

Publication number Publication date
JPS6314529B2 (en) 1988-03-31

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