JPS575153A - Information processor - Google Patents

Information processor

Info

Publication number
JPS575153A
JPS575153A JP7810580A JP7810580A JPS575153A JP S575153 A JPS575153 A JP S575153A JP 7810580 A JP7810580 A JP 7810580A JP 7810580 A JP7810580 A JP 7810580A JP S575153 A JPS575153 A JP S575153A
Authority
JP
Japan
Prior art keywords
memory
registers
register
fields
multipurpose
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7810580A
Other languages
Japanese (ja)
Other versions
JPS6223891B2 (en
Inventor
Yasushi Hibino
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP7810580A priority Critical patent/JPS575153A/en
Publication of JPS575153A publication Critical patent/JPS575153A/en
Publication of JPS6223891B2 publication Critical patent/JPS6223891B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22Microcontrol or microprogram arrangements
    • G06F9/223Execution means for microinstructions irrespective of the microinstruction function, e.g. decoding of microinstructions and nanoinstructions; timing of microinstructions; programmable logic arrays; delays and fan-out problems

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Devices For Executing Special Programs (AREA)

Abstract

PURPOSE:To select an optional register among multi-purpose memory registers, by setting up one-bit information for discriminating the contents of every field, in the fields of a processor on a microprogram control system. CONSTITUTION:Multipurpose memory registers 41-48 connecting an address bus 31 to data buses 32 and 33 are provided; one memory cell consists of two fields and in single memory operation, reading from an writing to one of two groups of registers 41 and 42, and 47 and 48 are performed. To the most significant one bit of each of fields 61-64 of microinstructions, a bit for discriminating between the multipurpose register and an indication register is assigned, thereby selecting freely a register which holds a memory address and memory data among the multipurpose memory registers 41-48. Therefore, a waste of transfer time between registers interfacing to a memory is eliminated in the main processing of memory access.
JP7810580A 1980-06-10 1980-06-10 Information processor Granted JPS575153A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7810580A JPS575153A (en) 1980-06-10 1980-06-10 Information processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7810580A JPS575153A (en) 1980-06-10 1980-06-10 Information processor

Publications (2)

Publication Number Publication Date
JPS575153A true JPS575153A (en) 1982-01-11
JPS6223891B2 JPS6223891B2 (en) 1987-05-26

Family

ID=13652599

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7810580A Granted JPS575153A (en) 1980-06-10 1980-06-10 Information processor

Country Status (1)

Country Link
JP (1) JPS575153A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60107138A (en) * 1983-10-03 1985-06-12 デイジタル イクイツプメント コ−ポレイシヨン Central processing unit for digital computer
JPS60217438A (en) * 1984-03-02 1985-10-31 テキサス インスツルメンツ インコ−ポレイテツド Data processing apparatus and method
US4812971A (en) * 1983-10-03 1989-03-14 Digital Equipment Corporation Central processing unit for a digital computer
US4893235A (en) * 1983-10-03 1990-01-09 Digital Equipment Corporation Central processing unit for a digital computer

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5521154U (en) * 1978-07-28 1980-02-09

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5521154U (en) * 1978-07-28 1980-02-09

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60107138A (en) * 1983-10-03 1985-06-12 デイジタル イクイツプメント コ−ポレイシヨン Central processing unit for digital computer
JPS6339931B2 (en) * 1983-10-03 1988-08-09 Digital Equipment Corp
US4812971A (en) * 1983-10-03 1989-03-14 Digital Equipment Corporation Central processing unit for a digital computer
US4893235A (en) * 1983-10-03 1990-01-09 Digital Equipment Corporation Central processing unit for a digital computer
JPS60217438A (en) * 1984-03-02 1985-10-31 テキサス インスツルメンツ インコ−ポレイテツド Data processing apparatus and method

Also Published As

Publication number Publication date
JPS6223891B2 (en) 1987-05-26

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