JPS5670644A - Manufacture of semiconductor integrated circuit - Google Patents
Manufacture of semiconductor integrated circuitInfo
- Publication number
- JPS5670644A JPS5670644A JP14652779A JP14652779A JPS5670644A JP S5670644 A JPS5670644 A JP S5670644A JP 14652779 A JP14652779 A JP 14652779A JP 14652779 A JP14652779 A JP 14652779A JP S5670644 A JPS5670644 A JP S5670644A
- Authority
- JP
- Japan
- Prior art keywords
- film
- si3n4
- mask
- substrate
- integrated circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Local Oxidation Of Silicon (AREA)
- Element Separation (AREA)
Abstract
PURPOSE:To enhance the integrity of a semiconductor integrated circuit be sequentially forming an SiO2 film, a polysilicon film and an Si3N4 film on a semiconductor substrate, removing a part of the Si3N4 film by an anisotropic etching and forming a thermally oxidized film with the residual Si3N4 film as a mask. CONSTITUTION:The SiO2 film 2, polysilicon film 3 and Si3N4 film 4 are sequentially formed on the surface of a P type Si substrate 1, and a part of the film 4 is selectively removed by anisotropic etching such as an ion etching or the like using a photoresist mask 5. After the photoresist is then removed, a field oxide film 6 is formed by thermal oxidation with the Si3N4 film as a mask. As this time strain force occurred upon thermal oxidation is absorbed by the film 3. Thus, the crystalline defect such as dislocation or the like is not introduced into the surface of the substrate as caused by the strain force, and the leakage current can also be eliminated, the field film can be precisely formed, and the integrity of the MOSIC or the like can be improved.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14652779A JPS5670644A (en) | 1979-11-14 | 1979-11-14 | Manufacture of semiconductor integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14652779A JPS5670644A (en) | 1979-11-14 | 1979-11-14 | Manufacture of semiconductor integrated circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5670644A true JPS5670644A (en) | 1981-06-12 |
Family
ID=15409655
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14652779A Pending JPS5670644A (en) | 1979-11-14 | 1979-11-14 | Manufacture of semiconductor integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5670644A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5840839A (en) * | 1981-09-04 | 1983-03-09 | Toshiba Corp | Manufacture of semiconductor device |
JPS6174350A (en) * | 1984-09-19 | 1986-04-16 | Sony Corp | Manufacture of semiconductor device |
JPH05182959A (en) * | 1990-12-26 | 1993-07-23 | Korea Electron Telecommun | Method of isolating semiconductor element utilizing local polyoxide |
US5432117A (en) * | 1993-06-11 | 1995-07-11 | Rohm Co., Ltd. | Method of producing semiconductor device |
US6201275B1 (en) | 1995-06-30 | 2001-03-13 | Nippon Steel Corporation | Semiconductor device having semiconductor regions of different conductivity types isolated by field oxide, and method of manufacturing the same |
-
1979
- 1979-11-14 JP JP14652779A patent/JPS5670644A/en active Pending
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5840839A (en) * | 1981-09-04 | 1983-03-09 | Toshiba Corp | Manufacture of semiconductor device |
JPS6174350A (en) * | 1984-09-19 | 1986-04-16 | Sony Corp | Manufacture of semiconductor device |
JPH05182959A (en) * | 1990-12-26 | 1993-07-23 | Korea Electron Telecommun | Method of isolating semiconductor element utilizing local polyoxide |
US5432117A (en) * | 1993-06-11 | 1995-07-11 | Rohm Co., Ltd. | Method of producing semiconductor device |
US6201275B1 (en) | 1995-06-30 | 2001-03-13 | Nippon Steel Corporation | Semiconductor device having semiconductor regions of different conductivity types isolated by field oxide, and method of manufacturing the same |
US6482692B2 (en) | 1995-06-30 | 2002-11-19 | Nippon Steel Corporation | Method of manufacturing a semiconductor device, having first and second semiconductor regions with field shield isolation structures and a field oxide film covering a junction between semiconductor regions |
US6486013B2 (en) | 1995-06-30 | 2002-11-26 | Nippon Steel Corporation | Method of manufacturing a semiconductor device having regions of different conductivity types isolated by field oxide |
US6656781B2 (en) | 1995-06-30 | 2003-12-02 | Nippon Steel Corporation | Method of manufacturing a semiconductor device, having first and second semiconductor regions with field shield isolation structures and a field oxide film covering a junction between semiconductor regions |
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