JPS56155531A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS56155531A
JPS56155531A JP5764480A JP5764480A JPS56155531A JP S56155531 A JPS56155531 A JP S56155531A JP 5764480 A JP5764480 A JP 5764480A JP 5764480 A JP5764480 A JP 5764480A JP S56155531 A JPS56155531 A JP S56155531A
Authority
JP
Japan
Prior art keywords
layer
injected
ions
reservoired
treated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5764480A
Other languages
Japanese (ja)
Inventor
Hidetoshi Nishi
Shigeru Okamura
Tsuguo Inada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP5764480A priority Critical patent/JPS56155531A/en
Publication of JPS56155531A publication Critical patent/JPS56155531A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation

Landscapes

  • Physics & Mathematics (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE:To enable the formation of, for example, an FET circuit in a good electrical characteristic by a method wherein active impurity ions are injected in a semiconductor substrate of a semi-insulated compound, and an injected layer of inactive ions is formed in a zone deeper than the ion-injected layer and heat-treated. CONSTITUTION:The Si-ions 3 are injected in an element forming layer of the GaAs substrate 1 made semi-insulation by adding, for example, Cr with an SiO2 film 2 as a mask to form the Si-injected layer 4. Then, the inactive Al-ions 5 are injected in the substrate to form the Al-injected layer 6 in the zone deeper than the Si-subjected layer 4. Then, SiO2 is reservoired on the whole surface to be made a protective film 7 and heat-treated to change the injected layer 4 to an N type active layer 4', and at the same time, the injected layer 5 is translated to a gettering layer 6' in which the Cr is reservoired. Thereafter, the active layer 4' is formed with a gate electrode 8, source and drain electrodes 9, 10 thereon to be made the FET. Thereby, the N type layer at a good activation rate is obtained, and, for example, the FET circuit in the good electrical characteristic can be formed.
JP5764480A 1980-04-30 1980-04-30 Manufacture of semiconductor device Pending JPS56155531A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5764480A JPS56155531A (en) 1980-04-30 1980-04-30 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5764480A JPS56155531A (en) 1980-04-30 1980-04-30 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS56155531A true JPS56155531A (en) 1981-12-01

Family

ID=13061596

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5764480A Pending JPS56155531A (en) 1980-04-30 1980-04-30 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS56155531A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60206075A (en) * 1984-03-29 1985-10-17 Toshiba Corp Manufacture of field effect type semiconductor device
JPS6114729A (en) * 1984-06-29 1986-01-22 Toshiba Corp Gallium-arsenic compound semiconductor device
EP0201873A2 (en) * 1985-05-09 1986-11-20 Sumitomo Electric Industries Limited A method of the production of a metal semiconductor field effect transistor and said transistor
US4889817A (en) * 1985-08-08 1989-12-26 Oki Electric Industry Co., Ltd. Method of manufacturing schottky gate field transistor by ion implantation method
EP0499114A2 (en) * 1991-02-14 1992-08-19 International Business Machines Corporation Internal gettering of oxygen in III-V compound semiconductors
US5141879A (en) * 1989-08-28 1992-08-25 Herbert Goronkin Method of fabricating a FET having a high trap concentration interface layer
US5272373A (en) * 1991-02-14 1993-12-21 International Business Machines Corporation Internal gettering of oxygen in III-V compound semiconductors

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60206075A (en) * 1984-03-29 1985-10-17 Toshiba Corp Manufacture of field effect type semiconductor device
JPS6114729A (en) * 1984-06-29 1986-01-22 Toshiba Corp Gallium-arsenic compound semiconductor device
EP0201873A2 (en) * 1985-05-09 1986-11-20 Sumitomo Electric Industries Limited A method of the production of a metal semiconductor field effect transistor and said transistor
US4889817A (en) * 1985-08-08 1989-12-26 Oki Electric Industry Co., Ltd. Method of manufacturing schottky gate field transistor by ion implantation method
US5141879A (en) * 1989-08-28 1992-08-25 Herbert Goronkin Method of fabricating a FET having a high trap concentration interface layer
EP0499114A2 (en) * 1991-02-14 1992-08-19 International Business Machines Corporation Internal gettering of oxygen in III-V compound semiconductors
EP0499114A3 (en) * 1991-02-14 1992-12-09 International Business Machines Corporation Internal gettering of oxygen in iii-v compound semiconductors
JPH05226343A (en) * 1991-02-14 1993-09-03 Internatl Business Mach Corp <Ibm> Gettering of oxygen in compound semiconductor
US5272373A (en) * 1991-02-14 1993-12-21 International Business Machines Corporation Internal gettering of oxygen in III-V compound semiconductors

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