JPS554964A - Manufacture of mos type semiconductor - Google Patents

Manufacture of mos type semiconductor

Info

Publication number
JPS554964A
JPS554964A JP7772578A JP7772578A JPS554964A JP S554964 A JPS554964 A JP S554964A JP 7772578 A JP7772578 A JP 7772578A JP 7772578 A JP7772578 A JP 7772578A JP S554964 A JPS554964 A JP S554964A
Authority
JP
Japan
Prior art keywords
film
polycrystalline
films
substrate
portions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7772578A
Other languages
Japanese (ja)
Inventor
Kenji Maeguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP7772578A priority Critical patent/JPS554964A/en
Publication of JPS554964A publication Critical patent/JPS554964A/en
Pending legal-status Critical Current

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  • Electrodes Of Semiconductors (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE: To pile up on a semiconductor substrate the polycrystalline Si films on which impurity is doped, to form a source drain range by using said polycrystalline Si films as diffusion source, and to use the remainder portion of said polycrystalline films as take-out electrode of said ranges for increasing integration degree.
CONSTITUTION: Thick field SiO2 films 2 are provided at the both end edges of a P-type Si substrate 1, and the polycrystalline Si film 3 containing N-type impurity is piled up over the whole surface of said substrate 1. Next, said film is removed with portions 3a and 3b are left only at the range where said portions 3a and 3b are necessary as source, drain and wiring. Said substrate 1 is heat-treated in wet oxygen for forming gate SiO2 film 4 over the whole surface thereof. At the same time, impurity is diffused from said portions 3a and 3b to form N+-type source drain ranges 6a and 6b, and the SiO2 films 5a and 5b are formed at this time are combined with said film 4. Thereafter, the gate electrode 7 of the polycrystalline Si containing N-type impurity is fitted on the exposed portion of said film 4, the whole surface of said substrate is covered with SiO2 film 8, openings are provided therein, and Al wirings 9a and 9b for connecting said portions 3a and 3b are fitted in said openings.
COPYRIGHT: (C)1980,JPO&Japio
JP7772578A 1978-06-27 1978-06-27 Manufacture of mos type semiconductor Pending JPS554964A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7772578A JPS554964A (en) 1978-06-27 1978-06-27 Manufacture of mos type semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7772578A JPS554964A (en) 1978-06-27 1978-06-27 Manufacture of mos type semiconductor

Publications (1)

Publication Number Publication Date
JPS554964A true JPS554964A (en) 1980-01-14

Family

ID=13641865

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7772578A Pending JPS554964A (en) 1978-06-27 1978-06-27 Manufacture of mos type semiconductor

Country Status (1)

Country Link
JP (1) JPS554964A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57198416U (en) * 1981-06-12 1982-12-16
JPS58101021U (en) * 1981-12-28 1983-07-09 株式会社新潟鐵工所 Bushing for bearings
JPS58118158A (en) * 1981-12-30 1983-07-14 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション Method of forming field effect transistor
JPS61125175A (en) * 1984-11-22 1986-06-12 Nec Corp Mis type semiconductor integrated circuit device and manufacture thereof

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5265683A (en) * 1975-11-28 1977-05-31 Hitachi Ltd Production of insulated gate type mis semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5265683A (en) * 1975-11-28 1977-05-31 Hitachi Ltd Production of insulated gate type mis semiconductor device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57198416U (en) * 1981-06-12 1982-12-16
JPS58101021U (en) * 1981-12-28 1983-07-09 株式会社新潟鐵工所 Bushing for bearings
JPS58118158A (en) * 1981-12-30 1983-07-14 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション Method of forming field effect transistor
JPH045265B2 (en) * 1981-12-30 1992-01-30
JPS61125175A (en) * 1984-11-22 1986-06-12 Nec Corp Mis type semiconductor integrated circuit device and manufacture thereof

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