JPS5533282A - Buffer control system - Google Patents

Buffer control system

Info

Publication number
JPS5533282A
JPS5533282A JP10649678A JP10649678A JPS5533282A JP S5533282 A JPS5533282 A JP S5533282A JP 10649678 A JP10649678 A JP 10649678A JP 10649678 A JP10649678 A JP 10649678A JP S5533282 A JPS5533282 A JP S5533282A
Authority
JP
Japan
Prior art keywords
buffer
address
data
linkage
intra
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10649678A
Other languages
Japanese (ja)
Other versions
JPS5646611B2 (en
Inventor
Takashi Ishikawa
Saneyuki Hiwatari
Takuzumi Hatanaka
Hiroshi Ameya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
KDDI Corp
Original Assignee
Fujitsu Ltd
Kokusai Denshin Denwa KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Kokusai Denshin Denwa KK filed Critical Fujitsu Ltd
Priority to JP10649678A priority Critical patent/JPS5533282A/en
Publication of JPS5533282A publication Critical patent/JPS5533282A/en
Publication of JPS5646611B2 publication Critical patent/JPS5646611B2/ja
Granted legal-status Critical Current

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  • Computer And Data Communications (AREA)

Abstract

PURPOSE: To simplify constitution for control by storing chaining points among respective buffers in a linkage memory and by equalizing buffers chained at a chaining point in address.
CONSTITUTION: In case of write operation, the address of a buffer corresponding to a circuit when full of data is recorded on linkage pointer 8. The address in the buffer is determined according to intra-buffer storage address register 2A whose content is increased by one at every arrival of a write request. Storage buffer number memory 2B indicated what buffer is in use at that time, and when the intra-buffer address agress with the value of linkage pointer 8, namely when the buffer unit in use at that time is full of data, its contents are increased by one to indicate a next buffer unit. Start and end-address coincidence circuit 4 indicates the overflow after data are written to all buffer units.
COPYRIGHT: (C)1980,JPO&Japio
JP10649678A 1978-08-31 1978-08-31 Buffer control system Granted JPS5533282A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10649678A JPS5533282A (en) 1978-08-31 1978-08-31 Buffer control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10649678A JPS5533282A (en) 1978-08-31 1978-08-31 Buffer control system

Publications (2)

Publication Number Publication Date
JPS5533282A true JPS5533282A (en) 1980-03-08
JPS5646611B2 JPS5646611B2 (en) 1981-11-04

Family

ID=14435039

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10649678A Granted JPS5533282A (en) 1978-08-31 1978-08-31 Buffer control system

Country Status (1)

Country Link
JP (1) JPS5533282A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6033628A (en) * 1983-08-04 1985-02-21 Nec Corp Variable queue memory
JPH067010A (en) * 1993-02-04 1994-01-18 Iseki & Co Ltd Seedling planter
US6112268A (en) * 1997-06-16 2000-08-29 Matsushita Electric Industrial Co., Ltd. System for indicating status of a buffer based on a write address of the buffer and generating an abort signal before buffer overflows

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6033628A (en) * 1983-08-04 1985-02-21 Nec Corp Variable queue memory
JPH067010A (en) * 1993-02-04 1994-01-18 Iseki & Co Ltd Seedling planter
US6112268A (en) * 1997-06-16 2000-08-29 Matsushita Electric Industrial Co., Ltd. System for indicating status of a buffer based on a write address of the buffer and generating an abort signal before buffer overflows

Also Published As

Publication number Publication date
JPS5646611B2 (en) 1981-11-04

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