JPS55158752A - Receiving system for inverse double transmission data - Google Patents
Receiving system for inverse double transmission dataInfo
- Publication number
- JPS55158752A JPS55158752A JP6665679A JP6665679A JPS55158752A JP S55158752 A JPS55158752 A JP S55158752A JP 6665679 A JP6665679 A JP 6665679A JP 6665679 A JP6665679 A JP 6665679A JP S55158752 A JPS55158752 A JP S55158752A
- Authority
- JP
- Japan
- Prior art keywords
- byte
- shift register
- register
- data
- error
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/08—Arrangements for detecting or preventing errors in the information received by repeating transmission, e.g. Verdan system
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Retry When Errors Occur (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
Abstract
PURPOSE:To secure the easy detection for the correct or erroneous reception data of N-byte, by deciding error through the comparison between the head one byte and the last one byte of the shift register and then carrying out this error decision in sequence once and every N+1 bits. CONSTITUTION:The data of N-byte are supplied in sequence to 1-byte shift register 7 of N+1 byte shift register 15 from the input end of the serial input data and by the shift clock, and then to N-1 byte shift register 8 and register 7. Then the inverse data of N-byte in which the bit of each byte is inverted are supplied in sequence and by one byte to register 7. Thus the head one byte enters 1-byte shift register 9 when the inverse data of the first one byte enters register 7. Thus the error decision 10 is given to one byte of registers 7 and 9 each. If this decision result is correct, the output of circuit 10 is sent to N-byte latch 14. And the error decision of N-1 times is carried out in sequence and every time N+1 bytes enter. Thus the detection can be given easily to the error for the N-byte reception data.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6665679A JPS55158752A (en) | 1979-05-29 | 1979-05-29 | Receiving system for inverse double transmission data |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6665679A JPS55158752A (en) | 1979-05-29 | 1979-05-29 | Receiving system for inverse double transmission data |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS55158752A true JPS55158752A (en) | 1980-12-10 |
Family
ID=13322150
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6665679A Pending JPS55158752A (en) | 1979-05-29 | 1979-05-29 | Receiving system for inverse double transmission data |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS55158752A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60180163U (en) * | 1984-05-09 | 1985-11-29 | カルソニックカンセイ株式会社 | data transmission equipment |
| JPH0242138U (en) * | 1988-09-16 | 1990-03-23 | ||
| EP0367435A2 (en) * | 1988-10-15 | 1990-05-09 | AB Electronic Components Limited | Data communication system using repetition of transmission |
-
1979
- 1979-05-29 JP JP6665679A patent/JPS55158752A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60180163U (en) * | 1984-05-09 | 1985-11-29 | カルソニックカンセイ株式会社 | data transmission equipment |
| JPH0242138U (en) * | 1988-09-16 | 1990-03-23 | ||
| EP0367435A2 (en) * | 1988-10-15 | 1990-05-09 | AB Electronic Components Limited | Data communication system using repetition of transmission |
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