JPS5474650A - Stack control system - Google Patents

Stack control system

Info

Publication number
JPS5474650A
JPS5474650A JP14151477A JP14151477A JPS5474650A JP S5474650 A JPS5474650 A JP S5474650A JP 14151477 A JP14151477 A JP 14151477A JP 14151477 A JP14151477 A JP 14151477A JP S5474650 A JPS5474650 A JP S5474650A
Authority
JP
Japan
Prior art keywords
stack
scr
data
csp
sla
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14151477A
Other languages
Japanese (ja)
Inventor
Yusaku Miki
Hidemi Yamamoto
Yuichi Kimihira
Akio Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP14151477A priority Critical patent/JPS5474650A/en
Publication of JPS5474650A publication Critical patent/JPS5474650A/en
Pending legal-status Critical Current

Links

Landscapes

  • Executing Machine-Instructions (AREA)

Abstract

PURPOSE: To reduce the overhead of software and to speed up the small sized computer, by performing the shunt and restoration process of each register at program branch and the setting and release processing of working area caused at the data processing with the stack set of hardware.
CONSTITUTION: The SCR stack set 17 constituting the central processing unit is four stack control registers consisting of 32-bit, and the relation of correspondence between the SCR 17 and the main memory unit MMU 4 in the central processing unit is as follows: That is, the SLA 17 in SCR 17 is taken as the lower limit address at the stack area, SUA172 as the upper limit address, CSP 173 as the stack pointer representing the head address of the control stack, and DSP 174 as the data stack pointer representing the head address of the data stack, and while making SLA< SUA, arbitrary program is controlled with CSP and DSP.
COPYRIGHT: (C)1979,JPO&Japio
JP14151477A 1977-11-28 1977-11-28 Stack control system Pending JPS5474650A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14151477A JPS5474650A (en) 1977-11-28 1977-11-28 Stack control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14151477A JPS5474650A (en) 1977-11-28 1977-11-28 Stack control system

Publications (1)

Publication Number Publication Date
JPS5474650A true JPS5474650A (en) 1979-06-14

Family

ID=15293725

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14151477A Pending JPS5474650A (en) 1977-11-28 1977-11-28 Stack control system

Country Status (1)

Country Link
JP (1) JPS5474650A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04182836A (en) * 1990-11-19 1992-06-30 Hitachi Ltd Unspecific value reference and detection system for program

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52133739A (en) * 1976-04-30 1977-11-09 Ibm Data processor system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52133739A (en) * 1976-04-30 1977-11-09 Ibm Data processor system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04182836A (en) * 1990-11-19 1992-06-30 Hitachi Ltd Unspecific value reference and detection system for program

Similar Documents

Publication Publication Date Title
JPS5474651A (en) Stack control system
JPS5576447A (en) Address control system for software simulation
JPS5464439A (en) Address designation system
JPS5344134A (en) Microprogram control system
JPS5474650A (en) Stack control system
JPS55118157A (en) Program tracing system
JPS53113446A (en) Information processor and its method
JPS5474647A (en) Stack control system
JPS5424547A (en) Control system for memory extension
JPS53103343A (en) Program apparatus
JPS53142841A (en) Data processor
JPS5474648A (en) Stack control system
JPS5474646A (en) Stack control system
JPS5583941A (en) Microprogram system
JPS5621222A (en) Memory extension system
JPS5222844A (en) Control method to control other unit in the multiple data processing system
JPS53140948A (en) Interrupt processing system
JPS5474649A (en) Stack control mechanism
JPS55108053A (en) Microprogram high speed control system
JPS5485650A (en) Branch instruction control system
JPS5419622A (en) Control system for response confirmation
JPS53118951A (en) Microprogram trace unit
JPS5448459A (en) Control unit of instruction advance fetch
JPS5474653A (en) Stack control system
JPS5552161A (en) Information processing system