JPS5283173A - Circuit packaging substrate - Google Patents

Circuit packaging substrate

Info

Publication number
JPS5283173A
JPS5283173A JP15945675A JP15945675A JPS5283173A JP S5283173 A JPS5283173 A JP S5283173A JP 15945675 A JP15945675 A JP 15945675A JP 15945675 A JP15945675 A JP 15945675A JP S5283173 A JPS5283173 A JP S5283173A
Authority
JP
Japan
Prior art keywords
packaging substrate
circuit packaging
electrodes
semiconductor chips
direct bonding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15945675A
Other languages
Japanese (ja)
Other versions
JPS555266B2 (en
Inventor
Nobuo Kamehara
Masatoshi Fujimori
Kyohei Murakawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP15945675A priority Critical patent/JPS5283173A/en
Publication of JPS5283173A publication Critical patent/JPS5283173A/en
Publication of JPS555266B2 publication Critical patent/JPS555266B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods

Landscapes

  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE: To perform accurate direct bonding of semiconductor chips having small electrodes and a circuit packaging substrate by using a circuit packaging substrate having plural electrode having predetermined spacing on the surface and guiding projections which are provided between these electrodes, are higher than the electrodes and whose tips fit between the electrodes of semiconductor chips.
COPYRIGHT: (C)1977,JPO&Japio
JP15945675A 1975-12-30 1975-12-30 Circuit packaging substrate Granted JPS5283173A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15945675A JPS5283173A (en) 1975-12-30 1975-12-30 Circuit packaging substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15945675A JPS5283173A (en) 1975-12-30 1975-12-30 Circuit packaging substrate

Publications (2)

Publication Number Publication Date
JPS5283173A true JPS5283173A (en) 1977-07-11
JPS555266B2 JPS555266B2 (en) 1980-02-05

Family

ID=15694147

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15945675A Granted JPS5283173A (en) 1975-12-30 1975-12-30 Circuit packaging substrate

Country Status (1)

Country Link
JP (1) JPS5283173A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5833403U (en) * 1981-08-28 1983-03-04 株式会社サト− Strip winding tool
US4668538A (en) * 1984-07-10 1987-05-26 Westinghouse Electric Corp. Processes for depositing metal compound coatings

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61138561U (en) * 1985-02-19 1986-08-28

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
IBM JOURNAL OF RESEARCH AND DEVELOPMENT=1969 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5833403U (en) * 1981-08-28 1983-03-04 株式会社サト− Strip winding tool
US4668538A (en) * 1984-07-10 1987-05-26 Westinghouse Electric Corp. Processes for depositing metal compound coatings

Also Published As

Publication number Publication date
JPS555266B2 (en) 1980-02-05

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