JPH11112152A - Multilayered printed board for mounting flip chip - Google Patents

Abstract

PROBLEM TO BE SOLVED: To easily conduct functional inspections on a multilayered printed board after parts re mounted on the board, by securing the parts mounting area of the board by eliminating leading-out wiring patterns to lands for test and reducing the unnecessary radiated noise level or delays in high-speed signal transmission. SOLUTION: A land 1 is formed on the surface side 6 of a multilayered printed board 5, and another land 7 composed of pads 4 connected to each other through blind through holes 10 is also formed at the positions corresponding to the pads 4 in the land 1 on the backside 6' of the board 5. The pins of pin boards for test arranged on the backside 6' in accordance with the arrangement of the pads 4 in the land 7 are brought into contact in accordance with the land 7. Therefore, the opening between the ball grid array terminals 9 of parts 8 mounted on the land 1 of the printed board 5 and the pads 4 in the land 1, short-circuiting between adjacent pads 4 in the land 1, and the function of the printed board 5 after mounting the parts 8, can be inspected.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flip-chip mounted multilayer printed circuit board capable of performing a function test after component mounting, having high density, high reliability and low unnecessary radiation.

[0002]

2. Description of the Related Art A conventional flip-chip mounted multilayer printed circuit board of this type is disclosed, for example, in JP-A-6-75007. This multilayer printed circuit board is configured as shown in the front view of the schematic configuration shown in FIG. In FIG. 3, reference numeral 1 denotes a land for mounting by flip-chip for directly connecting a mounted component (an electronic component having an integrated circuit such as an LSI or an IC) on a substrate, and 2 denotes a land for testing the mounted component to be flip-chip mounted. Reference numeral 3 denotes a wiring pattern drawn from the flip chip mounting land 1, and 4 denotes a surface electrode pad provided on each land 1 and 2 and electrically connected to each terminal of a mounted component.

In a conventional flip-chip mounted multilayer printed circuit board configured as shown in FIG.
By connecting to the test land 2 using the wiring pattern 3, the test land 2 for mounting components to be flip-chip mounted on the land 1 is pulled out to another position on the multilayer printed circuit board.

Then, by bringing the pins of the pin board, on which the test pins are arranged, into contact with the test lands 2 in accordance with the arrangement of the pads 4 of the test lands 2, the flip-chip mounted components are operated and mounted. Inspection of short-circuit and open between the terminal of the mounted component and the pad 4 of the land 1 and the function inspection of the flip-chip mounted multilayer printed circuit board are performed.

[0005]

However, in a flip-chip mounted multilayer printed circuit board having such a configuration, a test land must be pulled out of the flip-chip mounted land to another location using a wiring pattern. In order to provide a test land for this,
The area where components can be mounted on the multilayer printed circuit board is cut off, and furthermore, the size of the multilayer printed circuit board must be designed to be large, resulting in extra costs.

If the wiring pattern to be drawn to the test land is directly drawn out from each pad of the flip-chip mounted land with a different wiring length, the thermal conductivity of the flip-chip mounted land is different. Unlike pads, uniform soldering cannot be performed, and there is a concern that the reliability of mounting may be reduced.

Further, a large number of high-speed signal wirings of components mounted on a multilayer printed circuit board by flip-chip mounting are drawn out and wired, so that unnecessary radiation noise levels increase and signal delays in high-speed signal transmission. There was a problem that would occur.

The present invention is directed to solving the above-mentioned problems of the prior art, and includes a land for flip-chip mounting on the front side of a multilayer printed circuit board and another land on the back side using a blind through hole. And the shortest distance between them, it secures the component mounting area of the multilayer printed circuit board without using the drawing wiring pattern to the test land, and reduces unnecessary radiation noise level and delay of high-speed signal transmission. It is another object of the present invention to provide a flip-chip mounted multilayer printed circuit board that can easily realize a function test after component mounting by bringing a pin of a pin board into contact with another land.

[0009]

In order to achieve this object, a flip-chip mounted multilayer printed circuit board according to the present invention comprises a multi-layer printed circuit board having a land for flip-chip mounting electronic components on a front surface side. A plurality of pads connected to each terminal of the multi-layer printed circuit board to form a land, another land formed by a pad provided at a position corresponding to the pad on the back surface side of the multilayer printed circuit board, and each pad of the land and another land And a blind through hole for connecting the pads.

[0010] According to the above configuration, the wiring for the function test can be reduced by another land provided on the back surface side of the multilayer printed circuit board, and the function test can be performed even after the electronic component is flip-chip mounted. .

[0011]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a diagram showing a schematic configuration of a flip-chip mounted multilayer printed board according to an embodiment of the present invention, showing a front side and a back side and a back side of a mounted component. Here, FIG.
Components having substantially the same functions as those described in the above are denoted by the same reference numerals. FIG.
1 is a land, 4 is a pad, 5 is a multilayer printed board, 6 is a substrate front side of the multilayer printed board 5, 6 'is a substrate back side of the multilayer printed board 5, and 7 is a land 1 on the substrate back side 6'. Another land, which is formed so as to have a positional relationship corresponding to the pad 4 and is used for testing, 8 is a mounted component, and 9 is a ball grid array (BGA) terminal of the mounted component 8.

FIG. 2 is a cross-sectional view showing a flip-chip mounted multilayer printed circuit board (example of a six-layer wiring pattern) and mounted components according to the present embodiment. In FIG.
1 is a land, 4 is a pad, 5 is a multilayer printed circuit board, 6 is a substrate front side, 6 'is a substrate rear side, 7 is another land, 8 is a mounted component, 9 is a BGA terminal, and 10 is a land 1 of a mounted component. And a blind through hole connecting each pad 4 at a corresponding position of another land 7 used for testing. L1 is a first layer pattern formed on the substrate front side 6;
L2, L3, L4 and L5 are the second, third, fourth and fifth layer patterns which are the inner layer patterns of the multilayer printed circuit board 5, and L6
Is a sixth layer pattern formed on the back surface side 6 'of the substrate.

The blind through-holes 10 in the present embodiment are provided with holes provided for connecting, for example, respective wiring patterns on the front surface and the back surface of a printed circuit board, and for connecting to lead (terminal) portions of electronic components. The through-hole is a through-hole that is provided on the land 1 on which the mounting component 8 having the BGA terminal 9 is mounted and has no hole.

Next, the operation of the present embodiment configured as described above will be described with reference to FIGS. First, in the flip-chip mounted multilayer printed circuit board 5, a land 1 for flip-chip mounting is formed on the front surface side 6 of the substrate, and a positional relationship corresponding to the pad 4 of the land 1 is also formed on the back surface side 6 'of the substrate. Another land 7 is formed.

Here, the land 1 formed on the substrate front side 6 to be flip-chip mounted and another land 7 formed on the substrate rear side 6 ′ and having a positional relationship corresponding to the land 1 on the substrate front side 6. Each pad 4 has a blind through hole
10 are connected to each other.
The power supply and signal wiring of the blind through hole 10 and the second
A circuit is formed by wiring with the inner pattern of the layer pattern L2, the third layer pattern L3, the fourth layer pattern L4, and the fifth layer pattern L5.

Further, another land 7 is formed at a position corresponding to the land 1 on the substrate front side 6 ′ on the substrate rear side 6 ′, and each land 1 and another land 7 are connected by a blind through hole 10. Therefore, the pins of the test pin board arranged according to the pad arrangement of another land 7 on the rear surface side 6 ′ of the substrate are brought into contact with the other land 7 so as to be brought into contact with the BGA terminal of the mounted component 8. 9, the same state as when the pins of the pin board are brought into contact can be obtained.

Therefore, after the mounting component 8 is mounted on the land 1 on which the flip-chip mounting of the multilayer printed circuit board 5 is performed, the opening between the BGA terminal 9 of the mounting component 8 and the pad 4 of the land 1 or the adjacent land 1 A short circuit between the pads 4 and a function test of the multilayer printed circuit board 5 after the mounting components 8 are mounted can be performed.

In view of the above, another land used directly for testing at the shortest distance by the blind through hole 10 without using a lead-out wiring pattern for connecting the land 1 on which the mounting component 8 is mounted to the test land. 7
Therefore, an area where components can be mounted on the multilayer printed circuit board 5 can be secured, and higher-density mounting can be performed. Further, since there is no wiring pattern for directly drawing out the pattern from the land 1 on which the flip chip is mounted, the thermal conductivity can be made uniform between the pads 4 of the land 1 and the soldering of the mounting component 8 can be performed. Reliability is improved. Further, the unnecessary radiation noise level can be reduced, and the delay of high-speed signal transmission can be reduced.

Further, since another land 7 used for the test has a positional relationship corresponding to the land 1 of the mounted component 8,
The terminal arrangement is very easy to understand, and by contacting the pins of the test pin board with this, it is possible to easily realize the function inspection after component mounting.

Although the present embodiment has been described with an example in which the wiring pattern of the multilayer printed circuit board 5 has six layers, the present invention is not limited to this example, and the same effect can be obtained with a multilayer printed circuit board having four or more layers. Needless to say, this is obtained.

[0021]

As described above, according to the present invention,
The land on the substrate surface side of the multilayer printed circuit board is flip-chip mounted, and another land provided in a positional relationship corresponding to the land on the back surface side of the multilayer printed circuit board. It is possible to connect to another land on the back side of the board used for testing with the shortest distance by using a blind through hole directly without using a wiring pattern leading out to the test land, so component mounting on a multilayer printed circuit board A possible area can be secured, and higher density mounting is possible.

Also, since the board size can be designed to be small, the cost of the multilayer printed board can be reduced, and since there is no direct lead-out wiring pattern from the pads to the test lands, the flip-chip mounting lands can be formed. The thermal conductivity can be made uniform, and the reliability of component mounting by soldering is improved.

Furthermore, since the signal wiring to the flip-chip mounted land is connected to another land used for testing at the shortest distance, unnecessary radiation noise level and delay of high-speed signal transmission can be reduced. Thus, a circuit design enabling high-speed signal operation can be realized.

Further, since another land used for the test has a positional relationship corresponding to the land mounted on the flip chip, the terminal arrangement is very easy to understand, and the pins of the pin board for the test should be brought into contact with this. Thus, there is an effect that the function inspection after the component mounting can be easily performed.

[Brief description of the drawings]

FIG. 1 is a diagram showing a schematic configuration of a flip-chip mounted multilayer printed board according to an embodiment of the present invention, showing a front side and a back side and a back side of a mounted component.

FIG. 2 is a cross-sectional view showing a flip-chip mounted multilayer printed circuit board (an example of a six-layer wiring pattern) and mounted components according to the present embodiment.

FIG. 3 is a front view showing a schematic configuration of a conventional flip-chip mounted multilayer printed circuit board.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... land, 2 ... test land, 3 ... wiring pattern, 4 ... pad, 5 ... multilayer printed circuit board, 6 ... board front side, 6 '... board back side, 7 ... another land,
8 mounting parts, 9 BGA terminals, 10 blind through holes, L1 first layer pattern, L2 second layer pattern, L3 third layer pattern, L4 fourth layer pattern, L5 fifth layer pattern L6: Sixth layer pattern.

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁶ Identification code FI H05K 3/34 505 H01L 23/12 N

Claims (1)

[Claims] 1. A multilayer printed circuit board having lands on the front surface on which electronic components are flip-chip mounted, a plurality of pads connected to each terminal of the electronic component to form the lands, and a plurality of pads formed on the back side of the multilayer printed circuit board. Another land formed by a pad provided at a position corresponding to the pad, and a blind through hole connecting between each pad of the land and each pad of the another land, on the back side of the multilayer printed circuit board A flip-chip mounted multilayer printed circuit board, characterized in that the number of wirings for a function test can be reduced by another land provided, and the function test can be performed even after the electronic component has been flip-chip mounted.