JPH1093842A - Tv signal processing circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To effectively eliminate white longitudinal lines at both ends of a screen by giving a horizontal sharpness blanking signal to a sharpness control terminal for a non-signal period including both left/right ends of the screen in normal display of a television receiver with a laterally long screen. SOLUTION: One input of an OR gate 281 of a sharpness blanking generating circuit 280 receives a luminance signal YS from an aspect ratio conversion circuit 220 and the other input receives a luminance signal YS from a PIP circuit 230 to display a slave pattern in a master pattern. A time constant circuit consisting of a resistor 283 and a capacitor 284 of the buffer 280 delays an output leading edge but does not delay a tailing edge. An output waveform (i) is fed to a sharpness terminal T via a position B of a changeover switch SW via a transistor(TR) 287 deciding a high level output and a buffer 285. As a result, a quadratic differentiation waveform at both ends of the screen in a luminance output signal is eliminated and undesired longitudinal lines at both ends of the screen are eliminated while keeping a sharp effect on the screen except both the ends.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a TV signal processing circuit, and more particularly to an aspect ratio converter for compressing time in the horizontal direction in a landscape television (TV) having an aspect ratio of 16: 9, and enhancing the definition of a screen. In a TV signal processing circuit having a sharpness circuit, a control signal (sharpness / blanking signal) for inhibiting or reducing a sharpness effect is applied to a sharpness circuit control terminal for a non-signal period including a left and right end of a displayed screen, The present invention relates to a sharpness circuit for a horizontally long TV that performs sharpness control for removing or reducing a second-order differential high-frequency signal component at left and right ends of a screen.

[0002]

2. Description of the Related Art FIG. 1 is an explanatory diagram of a display mode of a horizontally long TV. This figure explains how a round circle is displayed when a video signal is video software having a 4: 3 aspect ratio in a landscape TV with a 16: 9 aspect ratio. (A) shows the case of “full mode display”, which has a 16: 9 aspect ratio, so that “circle” is stretched in the horizontal direction and displayed as “ellipse”.

[0003] (B) shows a case of "normal mode display". When a video signal is digitally processed and compressed in 3/4 in the horizontal direction, an image without distortion is displayed. In this case, black portions (hatched portions) having no video are generated on the left and right. (C) ~
In the case of "PIP / POP display", another video software is frame-synchronized and compressed, fitted into the main screen, and two or more screens are displayed. Is called PIP (picture in picture) when another video software is displayed in the main screen,
And POP (picture out of picture) in a case where another video software is displayed outside the main screen.

[0004] These modes will be described in detail below. The input video signal is 4: 3 for simplicity.
A circular pattern with an aspect ratio is used. When this circular pattern is displayed as it is on a 16: 9 aspect ratio screen,
As shown in (A), the image is displayed as an ellipse that is expanded 4/3 times in the horizontal direction. In this case, 4 /
If a three-fold enlargement operation is performed, the shape becomes a “circle”, but the shape becomes a circle (not shown) in which the upper and lower portions are cut. By the way, the input video signal software is a so-called “letterbox” (Letter Box).
Box) format, 16: 9 aspect ratio video software (Vista
r Size), the upper and lower black parts are cut,
The display is visually just right.

One of the purposes of the horizontally long TV is to cope with the above-described letter box type NTSC signal or the like. However, in this case, the upper and lower black scanning lines (about 120
Are lost, and 360 out of 480 effective scanning lines are displayed. As the video software corresponding to the full mode display of (A), Hi-Vision (Hivision) system
The one converted to the SC system, that is, the MUSE / NTSC conversion signal,
Or a video camera 16: 9 aspect ratio signal.
In this case, 16: 9 as it is without performing up / down enlargement.
It can be handled in full mode of the aspect ratio.

Currently, most video software has a 4: 3 aspect ratio. To display at 16: 9 aspect ratio,
As described above, the left and right sides may be compressed to 3/4 times and displayed. (B) is a screen in which the left and right are compressed. As the compression method, there are a) compression of a video signal by a digital signal processing circuit, b) compression of a horizontal deflection size, and the like. However, when displaying another video software (two-screen display), in the case of a), both the PIP display and the POP display are possible, while in the case of b), the PIP display is possible.
OP display is not possible.

FIGS. 2 and 3 are block diagrams of a horizontally long TV signal processing system. In the figure, 100 is an RF input antenna, 110 is an antenna distributor (DV), 120 is a main tuner (I / F detection: I
F1), 130 is a sub tuner (I / F detection: IF2), 140 is a main video signal selector (SEL1), 150 is a sub video signal selector (SEL2), SS is a selection signal, 155 is an external video input terminal ( EXT), 160 is the main video Y / C separation circuit (Y / C
1), 170 is the sub video Y / C separation circuit (Y / C2), 180 is the main color decoder (D1), 190 is the main sync separation AFC circuit (AFC1), 200 is the sub color decoder (D2), 210 Is a sub sync separation AFC circuit (AFC2), 220 is a main aspect ratio converter (ARC), 230 is a PIP / POP circuit, 240 is a video switching circuit, 250 is a delay line / LPF (DLY), and 260 is Y / color difference A matrix circuit, 270 is a sharpness circuit (SHP), 275 is a sharpness control circuit (SHPC), and 280 is a sharpness blanking creation circuit (SHPB).

The operation of this circuit will be described in detail below.
When an RF television signal is input from the antenna 100, the distributor
The signal is distributed to the main tuner 120 and the sub-tuner 130 via 110. The main tuner 120 is a tuner for a main screen (main screen), and the sub tuner 130 is for a sub screen (sub screen). The following is a description of signal processing for the main screen.

The main tuner 120 outputs a video signal (composite video signal) from the video detection output. The composite video signal is input to the selector 140, which outputs the composite video signal including the video signal from the external video input terminal 155.
Select one video signal. Although the video signal and the audio signal are input at the same time, the audio is omitted in this description.

The composite video signal from selector 140 is Y / C
In the separation circuit 160, the luminance signal (Y signal) and the carrier chrominance signal (C
Signal). To perform Y / C separation, a BPF for C signal and a subcarrier trap for Y signal are usually used.
A one-dimensional filter, a two-dimensional filter using a delay line, a three-dimensional filter using a frame memory, and the like are used.

The C signal is color-demodulated by a color decoder 180 to output RY and BY color difference signals. Also, Y
From the signal, a horizontal synchronizing signal HD and a vertical synchronizing signal VD are separated and generated from a sync separation AFC circuit 190. The aspect ratio converter (ARC) 220 is provided for compressing the component signals such as Y, RY, and BY on the time axis. In this circuit, these component signals are A / D-converted by an A / D converter 221, stored once in a line memory (LM) 222, read out again, and D / A-converted by a D / A converter 223. The time axis is compressed by conversion. In this case, the data is read from the line memory 222 with a read clock having a frequency that is 4/3 times the frequency of the A / D and memory write clock, and D / A converted.

In this case, the write and read clocks are all output signals of the sync separation AFC circuit 190 for the main screen.
This is performed in synchronization with the HD signal and the VD signal. For example, a horizontal synchronization signal f _H (NTSC: 15.734264KHz) and then, the write clock and f _w, when the read clock and _{f R, f w = 13.5 MHz} = 858 xf H f R = 4/3 xf w = 18 the MHz = 1144 f _H.

As described above, the time axis can be compressed via the line memory 222, but when the time axis is compressed,
A portion having no video signal also occurs in a portion other than the horizontal blanking. The signal level of that part is usually a pedestal level (video clamp level) for the Y signal. Also, R-
The Y and BY signals are fixed at the color difference signal center level (clamp level).

The above-mentioned component (Y, RY, BY color difference signal) output signal is input to the switching circuit 240 and is clamped by the internal clamping circuit (CLP1) 241. Clock / timing generator (C) in the aspect ratio converter (ARC) 220
TG) 224, the horizontal sync signal HD from the sync separation AFC circuit 210.
The horizontal clamp signal CLP and the video period signal YS are generated from the horizontal synchronous signal HD and input to the switching circuit 240.

Next, signal processing of a sub-screen (sub-screen) for PIP / POP display will be described in detail. The sub-tuner 130, the selector 150, the Y / C separation circuit 170, the color decoder 200, and the sync separation AFC circuit 210 are the same as those of the main screen system, and the description is omitted. The PIP / POP display is a video signal that is different (or the same) from the main screen, and is usually 1/3 of the size of the main screen in both the vertical and horizontal directions. Will be displayed on top. Of course, the size of the screen is not limited to 1/3, but may be 1/2, 1/4, or the like. Also, multi-screen display is possible (however,
Movies are often limited to one screen.)

Component signals for PIP (Y, RY, B-
Y) is A / D converted by the A / D converter 231 and written to the frame memory 232. In this case, 1/3 thinning of the scanning lines and 1/3 thinning of the horizontal DOT are performed. At the time of writing, the signal is synchronized with the horizontal synchronization signal HD and the vertical synchronization signal HD from the synchronization signal AFC circuit 210. From the frame memory 232,
It is read out by the clock synchronized with the horizontal synchronization signal HD and the vertical synchronization signal HD from the sync separation AFC circuit 190 of the main screen, and D /
D / A is performed by the A converter 238. In this case, the clock timing generator 234 sends the write clock
_fw and the read clock f _R are output to the A / D converter 231, the frame memory 232, and the D / A converter 233 as shown in the figure.

Normally, the synchronization signals of the parent screen and the child screen do not match, so that when reading, the frame is synchronized to synchronize with the synchronization signal of the parent screen. Therefore, a frame memory (FM) 232 is required. From the PIP circuit 230, the frame-synchronized and image-compressed component signals (Y, RY, BY) for the sub-screen and YS indicating the range of the video signal of the sub-screen are displayed.
The signal is output, input to the switching circuit 240, and clamped by the internal clamp circuit (CLP2) 243. In this case, the clamp level is the same level as the parent screen, and no level difference occurs when the parent and child screens are combined.

Also, the part without the component signal is
As in the case of the main screen, the Y signal is at the pedestal level (clamp), and the RY and BY signals are at the center level (clamp). Next, the main screen is a cutout circuit (CUT1) 242, and the child screen is a cutout circuit (CUT2) 244.
Then, the component signals are cut out and combined according to the respective YS signals. However, since the YS signal of the main screen excludes the portion where the YS signal of the PIP exists, the inverter circuits 245 and A
Cut out circuit 242 after processing YS signal in ND circuit 246
To cut out the signal. At times other than cut out,
Each clamp signal level (the pedestal level for the Y signal and the center level for the RY and BY signals as described above).

Next, the Y signal is supplied to a sharpness circuit (SHP) 270.
Adds screen clarity with (user control)
Is output. The amount of sharpness is added by controlling the DC voltage with the variable volume VR (see FIG. 8) with the switch SW of the sharpness control circuit (SHPC) 275 connected to the A side (the switch SW is a conventional switch). Is not provided, and the output of the variable volume VR and the sharpness circuit 270 are directly connected, but are provided for switching with a sharpness blanking creation circuit 280 of the present invention described later. The B side and the sharpness / blanking generating circuit 280 are essential parts of the present invention and will be described later with reference to FIG. 8).

By the way, since a slight delay (about 150 to 200 ns) occurs in the sharpness circuit 270, RY and BY
Delay line or LPF to give the same amount of delay to the signal
(DLY) 250 is provided. Next, the RY and BY signals are input to the clamp circuit (CLP1) 261 in the Y / C color difference matrix circuit 260, where hint control (tint control) and color control (color level c) are performed.
ontrol) and input to the RGB matrix circuit 263. Reference numeral 290 denotes contrast control, 300 denotes luminance control, 310 denotes hue control, and 320 denotes color control.

On the other hand, the Y signal having passed through the sharpness circuit 270 is clamped by the clamp circuit
tness control), contrast control (contrast control)
After that, it is input to the RGB matrix circuit 263, and RY
And a matrix between the signal and the BY signal to obtain R, G, B signals. The R, G, B signals are amplified by a video amplifier and
Each is supplied to the RGB cathode of T and displayed on the CRT screen.

FIG. 4 is a detailed block diagram of the sharpness circuit shown in FIG. 3, and FIG. 5 is a signal waveform diagram at each point of the circuit of FIG. In FIG. 4, 271 and 272 are delay elements (transfer functions Z). 273, 275, 277 are addition circuits, and 274, 276 are multiplication circuits. Note that the multiplication circuit 274 is a fixed 1/2 times, and the multiplication circuit 276 gives a coefficient G, and this value is an amount determined by user control. Further, the transfer function is expressed as Z = e- ^Std . When the delay amount td is a Y signal of the NTSC system, td = 150 to 180 ns is effective in terms of screen definition. Here, e is a natural logarithm, and S is an operator of Laplace transform. Inputs Yin and Yout correspond to those of sharpness circuit 270 in FIG.

The signal waveform at each point in FIG. 4 will be described below with reference to FIG. Now, suppose that a video signal Yin having the illustrated waveform is given to point a (transfer function 1). The waveform at the point b is more delayed than the waveform at the point a by the delay amount td (15
0 to 180 ns) (transfer function Z). Further, the waveform at the point c has a delay amount 2td (300 to
360 ns) (transfer function Z ² ). The waveform at point d is obtained by adding the waveform at point a and the waveform at point c and halving the sum (transfer function (1 + Z ² ) / 2). The waveform at the point e becomes a second derivative waveform from the waveform at the point b and the waveform at the point d as shown in the figure (transfer function Z− (1 + Z ² ) / 2).
Are multiplied (G times) by the adder, added to the waveform at the point b by the adding circuit 277, and become the output waveform (Yout) at the point f (the transfer function Z −
G (Z - (1 + Z 2) / 2). The waveform at the point f is a video signal with high definition having preshoot / overshoot.

The waveform at the point f is changed by the delay circuit 271 to a
It is delayed by the delay amount td as compared with the waveform of the point. Therefore,
In the delay line 250 of FIG. 3, it is necessary to delay the RY and BY signals by the same amount. Here, when G = 0, the secondary differential amount added to the original signal becomes 0, and the video signal remains the original and becomes a signal with a delay amount of td. When G is negative, the rising edge becomes gentler than the edge of the original signal, and when G is positive, the edge rises. If G is too large, S / N deteriorates, overshoot becomes noticeable, and image quality deteriorates. When G is appropriate, there is an effect that the image can be clearly seen.

[0025]

FIG. 6 shows a screen of "normal mode display", in which white vertical lines due to sharpness are displayed at both ends of the screen. The sharpness effect is appropriate inside the video display section A other than both ends, but the white vertical lines at both ends of the section A are visually inappropriate.
In particular, when the luminance at both ends is high, the white vertical line is more emphasized and looks unsightly.

This vertical white line is generated for the following reason. That is, a predetermined voltage is applied to the control terminal T of the sharpness circuit 270 in FIG. 3 by the variable volume VR (see FIG. 8) of the sharpness control circuit 275 (in this case, the switch SW is connected to the A side). Sharpness is controlled for the entire screen. As a result, unnecessary white vertical lines are generated at both ends of the screen during normal mode display as shown in the figure.

Therefore, an object of the present invention is to provide a horizontal sharpness control so that sharpness at both ends of the screen is not performed (prohibited) with respect to the voltage applied to the sharpness control terminal.
The purpose is to remove vertical lines at both ends by giving a blanking signal.

[0028]

According to the present invention, a display screen has one display.
In a landscape television having an aspect ratio of 6: 9, an aspect ratio converter 220 for temporally compressing a received video signal in the horizontal direction, and a PIP circuit 23 for inserting a child screen into a main screen.
0, the aspect ratio converter 220 and the PIP circuit 230
And a sharpness circuit for selectively receiving a luminance signal from the PDP and increasing the sharpness of the screen and outputting a corrected luminance signal, the luminance signal from the aspect ratio converter 220 and the PIP circuit 230 being provided. Signal YS
Receiving the received signal, generates a sharpness blanking signal for inhibiting or reducing the sharpness effect for a non-signal period including the left and right edges of the displayed screen, and supplies the sharpness blanking signal to the sharpness control terminal of the sharpness circuit. The ranking creation circuit 280 and the sharpness
A sharpness control circuit 275 having a switch for switching between a sharpness blanking signal from a blanking creation circuit 280 and an output of a variable volume VR for applying a voltage to the sharpness control terminal is provided.

The above-mentioned sharpness blanking creation circuit
280 receives the luminance signal YS from the aspect ratio converter 220 at one input and receives the PIP circuit 230 at the other terminal.
OR gate 281 receiving a luminance signal from the first gate, a first open drain type buffer 282 receiving the output of the OR gate 281, a resistor 283 and a capacitor 284 for giving a time constant to the output of the first open drain type buffer. ,
It has a second open drain buffer 285 for receiving an output having a time constant, and a buffer transistor 287 for determining a high level value of the output of the second open drain buffer.

[0030]

FIG. 7 is a signal waveform diagram of the conventional (b, e, f) and the present invention (g, d ', f') shown in FIG. The waveform b (Yin ') corresponds to the waveform b in FIG. 5, and the input signal Yin in FIG. 5 is converted into a delay amount td (td = 150 to 180 ns).
This is a delayed signal. The waveform e is a second derivative waveform of the waveform b, and corresponds to the waveform e in FIG. The waveform f is a luminance signal output Yout, and corresponds to the waveform f in FIG. Waveform f
As is clear from FIG. 7, as a result of adding the second derivative waveform to the left and right ends, the overshoot at both ends of the screen is displayed. On the other hand, the amount of undershoot is less noticeable because black is added more than black.

In the present invention, a horizontal sharpness blanking signal like the waveform g in FIG. 7 is created and applied to the control signal input (conventionally DC) terminal of the sharpness circuit (G = 0 at L level). In this case, the second derivative waveform at both ends of the screen disappears as shown by the waveform d ', and a luminance signal output Yout' like the waveform f 'is obtained. As a result, unnecessary vertical lines at both ends of the screen are removed. A sharpness effect can be obtained in the screen excluding the part.

FIG. 8 is a detailed block diagram of a sharpness blanking creation circuit according to an embodiment of the present invention, and FIG. 9 is a waveform diagram of each part of the sharpness blanking creation circuit shown in FIG. In FIG. 8, 281 is an OR gate, 282 and 285 are open drain CMOS buffers,
283 is a resistor for time constant, 284 is a capacitor for time constant, 286
Is a pull-up resistor, and 287 is a buffer transistor. The changeover switch SW of the sharpness control circuit 275 is connected to the B side. 282 and 285 are usually CMOS buffers, and the threshold value Vth is about Vcc / 2.

As shown, one input of the OR gate 281 receives the YS signal from the aspect ratio conversion circuit 220, and the other input receives the YS signal from the PIP circuit 230. Also,
The output of the buffer 285 is connected to the B side of the changeover switch SW together with the emitter side of the transistor 287,
The base of the switch 287 is connected to the A side of the changeover switch SW.
The B side of the changeover switch SW is a sharpness circuit 27.
0 T terminal.

In the waveform diagram of FIG. 9, waveforms af are shown in FIG.
Are similar to the waveforms a to f. Therefore, the description of these waveforms is omitted, and the waveforms after the waveform g will be described. Waveform g is an output waveform from the OR gate. The time position of the waveform g coincides with the component signal (Y, color difference signal) of the switching circuit 240. The rising edge of the waveform h is integrated by the time constant of the resistor 283 and the capacitor 284, and a delay of 2td occurs near the threshold value Vth (= about Vcc / 2), but the delay of the falling edge is small. The waveform i is the output of the buffer 285, and the H level value is determined according to the emitter voltage of the transistor 287.

When the waveform i is applied to the sharpness control terminal T via the B side of the changeover switch SW, the output waveform Yout becomes as shown in FIG.
Thus, the second derivative waveforms at both ends of the screen are not added, and therefore, the white vertical lines at the left and right ends of the screen disappear.

[0036]

As described above, according to the present invention,
By providing a sharpness / blank signal, the sharpness at both ends of the screen can be controlled, so that the white vertical lines at both ends of the screen, which conventionally deteriorated the screen quality, can be effectively removed.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram of a display mode of a landscape TV, and FIG.
Indicates full mode display, (B) indicates normal mode display,
(C) is an explanatory view of a PIP / POP display.

FIG. 2 is a block diagram (part 1) of a horizontal TV signal processing system.

FIG. 3 is a block diagram (part 2) of a horizontally long TV signal processing system.

FIG. 4 is a detailed block diagram of a sharpness circuit shown in FIG. 3;

FIG. 5 is a signal waveform diagram at each point of the circuit in FIG. 4;

FIG. 6 is an explanatory diagram of a screen of a normal mode display.

FIG. 7 is an explanatory diagram of signal waveform diagrams (g, d ′, f ′) of the related art (b, e, f) and the present invention in the display of FIG. 6;

FIG. 8 shows a sharpness image according to an embodiment of the present invention.
FIG. 3 is a detailed block diagram of a blanking creation circuit.

9 is a waveform diagram of each part of the sharpness / blanking generating circuit shown in FIG. 8;

[Explanation of symbols]

 100… RF input antenna 110… Antenna distributor (DV) 120… Main tuner (I / F detection: IF1) 130… Sub tuner (I / F detection: IF2) 140… Main video signal selector (SEL1) 150… Sub video signal selector (SEL2) SS ... Selection signal 155 ... External video input terminal (EXT) 160 ... Main video Y / C separation circuit (Y / C1) 170 ... Sub video Y / C separation circuit (Y / C2) 180 … Main color decoder (D1) 190… Main sync separation AFC circuit (AFC1) 200… Sub color decoder (D2) 210… Sub sync separation AFC circuit (AFC2) 220… Main aspect ratio converter (ARC) 230… PIP / POP circuit 240 Video switching circuit 250 Delay line / LPF (DLY) 260 Y / color difference matrix circuit 270 Sharpness circuit (SHP) 275 Sharpness control circuit (SHPC) 280 Sharpness blanking creation circuit (SHPB) )

Claims (2)

[Claims] 1. An aspect ratio converter for horizontally compressing a received video signal in a horizontal direction in a landscape television having a display screen having an aspect ratio of 16: 9, a PIP circuit for inserting a child screen into a main screen, A TV signal processing circuit having at least a sharpness circuit for selectively receiving a luminance signal from the aspect ratio converter and a PIP circuit to increase the sharpness of a screen and outputting a corrected luminance signal; And a brightness signal from the PIP circuit, and generates a sharpness blanking signal for inhibiting or reducing the sharpness effect in a non-signal period including the left and right edges of the displayed screen, and controls the sharpness of the sharpness circuit. A sharpness blanking creation circuit to be supplied to the terminal, and the sharpness blanking creation circuit TV signal processing circuit characterized by comprising: a sharpness blanking signal al, and a sharpness control circuit having a switch for switching the output of the variable volume which gives a voltage to the sharpness control terminal. 2. The sharpness / blanking generating circuit includes: an OR gate that receives a luminance signal from the aspect ratio converter at one input and a luminance signal from the PIP circuit at another terminal; A first open drain buffer receiving an output of the first open drain buffer, a resistor and a capacitor for providing a time constant to the output of the first open drain buffer, a second open drain buffer receiving an output having a time constant, The buffer transistor according to claim 1, further comprising: a buffer transistor for determining a high level value of an output of the second open drain type buffer.
V signal processing circuit.