JPH10261802A - Thin film transistor array substrate and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make a thin film transistor using a glass substrate applicable to a large-screen, high-density, and highprecision liquid crystal display device by eliminating the occurrence of breakage of the glass substrate, preventing the contamination of a channel layer with an impurity from the glass substrate, and then, improving the characteristics of the transistor and reducing the cost of the transistor. SOLUTION: The deterioration of characteristics of a p-Si(polycrystalline) TFT(thin film transistor) 10 is prevented by preventing the mixing of an impurity, such as sodium (Na) ions, etc., emitted from a glass substrate 11 in the TFT 10 by forming a barrier layer 13 formed by doping a silicon oxide (SiO2 ) film which does not cause any stress between the film and the substrate 11 with phosphorus(P) ions between the substrate 11 and the TFT 10 and trapping the impurity.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a thin film transistor array substrate having a thin film transistor formed on a glass substrate and a method for manufacturing the thin film transistor array substrate.

[0002]

2. Description of the Related Art In recent years, polycrystalline silicon (hereinafter referred to as p-type) has been used as a switching element in a pixel portion of an active matrix type liquid crystal display device realizing a large screen, a high density, and a high definition, or as a driving circuit for a switching device in a pixel portion. -Si
Abbreviated. ) As a channel layer (hereinafter, abbreviated as TFT) is frequently used.

In such a TFT, it is generally said that the use of high-purity p-Si containing as little impurities as possible leads to an improvement in TFT characteristics. In order to reduce the cost, a substrate on which a TFT is formed is usually formed of an inexpensive glass substrate. However, this glass substrate is mixed with various impurities such as sodium (Na), and these impurities contaminate the channel layer made of p-Si, which has a problem of deteriorating the performance of the TFT.

Therefore, conventionally, a silicon nitride (SiNx) film or a silicon oxide (Si
A barrier layer made of an O ₂ ) film or the like is provided to mainly block an alkali metal such as sodium (Na) which greatly affects the reliability of the TFT, thereby preventing contamination of the channel layer.

However, in a silicon nitride (SiNx) film, although the diffusion coefficient of sodium (Na) is very small and the function of blocking sodium (Na) is good, a large stress is applied to the glass substrate. There is a concern that cracks may be generated due to distortion caused by heating during the manufacturing process and the glass substrate may be broken. On the other hand, a silicon oxide (SiO ₂ ) film has a problem that although a stress does not occur between the film and the glass substrate, the diffusion coefficient of sodium (Na) is large and sodium (Na) cannot be effectively blocked. doing.

Conventionally, as shown in FIG. 9, a silicon nitride (SiNx) film 2 and a silicon oxide (SiO ₂ ) film 3
Are stacked to form a barrier layer 4, and then a TFT 8 having a channel layer 6 made of p-Si and a gate electrode 7 is formed to block impurities.

[0007]

However, although the conventional silicon nitride (SiNx) film of the barrier layer effectively blocks sodium (Na), it does not cause cracks and damages the glass substrate. In order to prevent this, a sufficient thickness cannot be obtained, and the blocking effect of sodium (Na) is reduced accordingly. On the other hand, the glass substrate generally has a very high sodium (Na) content,
When a glass substrate is used, silicon nitride (SiN
x) Even if a silicon oxide (SiO ₂ ) film is further laminated on the film, the effect of blocking impurities cannot be sufficiently obtained, and p-SiT
The problem that the characteristics of the FT are deteriorated still remains.

In view of the above, the present invention has been made to solve the above-mentioned problems. In a TFT using a low-cost glass substrate, contamination of the TFT by impurities from the glass substrate is surely prevented, the characteristics of the TFT are improved, and the glass substrate is improved. The glass substrate is prevented from being broken without causing cracks due to the distortion of the glass, and the price is further reduced by improving the production yield, and as a result, as a driving element of a large-screen, high-density, high-definition liquid crystal display device. It is an object of the present invention to provide a thin film transistor array substrate and a method for manufacturing the thin film transistor array substrate that can be applied.

[0009]

According to the present invention, there is provided a thin film transistor array substrate comprising a glass substrate and a semiconductor layer laminated immediately above a barrier layer on a glass substrate.
The barrier layer is formed of a mixed oxide of boron (B) and phosphorus (P) or a silicon oxide (SiO ₂ ) film containing phosphorus (P) ions.

According to another aspect of the present invention, there is provided a method of manufacturing a thin film transistor array substrate, comprising: forming a barrier layer on a glass substrate; and laminating a semiconductor layer immediately above the barrier layer to form a thin film transistor. Forming a silicon oxide (SiO ₂ ) film on the glass substrate, and doping a mixed ion of boron (B) and phosphorus (P) or phosphorus (P) ion into the silicon oxide (SiO ₂ ) film; And after forming the barrier layer, the semiconductor layer is formed immediately above the barrier layer to form the thin film transistor. According to the present invention, a silicon oxide (SiO ₂ ) film containing mixed ions of boron (B) and phosphorus (P) or phosphorus (P) ions is used as a barrier layer to form a barrier layer. By avoiding stress between them and efficiently blocking impurities, a TFT having good characteristics without contamination by impurities can be obtained, and furthermore, there is no fear of destruction of the glass substrate and the production yield can be reduced. Improve T
It is an object of the present invention to further reduce the price of an FT and to enable application to a drive element of a large-screen, high-density, high-definition liquid crystal display device.

[0011]

FIG. 1 is a block diagram showing an embodiment of the present invention.
This will be described with reference to FIGS. FIG. 1 shows a p-Si TFT 1
1A, a silicon oxide (SiO ₂ ) film 12 having a thickness of 2000 Å was formed on a glass substrate 11 as shown in FIG. 1A, and then a phosphine gas (PH ₃ ) was supplied by an ion doping apparatus. Used, glass substrate 11
Projected range (Rp) at 500 Angstroms from
With an acceleration voltage of 300 keV and a dose of 5
The silicon oxide (SiO ₂ ) film 12 is doped with phosphorus (P) ions at E + 14 cm −2 to form a barrier layer 13 having a phosphorus (P) concentration distribution shown in FIG. Thereby, the high ion concentration portion 1 near the glass substrate 11 of the barrier layer 13 is formed.
3a shows that the concentration distribution of phosphorus (P) is 1E + 18 atoms / cc.
On the other hand, the low ion concentration portion 13b of the barrier layer 13 near the surface where the p-Si TFT 10 is formed has a phosphorus (P) concentration distribution of 1E + 17 atoms / cc or less.

Thereafter, as shown in FIG. 1C, the barrier layer 13 is formed.
An amorphous silicon (hereinafter abbreviated as a-Si) film is formed thereon, the a-Si film is crystallized by laser annealing, and a p-Si film 14 is formed, followed by patterning. Then normal pressure Chemical-Vapor-Dep
By the position (hereinafter abbreviated as CVD) method,
As shown in FIG. 1D, a molybdenum tungsten (MoW) film is formed to a thickness of 2000 Å on a gate insulating film 16 made of a silicon oxide (SiO ₂ ) film.
Further, patterning is performed to form a gate electrode 17 as shown in FIG.

Next, as shown in FIG.
Using a mask as a mask, phosphine gas (PH3) is used to dope the patterned p-Si film 14 with phosphorus (P) ions, and the impurity high concentration regions 20a and 20b are formed on both sides of the p-Si film 14 with the channel layer 18 interposed therebetween. Form. Further, after forming an interlayer insulating film 21 by a normal pressure CVD method, a contact hole is formed, and as shown in FIG. 1 (g), after forming an aluminum (Al) film, the signal lines 22 and 23 are etched.
Is formed, and the p-Si TFT 10 is manufactured. In the barrier layer 13 of the p-Si TFT 10 thus formed, phosphorus (P) ions contained in silicon oxide (SiO ₂ ) enter the network structure of silicon oxide (SiO ₂ ), and phosphorus (P) and oxygen From the affinity difference with (O), the negatively charged oxygen (O) primitive becomes sodium (Na +) due to Coulomb interaction
Trap ions. Thus, the diffusion of sodium (Na) ions from the glass substrate 11 to the p-Si side is prevented.

When the concentration distribution was measured to check the blocking state of sodium (Na) ions in the barrier layer 13 of the p-Si TFT 10, as shown in FIG. 3, the concentration distribution was higher than that of the low ion concentration portion 13b. It was found that the sodium (Na) ion concentration in 13a was remarkably high and a sufficient blocking effect was achieved.

According to this structure, when a low-cost glass substrate 11 is used, silicon oxide doped with phosphorus (P) ions is provided between the glass substrate 11 and the channel layer 18 made of p-Si. By forming the (SiO ₂ ) film 12 as the barrier layer 13, sodium (Na +) ions can be trapped in the barrier layer 13, and sodium (Na) ions emitted from the glass substrate 11 diffuse to the p-Si side. Can be prevented, and a p-Si TFT having good characteristics without contamination by impurities can be obtained. Moreover, by using a silicon oxide (SiO ₂ ) film which does not generate a large stress between the glass substrate 11 and the silicon nitride (SiNx) which is conventionally suitable for the block of impurities, cracks are generated by heating in the manufacturing process. And the risk of glass substrate destruction is reduced.
-It is possible to further reduce the price of the SiTFT 10 and to apply it to a driving element of a large-screen, high-density, high-definition liquid crystal display device.

Moreover, the p-Si TFT 10 of the barrier layer 13
In the low ion concentration portion 13 on the side where is formed, since the concentration distribution of phosphorus (P) is reduced to 1E + 17 atoms / cc or less, phosphorus (P) ions doped into the silicon oxide (SiO ₂ ) film 12 The p-SiTFT 10 is not affected and a better characteristic can be obtained.

Next, the present invention will be described with reference to a second embodiment shown in FIGS. In this embodiment, the first
In the second embodiment, the same components as those in the first embodiment are denoted by the same reference numerals except for the difference in the method of manufacturing the barrier layer, and the description thereof is omitted. That is, in this embodiment, a phosphorus (P) -doped silicon oxide (SiO ₂ ) film having a concentration of 1E + 21 atoms / cc is formed on a glass substrate 11 as shown in FIG.
An undoped silicon oxide (SiO 2) film is formed to a thickness of 2000 Å, has a phosphorus (P) concentration distribution shown in FIG. 5, and has a high ion concentration portion 27a and a low ion concentration portion 27b. Is formed.

Thereafter, FIG. 1C of the first embodiment is used.
1F, a p-Si film 14 is patterned on the barrier layer 27, a gate insulating film 16 is formed, and a gate electrode 17 is provided. Doped with phosphorus (P) ions into the channel layer 18
High impurity concentration regions 20a on both sides of the p-Si film 14
20b is formed. Further, signal lines 22 and 23 are formed,
As shown in FIG. 6, a p-Si TFT 28 is completed on a glass substrate 11 with a two-layer barrier layer 27 interposed therebetween.

In the p-Si TFT 28 thus constructed, as in the first embodiment, the primordial oxygen (O) in the barrier layer 27 is changed to sodium (Na) by Coulomb interaction.
+) Ions can be trapped, and diffusion of sodium (Na) ions emitted from the glass substrate 11 to the p-Si side can be prevented.

With this configuration, sodium (Na +) ions can be trapped particularly in the high ion concentration portion 27 a of the barrier layer 27, and sodium (Na) ions emitted from the glass substrate 11 can be trapped on the p-Si side. P-Si TFT which can prevent diffusion and has good characteristics without contamination by impurities
28 are obtained. Moreover, by using a silicon oxide (SiO ₂ ) film that does not generate a large stress between the glass substrate 11 and the glass substrate 11, there is no fear of the glass substrate being broken, and the p-Si TFT 28 can be further reduced by improving the manufacturing yield. The present invention can be applied to a driving element of a large-screen, high-density, high-definition liquid crystal display device at a high price.

In addition, the barrier layer 27 has a high ion concentration portion 27.
a and a low ion concentration portion 27b.
Since the low ion concentration portion 27b is provided on the side on which the FT 28 is formed, phosphorus (P) ions in the barrier layer 27 do not affect the p-Si TFT 28, and better characteristics can be obtained.

Next, the present invention will be described with reference to a third embodiment shown in FIGS. In this embodiment, the first
In the second embodiment, the same components as those in the first embodiment are denoted by the same reference numerals except for the difference in the method of manufacturing the barrier layer, and the description thereof is omitted. That is, in the present embodiment, as shown in FIG. 7, a phosphorus (P) -doped silicon oxide (SiO ₂ ) film having a concentration of 1E + 21 atoms / cc is formed on a glass substrate 11 by 2,000.
The barrier layer 30 is formed to a thickness of Å. Thereafter, the p-Si film 1 is formed on the barrier layer 30 in the same manner as shown in FIGS. 1C to 1F of the first embodiment.
4 is patterned and a gate insulating film 16 is formed, and a gate electrode 17 is provided. Using this as a mask, phosphorus (P) ions are doped to form a high impurity on both sides of the p-Si film 14 with the channel layer 18 interposed therebetween. The concentration regions 20a and 20b are formed. Further, signal lines 22 and 23 are formed, and a p-Si TFT 31 is completed on the glass substrate 11 via a barrier layer 30 having a two-layer structure of high concentration and low concentration as shown in FIG. In the −Si TFT 31, as in the first embodiment, the oxygen (O) primitive in the barrier layer 30 traps sodium (Na +) ions due to Coulomb interaction, and the sodium (Na) emitted from the glass substrate 11. 3.) It is possible to prevent the diffusion of ions to the p-Si side, and obtain a p-Si TFT 31 having good characteristics without contamination by impurities. Moreover, by using a silicon oxide (SiO ₂ ) film which does not generate a large stress between the p-Si TFT 31 and the glass substrate 11, there is no fear of the glass substrate being broken, and the p-Si TFT 31 is further improved by improving the production yield. The present invention can reduce the price and can be applied to a driving element of a large-screen, high-density, high-definition liquid crystal display device.

The present invention is not limited to the above embodiment, but can be modified without departing from the spirit thereof. For example, the substance contained in the silicon oxide (SiO ₂ ) film is phosphorous. Not limited to (P) ions, boron (B) or the like may be used, and the content is arbitrary. However, in order to trap impurities such as sodium (Na) ions more reliably, the concentration of the contained material Is preferably not less than 1E + 18 atoms / cc, and in order to reduce the effect of the contained substance on the TFT, the concentration of the contained substance must be 1E + 17 atoms / cc.
It is preferable that: Also, the thickness of the barrier layer, etc.
Any range is possible as long as impurities can be reliably trapped and the glass substrate is hardly damaged. Furthermore, diborane (B ₂ H ₆ ) or the like may be used as a gas for doping mixed ions of boron (B) and phosphorus (P) or phosphorus (P) ions in a silicon oxide (SiO ₂ ) film. .

[0024]

As described above, according to the present invention, in a TFT using a glass substrate, silicon oxide (SiO _{2) is used} as a barrier layer for preventing impurities from entering the semiconductor channel layer from the glass substrate. ) Silicon oxide (Si) containing impurities such as mixed ions of boron (B) and phosphorus (P) or phosphorus (P) ions in the film
By using the O ₂ ) film, the contamination of impurities from the glass substrate into the channel layer is reliably prevented and the characteristics of the TFT are improved, while the silicon oxide (SiO ₂ ) film causes stress between the glass substrate and the glass substrate. No cracks are caused by distortion due to temperature rise during the manufacturing process, and the glass substrate is not broken like the conventional silicon nitride (SiNx) film. It can be applied to the drive element of a large-screen, high-density, high-definition liquid crystal display device.
It is possible to realize a high-definition active matrix type liquid crystal display device.

[Brief description of the drawings]

FIG. 1 is a schematic explanatory view showing a manufacturing process of a p-Si TFT according to a first embodiment of the present invention. FIG. 1 (a) shows a state in which a silicon oxide (SiO ₂ ) film is formed on a glass substrate. FIG. 3B is an explanatory diagram showing the state of the silicon oxide (Si).
FIG. 3 is an explanatory view showing a state in which phosphorus (P) ions are doped into an O ₂ ) film, (c) is an explanatory view showing a state in which a p-Si film is formed on the barrier layer, and (d) is an explanatory view. It is an explanatory view showing a state where a gate insulating film is formed, (e) is an explanatory view showing a state where a gate electrode is formed, and (f) is an explanatory view showing a state where a gate electrode is formed.
FIG. 2 is an explanatory view showing a state in which a high impurity concentration region is formed on both sides of a channel layer. FIG.
FIG. 3 is an explanatory view showing a state in which a SiTFT is formed.

FIG. 2 is a graph showing a phosphorus (P) concentration distribution of a barrier layer according to the first embodiment of the present invention.

FIG. 3 is a graph showing a blocking state of sodium (Na) ions in the barrier layer according to the first embodiment of the present invention.

FIG. 4 shows a p-Si TFT according to a second embodiment of the present invention.
FIG. 3 is an explanatory view showing a state in which a barrier layer is formed on a glass substrate.

FIG. 5 is a graph showing a phosphorus (P) ion concentration distribution of a barrier layer according to a second embodiment of the present invention.

FIG. 6 is a view showing a state in which p
FIG. 4 is an explanatory diagram showing a state where a -Si TFT is formed.

FIG. 7 shows a p-Si TFT according to a third embodiment of the present invention.
FIG. 3 is an explanatory view showing a state in which a barrier layer is formed on a glass substrate.

FIG. 8 shows a case where p is placed on a glass substrate according to the third embodiment of the present invention.
FIG. 4 is an explanatory diagram showing a state where a -Si TFT is formed.

FIG. 9 is a schematic explanatory view showing a p-Si TFT of a conventional device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 ... p-SiTFT 11 ... glass substrate 12 ... silicon oxide (SiO2) film 13 ... barrier layer 13a ... high ion concentration part 13b ... low ion concentration part 14 ... p-Si film 16 ... gate insulating film 17 ... gate electrode 18 ... Channel layer

Claims (5)

[Claims] 1. In a thin film transistor array substrate comprising a semiconductor layer laminated on a glass substrate immediately above a barrier layer, the barrier layer is formed by a mixed ion of boron (B) and phosphorus (P) or phosphorus (P). A thin film transistor array substrate comprising a silicon oxide (SiO ₂ ) film containing ions. 2. A silicon oxide (SiO ₂ ) film contains
The mixed ion of boron (B) and phosphorus (P) or at least a part of the concentration distribution of phosphorus (P) ion is 1E + 1
2. The thin film transistor array substrate according to claim 1, wherein said substrate is at least 8 atoms / cc. 3. A silicon oxide (SiO ₂₎ film is mixed ion or phosphorus (P) ions at a concentration distribution said silicon oxide, boron containing (B) and phosphorus (P) (SiO ₂₎
3. The thin film transistor array substrate according to claim 1, wherein the concentration distribution differs in the thickness direction of the film, and the concentration distribution is higher on the glass substrate side than on the semiconductor layer side. 4. A silicon oxide (SiO ₂ ) film contains
The concentration distribution of boron (B) and phosphorus (P) mixed ions or phosphorus (P) ions is 1E + on the glass substrate side.
18 atoms / cc or more, and 1E + 17 on the semiconductor layer side.
4. The thin film transistor array substrate according to claim 3, wherein the ratio is not more than atoms / cc. 5. A method for manufacturing a thin film transistor array substrate, comprising: forming a barrier layer on a glass substrate; and laminating a semiconductor layer immediately above the barrier layer to form a thin film transistor. ₂ ) a step of forming a film, and a step of doping a mixed ion of boron (B) and phosphorus (P) or phosphorus (P) ion into the silicon oxide (SiO ₂ ) film to form the barrier layer. A method for manufacturing a thin film transistor array substrate, comprising: forming the semiconductor layer immediately above the barrier layer after forming the thin film transistor;