JPH10261741A - Semiconductor device and manufacture of semiconductor device - Google Patents
Semiconductor device and manufacture of semiconductor deviceInfo
- Publication number
- JPH10261741A JPH10261741A JP9066737A JP6673797A JPH10261741A JP H10261741 A JPH10261741 A JP H10261741A JP 9066737 A JP9066737 A JP 9066737A JP 6673797 A JP6673797 A JP 6673797A JP H10261741 A JPH10261741 A JP H10261741A
- Authority
- JP
- Japan
- Prior art keywords
- insulating resin
- inner lead
- wire
- sealing
- connection portion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は，プリント基板上に
半導体素子を直接取り付けた，いわゆるチップオンボー
ド（Chip On Board）タイプの半導体装置，及びその製
造方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a so-called chip-on-board type semiconductor device having a semiconductor element directly mounted on a printed circuit board, and a method of manufacturing the same.
【０００２】[0002]
【従来の技術】一般に，従来のチップオンボードタイプ
の半導体装置は，図１０に示したように，絶縁樹脂基板
１０１の上に，接着材１０２を塗布した後，半導体素子
１０３をボンディングし，その後半導体素子１０３にお
けるパッドなどの所定の接続部１０４と，絶縁樹脂基板
１０１上に形成したインナーリード１０５における所定
の接続部との間を接合用金属細線１０６で配線し，その
後適宜の成形金型材をはめ，未だ硬化しておらず流動性
を有する，例えば溶融状態の封止用絶縁樹脂１０７を，
当該成形金型内のキャビティに注入して封止した構造を
有している。2. Description of the Related Art In general, in a conventional chip-on-board type semiconductor device, as shown in FIG. 10, an adhesive 102 is applied on an insulating resin substrate 101, and then a semiconductor element 103 is bonded. A thin metal wire 106 for bonding is used to wire between a predetermined connection portion 104 such as a pad of the semiconductor element 103 and a predetermined connection portion of an inner lead 105 formed on the insulating resin substrate 101, and then an appropriate molding die material is formed. The sealing insulating resin 107 which has not been cured yet and has fluidity, for example, in a molten state,
It has a structure in which it is injected into a cavity in the molding die and sealed.
【０００３】[0003]
【発明が解決しようとする課題】しかしながらこのよう
な従来のチップオンボードタイプの半導体装置において
は，溶融状態の封止用絶縁樹脂１０７の金型内への注入
によるモールディング成形時に，接合用金属細線１０６
が，樹脂の注入圧力の影響で押されたり，流れてしまい
（いわゆるワイヤ流れ），インナーリード１０５から剥
がれたり，断線するおそれがある。However, in such a conventional chip-on-board type semiconductor device, when molding is performed by injecting a molten sealing insulating resin 107 into a mold, a thin metal wire for bonding is used. 106
May be pushed or flown under the influence of the resin injection pressure (so-called wire flow), and may be peeled off from the inner lead 105 or disconnected.
【０００４】本発明はかかる点に鑑みてなされたもので
あり，前記した封止用絶縁樹脂によるモールディングの
際にも，接合用金属細線が基板のインナーリードから剥
がれたり，断線することのないチップオンボードタイプ
の半導体装置，及び当該半導体装置の製造方法を提供し
て，前記課題の解決を図ることを目的としている。[0004] The present invention has been made in view of the above point, and a chip in which a thin metal wire for bonding is not peeled off or disconnected from an inner lead of a substrate even during molding with the insulating resin for sealing described above. It is an object of the present invention to provide an on-board type semiconductor device and a method for manufacturing the semiconductor device to solve the above-mentioned problem.
【０００５】[0005]
【課題を解決するための手段】前記目的を達成するた
め，請求項１によれば，基板上の半導体素子における所
定の接続部と当該基板に形成されたインナーリードにお
ける所定の接続部とが，例えば金属製細線などの線材に
よって電気的に接続され，さらにこれら半導体素子，イ
ンナーリード及び線材が，封止用絶縁樹脂によって外側
から封止された半導体装置において，少なくとも前記線
材におけるインナーリードとの接続部が，前記封止用絶
縁樹脂とは異なった材質の絶縁樹脂で被覆されているこ
とを特徴とする，半導体装置が提供される。According to a first aspect of the present invention, a predetermined connection portion of a semiconductor element on a substrate and a predetermined connection portion of an inner lead formed on the substrate are provided. For example, in a semiconductor device in which the semiconductor element, the inner lead, and the wire are electrically connected by a wire such as a thin metal wire, and the semiconductor element, the inner lead, and the wire are sealed from the outside with a sealing insulating resin, at least the connection with the inner lead of the wire A semiconductor device is provided, wherein the portion is covered with an insulating resin of a different material from the insulating resin for sealing.
【０００６】このような構造を持った半導体装置によれ
ば，線材におけるインナーリードとの接続部が，封止用
絶縁樹脂とは異なった材質の絶縁樹脂で被覆されている
ので，製造する場合，線材とインナーリードとの接続部
を，封止用絶縁樹脂とは異なった粘度の樹脂で予め被覆
することができる。また被覆の際にも成形金型のキャビ
ティ内への流動性を持った樹脂の注入とは異なった手法
を採用することができ，線材とインナーリードとの接続
部に過度の圧力をかけずに当該接続部を被覆することが
できる。なお線材とインナーリードとの接続部のみなら
ず，線材全体や線材と半導体素子との接続部をも，封止
用絶縁樹脂とは異なった樹脂で被覆してもよい。そうす
れば，線材自体の保護，線材と半導体素子の所定の接続
部（例えばパッド）との接続部分をも保護できる。封止
用絶縁樹脂とは異なった樹脂としては，例えばエポキシ
樹脂を用いることができる。According to the semiconductor device having such a structure, the connection portion of the wire with the inner lead is covered with an insulating resin different from the sealing insulating resin. The connecting portion between the wire and the inner lead can be coated in advance with a resin having a viscosity different from that of the insulating resin for sealing. Also, during coating, a method different from injection of resin with fluidity into the cavity of the molding die can be adopted, without applying excessive pressure to the connection between the wire and the inner lead. The connection can be covered. Not only the connection between the wire and the inner lead but also the entire wire and the connection between the wire and the semiconductor element may be covered with a resin different from the sealing insulating resin. This can protect the wire itself and also protect the connection between the wire and a predetermined connection portion (for example, a pad) of the semiconductor element. As a resin different from the insulating resin for sealing, for example, an epoxy resin can be used.
【０００７】このような構造を有する半導体装置におい
て，請求項２に記載したように，前記インナーリードに
おける所定の接続部が，前記基板に形成された凹部内に
形成され，この凹部内に，封止用絶縁樹脂とは異なった
絶縁樹脂が充填されている構造としてもよい。In the semiconductor device having such a structure, a predetermined connection portion of the inner lead is formed in a recess formed in the substrate, and a sealing portion is formed in the recess. A structure in which an insulating resin different from the stop insulating resin is filled may be used.
【０００８】この請求項２に記載したような構成によれ
ば，封止用絶縁樹脂とは異なった絶縁樹脂を充填する場
合，粘度の低い絶縁樹脂を凹部内に流し込むようにして
充填させることができ，封止用絶縁樹脂とは異なった絶
縁樹脂の材質の選択の幅が広がり，また当該絶縁樹脂が
他の領域にまで拡散することを防止できる。According to the second aspect of the present invention, when the insulating resin different from the sealing insulating resin is filled, the insulating resin having a low viscosity can be filled by flowing into the recess. As a result, the range of choice of the material of the insulating resin different from the sealing insulating resin is widened, and the insulating resin can be prevented from diffusing into other regions.
【０００９】請求項３によれば，基板上の半導体素子に
おける所定の接続部と当該基板に形成されたインナーリ
ードにおける所定の接続部とを線材によって電気的に接
続し，次いでこれら半導体素子，インナーリード及び線
材を封止用絶縁樹脂によって外側から封止し，その後こ
の封止用絶縁樹脂を硬化させて半導体装置を製造する方
法において，前記封止用絶縁樹脂によって封止する前
に，少なくとも前記線材におけるインナーリードとの接
続部を，液状の絶縁樹脂で被覆して硬化させることを特
徴とする，半導体装置の製造方法が提供される。According to the third aspect, a predetermined connection portion of the semiconductor element on the substrate is electrically connected to a predetermined connection portion of the inner lead formed on the substrate by a wire. In a method of manufacturing a semiconductor device by sealing a lead and a wire from the outside with a sealing insulating resin, and thereafter curing the sealing insulating resin, at least before the sealing with the sealing insulating resin, A method for manufacturing a semiconductor device is provided, wherein a connection portion of a wire with an inner lead is covered with a liquid insulating resin and cured.
【００１０】この製造方法によれば，封止用絶縁樹脂に
よって封止する前に，少なくとも前記線材におけるイン
ナーリードとの接続部を，液状の絶縁樹脂で被覆して硬
化させるようにしたので，当該接続部は，流動性を有す
る絶縁樹脂の注入の際，注入圧力の影響を受けず，保護
される。液状の絶縁樹脂としては，エポキシ樹脂を用い
ることができる。According to this manufacturing method, at least the connection portion of the wire with the inner lead is covered with a liquid insulating resin and cured before sealing with the sealing insulating resin. The connection part is protected without being affected by the injection pressure when the fluid insulating resin is injected. Epoxy resin can be used as the liquid insulating resin.
【００１１】また請求項４によれば，基板上の半導体素
子における所定の接続部と当該基板に形成されたインナ
ーリードにおける所定の接続部とを線材によって電気的
に接続し，次いでこれら半導体素子，インナーリード及
び線材を封止用絶縁樹脂によって外側から封止して半導
体装置を製造する方法において，前記基板上に凹部を形
成する工程と，前記凹部に導電層を形成してインナーリ
ードの所定の接続部を構成する工程と，前記半導体素子
における所定の接続部とインナーリードの所定の接続部
とを線材によって電気的に接続する工程と，前記線材に
おけるインナーリードとの接続部を，液状の絶縁樹脂で
被覆して硬化させる工程と，前記液状の絶縁樹脂の硬化
後，前記半導体素子，インナーリード及び線材を封止用
絶縁樹脂によって外側から封止する工程とを有すること
を特徴とする，半導体装置の製造方法が提供される。According to a fourth aspect of the present invention, a predetermined connection portion of the semiconductor element on the substrate and a predetermined connection portion of the inner lead formed on the substrate are electrically connected to each other by a wire. In a method of manufacturing a semiconductor device by sealing an inner lead and a wire from the outside with a sealing insulating resin, a step of forming a concave portion on the substrate, and a step of forming a conductive layer in the concave portion to form a predetermined portion of the inner lead. Forming a connecting portion, electrically connecting a predetermined connecting portion of the semiconductor element to a predetermined connecting portion of the inner lead by a wire, and connecting the connecting portion of the wire to the inner lead with a liquid insulating material. A step of coating and curing with a resin, and after curing of the liquid insulating resin, the semiconductor element, the inner lead and the wire are sealed with a sealing insulating resin. Characterized by a step of sealing from the side, a method of manufacturing a semiconductor device is provided.
【００１２】この請求項４の半導体装置の製造方法によ
れば，まず基板に形成した凹部内にインナーリードの所
定の接続部を構成し，次いで当該接続部に線材を接続
し，この接続部を，液状の絶縁樹脂で被覆して硬化させ
るようにしたので，例えば当該接続部は，絶縁樹脂によ
って凹部内で埋没させることができる。したがって，そ
の後，金型をはめて流動性を有する絶縁樹脂をこの金型
内に注入してモールディングしても，当該接続部は注入
圧力の影響を受けず保護される。しかも接続部を絶縁樹
脂で被覆する場合，接続部は凹部内に位置しているか
ら，粘度の低い液状の絶縁樹脂であっても，周囲に流れ
たりせず，かかる被覆作業が好適に実施できる。この場
合の液状の絶縁樹脂としては，例えばエポキシ樹脂を用
いることができる。According to the method of manufacturing a semiconductor device of the fourth aspect, first, a predetermined connection portion of the inner lead is formed in the recess formed in the substrate, and then a wire is connected to the connection portion, and the connection portion is connected to the connection portion. Since the connection portion is cured by coating with a liquid insulating resin, for example, the connection portion can be buried in the concave portion by the insulating resin. Therefore, even if the mold is inserted and the insulating resin having fluidity is injected into the mold and then molded, the connection portion is protected without being affected by the injection pressure. In addition, when the connecting portion is covered with the insulating resin, the connecting portion is located in the concave portion, so that even the liquid insulating resin having a low viscosity does not flow to the surroundings, and thus the covering work can be suitably performed. . As the liquid insulating resin in this case, for example, an epoxy resin can be used.
【００１３】[0013]
【発明の実施の形態】以下，本発明の好ましい実施の形
態について説明する。図１は，第１の実施の形態にかか
る半導体装置の製造方法における製造過程の途中の状態
を示しており，図１の状態では，既に絶縁樹脂基板１
に，半導体素子２が接着材３によって直接取り付けられ
ている。そしてこの半導体素子２の近傍の所定の位置
に，インナーリード４が形成されている。このインナー
リード４は，既存の技術によって形成することができ，
例えば金属板の表面に金属メッキ処理するなどして形成
される。そしてこのインナーリード４の所定の接続部と
半導体素子２の所定の接続部，例えばパッドとの間に
は，線材としての金属細線５が配線されて各接続部と電
気的に接続されている。DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below. FIG. 1 shows a state in the course of the manufacturing process in the method of manufacturing a semiconductor device according to the first embodiment. In the state of FIG.
The semiconductor element 2 is directly attached by an adhesive 3. An inner lead 4 is formed at a predetermined position near the semiconductor element 2. This inner lead 4 can be formed by existing technology.
For example, it is formed by performing metal plating on the surface of a metal plate. A thin metal wire 5 as a wire is wired between a predetermined connection portion of the inner lead 4 and a predetermined connection portion of the semiconductor element 2, for example, a pad, and is electrically connected to each connection portion.
【００１４】この状態，即ち金属細線５を接続した後の
状態から，ノズル６によって液状絶縁樹脂７を，少なく
とも金属細線５におけるインナーリード４との接続部を
被覆するようにして，絶縁樹脂基板１に吐出させる。図
１の例では，半導体素子２とインナーリード４との間の
部分に向けて吐出させている。したがって，液状絶縁樹
脂７がむやみに周囲に拡散したりしない。この場合，さ
らに金属細線５にかかるようにして滴下すれば，当該金
属細線５を伝って液状絶縁樹脂７が金属細線５における
インナーリード４との接続部まで達し，そこで金属細線
５におけるインナーリード４との接続部を被覆する。In this state, ie, the state after the connection of the thin metal wires 5, the liquid insulating resin 7 is covered by the nozzle 6 so as to cover at least the connection portions of the thin metal wires 5 with the inner leads 4. To be discharged. In the example of FIG. 1, the liquid is ejected toward a portion between the semiconductor element 2 and the inner lead 4. Therefore, the liquid insulating resin 7 does not unnecessarily diffuse to the surroundings. In this case, when the liquid insulating resin 7 is further dropped onto the thin metal wire 5, the liquid insulating resin 7 reaches the connection portion of the thin metal wire 5 to the inner lead 4. To cover the connection.
【００１５】なお液状絶縁樹脂７の吐出圧は，自然落下
による吐出，例えば滴下によっても十分所期の目的を達
成することができるので，従来の封止用絶縁樹脂による
モールディングの際の注入圧力よりは，格段に低い圧力
でよい。したがって，液状絶縁樹脂７を吐出する際に，
金属細線５がインナーリード４から剥がれたり，断線す
ることはない。液状絶縁樹脂７としては，即乾性を有す
るものが，製造のスループットの点で好ましい。Note that the discharge pressure of the liquid insulating resin 7 can be sufficiently achieved by discharge by spontaneous dropping, for example, dropping. Therefore, the discharge pressure is lower than the injection pressure at the time of molding by the conventional sealing insulating resin. Requires much lower pressure. Therefore, when discharging the liquid insulating resin 7,
The thin metal wires 5 do not peel off or break from the inner leads 4. As the liquid insulating resin 7, one having quick drying property is preferable in terms of manufacturing throughput.
【００１６】以上のようにして液状絶縁樹脂７が吐出さ
れ，この液状絶縁樹脂７が硬化した状態を図２に示す。
この図２からわかるように，本実施の形態においては，
金属細線５におけるインナーリード４との接続部のみな
らず，金属細線５における半導体素子２との接続部，並
びに金属細線５全体を硬化した液状絶縁樹脂７が覆って
おり，これら金属細線５及びその両端の接続部全体が，
硬化した液状絶縁樹脂７内にいわば埋没した状態となっ
ている。FIG. 2 shows a state in which the liquid insulating resin 7 is discharged as described above and the liquid insulating resin 7 is cured.
As can be seen from FIG. 2, in the present embodiment,
Not only the connecting portion of the thin metal wire 5 with the inner lead 4 but also the connecting portion of the thin metal wire 5 with the semiconductor element 2 and the liquid insulating resin 7 obtained by curing the entire thin metal wire 5 are covered. The entire connection at both ends
It is in a state of being buried in the cured liquid insulating resin 7.
【００１７】この状態で，図２に示した封止前の半導体
装置を，所定の封止用成形金型（図示せず）内に配置
し，その後は通常の流動性を有する，例えば溶融状態の
封止用絶縁樹脂をこの封止用成形金型のキャビティに注
入して，前記封止前の半導体装置を封止する。このとき
前記したように，金属細線５及びその両端の接続部全体
が，硬化した液状絶縁樹脂７内に埋没した状態となって
いるので，封止用絶縁樹脂をたとえ従来より高圧で注入
しても，金属細線５及びその両端の接続部は，このとき
の注入圧の影響を受けない。したがって，金属細線５は
ワイヤ流れを起こさず，インナーリード４との接続部及
び半導体素子２との接続部から剥がれたり，断線するこ
とはない。封止用絶縁樹脂８が硬化した後の状態を図３
に示した。In this state, the semiconductor device before sealing shown in FIG. 2 is placed in a predetermined molding die (not shown), and thereafter has a normal fluidity, for example, in a molten state. Is injected into the cavity of the molding die for sealing to seal the semiconductor device before the sealing. At this time, as described above, since the thin metal wire 5 and the entire connection portion at both ends are buried in the hardened liquid insulating resin 7, the sealing insulating resin is injected at a higher pressure than before. Also, the metal wire 5 and the connection portions at both ends thereof are not affected by the injection pressure at this time. Therefore, the thin metal wire 5 does not cause wire flow, and does not peel off or break from the connection with the inner lead 4 and the connection with the semiconductor element 2. FIG. 3 shows a state after the sealing insulating resin 8 is cured.
It was shown to.
【００１８】以上説明したように，第１の実施の形態に
かかる半導体装置の製造方法によれば，溶融状態の封止
用絶縁樹脂を注入して封止する場合，金属細線５が，イ
ンナーリード４との接続部及び半導体素子２との接続部
から剥がれたり，断線することはない。したがって，従
来よりも高い歩留まりを達成できる。しかも封止用絶縁
樹脂を注入するときには，金属細線５及びその両端の接
続部全体が，硬化した液状絶縁樹脂７内に埋没した状態
となっているので，従来より高圧で封止用絶縁樹脂を注
入しても，金属細線５が剥がれたり，断線することはな
い。それゆえ，従来よりも封止用絶縁樹脂の注入時間を
短縮することができ，しかもより精度の高い，複雑な形
状のモールディングによる封止を実現することも可能で
ある。As described above, according to the method of manufacturing a semiconductor device according to the first embodiment, when the sealing insulating resin in a molten state is injected and sealed, the fine metal wires 5 There is no peeling or disconnection from the connection with the semiconductor device 2 and the connection with the semiconductor element 2. Therefore, a higher yield than before can be achieved. In addition, when the sealing insulating resin is injected, the thin metal wires 5 and the entire connecting portions at both ends are buried in the cured liquid insulating resin 7. Even if it is injected, the thin metal wire 5 does not peel off or break. Therefore, it is possible to shorten the injection time of the insulating resin for sealing as compared with the related art, and it is also possible to achieve more accurate sealing by molding a complicated shape.
【００１９】次に本発明の第２の実施の形態について説
明する。図４は，第２の実施の形態にかかる半導体装置
の製造方法にしたがって半導体装置を製造する途中の状
態を示しており，図４の状態では，絶縁樹脂基板１１に
おけるインナーリード形成予定箇所に，凹部としての座
ぐり穴１２を形成した様子を示している。この座ぐり穴
１２は例えばミーリング等で切削して形成することがで
きる。またその形状は，任意のものが選択でき，例えば
平面形態が方形，円形のもの，さらには絶縁樹脂基板１
１の端面と平行な溝形状のものであってもよい。座ぐり
穴１２の大きさについては，ボンディング部の大きさ，
ボンディングツールの幅，ボンディング精度，さらには
搭載する半導体素子１３の大きさ等によって決定される
が，図４に示した例に即していえば，座ぐり穴１２の幅
をｔとすると，好ましくは，１３０μｍ≦ｔ＜（搭載す
る半導体素子１３の端面から後述の封止用絶縁樹脂１９
の端面までの幅）が適当である。Next, a second embodiment of the present invention will be described. FIG. 4 shows a state in the course of manufacturing a semiconductor device according to the method of manufacturing a semiconductor device according to the second embodiment. In the state of FIG. This shows a state in which counterbore holes 12 as recesses are formed. The counterbore 12 can be formed by cutting with, for example, milling. The shape can be arbitrarily selected. For example, the plane shape is square or circular, and the insulating resin substrate 1
The groove may be in the shape of a groove parallel to the end face of the first member. Regarding the size of the counterbore hole 12, the size of the bonding portion,
The width is determined by the width of the bonding tool, the bonding accuracy, and the size of the semiconductor element 13 to be mounted. According to the example shown in FIG. 4, if the width of the counterbore hole 12 is t, it is preferable. , 130 μm ≦ t <(from the end face of the semiconductor element 13 to be mounted,
Width to the end face) is appropriate.
【００２０】次に形成した座ぐり穴１２に，金属メッキ
やその他の処理加工によって図５に示したように，イン
ナーリード１４を形成する。この場合，少なくとも線材
との接続部が，座ぐり穴１２内に位置するように，イン
ナーリード１４を形成する。即ちインナーリード１４に
おける線材との接続部が，凹部としての座ぐり穴１２内
に位置するように形成する。なお工程として，先に金属
メッキ等を実施し，その後当該金属メッキ部分に座ぐり
穴を形成し，次いで座ぐり穴部分に再メッキを施してイ
ンナーリードを形成するようにしてもよい。Next, as shown in FIG. 5, inner leads 14 are formed in the formed counterbore holes 12 by metal plating or other processing. In this case, the inner lead 14 is formed so that at least a connection portion with the wire is located in the counterbore hole 12. That is, the inner lead 14 is formed such that the connection portion with the wire is located in the counterbore 12 as a recess. As a process, metal plating or the like may be performed first, then a counterbore hole may be formed in the metal plated portion, and then the counterbore hole portion may be re-plated to form an inner lead.
【００２１】このようにしてインナーリード１４を形成
した後，図６に示したように，搭載する半導体素子１３
を接着材１５で所定の位置に取り付ける。After the inner leads 14 are formed in this manner, as shown in FIG.
Is attached to a predetermined position with an adhesive 15.
【００２２】次いで線材として金属細線１６の一端部
を，座ぐり穴１２内におけるインナーリード１４と，他
端部を半導体素子１３におけるパッドなどの所定の接続
部とに各々接続する。Next, one end of the thin metal wire 16 as a wire is connected to the inner lead 14 in the counterbore 12 and the other end is connected to a predetermined connection portion such as a pad of the semiconductor element 13.
【００２３】その後，図７に示したように，ノズル１７
から液状絶縁樹脂１８を，座ぐり穴１２内におけるイン
ナーリード１４に向けて吐出したり，滴下させるなどし
て供給する。この場合の液状絶縁樹脂１８の吐出圧も，
前記第１の実施の形態と同様，自然落下による吐出によ
っても十分所期の目的を達成することができる程度であ
るので，従来の封止用絶縁樹脂によるモールディングの
際の注入圧力よりは，格段に低い圧力でよい。したがっ
て，液状絶縁樹脂１８を吐出する際に，金属細線１６が
インナーリード１４から剥がれたり，断線することはな
い。また液状絶縁樹脂１８についても，前記第１の実施
の形態の場合と同様，即乾性を有するものが，製造のス
ループットを向上させることができる。Thereafter, as shown in FIG.
The liquid insulating resin 18 is supplied to the inner lead 14 in the counterbore 12 by being discharged or dropped. In this case, the discharge pressure of the liquid insulating resin 18 is also
As in the case of the first embodiment, since the intended purpose can be sufficiently achieved even by the discharge by the natural fall, the injection pressure at the time of molding by the conventional insulating resin for sealing is significantly higher. Low pressure is acceptable. Therefore, when the liquid insulating resin 18 is discharged, the thin metal wires 16 do not peel off from the inner leads 14 or break. As for the liquid insulating resin 18, as in the case of the first embodiment, one having quick drying property can improve the production throughput.
【００２４】ノズル１７から液状絶縁樹脂１８を吐出さ
せる際，座ぐり穴１２内におけるインナーリード１４の
部分に吐出させているので，液状絶縁樹脂１８の粘度が
極めて低いものであっても，周囲に漏れたり，流れ出す
ことはなく，好適に液状絶縁樹脂１８の吐出作業が実施
できる。液状絶縁樹脂１８は，少なくとも金属細線１６
とインナーリード１４との接続部を被覆するように吐出
させればよいが，図７に示したように，座ぐり穴１２内
におけるインナーリード１４を充填する程度に吐出させ
てもよい。そうすれば，絶縁樹脂基板１１上での凹凸を
少なくできるので，その後の封止用絶縁樹脂の注入作業
が円滑に行える。When the liquid insulating resin 18 is discharged from the nozzle 17, the liquid insulating resin 18 is discharged to the portion of the inner lead 14 in the counterbore 12. Therefore, even if the viscosity of the liquid insulating resin 18 is extremely low, The discharge operation of the liquid insulating resin 18 can be suitably performed without leaking or flowing out. The liquid insulating resin 18 is made of at least the thin metal wire 16.
The discharge may be performed so as to cover the connection between the inner lead 14 and the inner lead 14. However, the discharge may be performed to such an extent that the inner lead 14 in the counterbore 12 is filled as shown in FIG. By doing so, the unevenness on the insulating resin substrate 11 can be reduced, so that the subsequent work of injecting the sealing insulating resin can be performed smoothly.
【００２５】そのようにして液状絶縁樹脂１８を，座ぐ
り穴１２内におけるインナーリード１４を充填するよう
に吐出させた後，この液状絶縁樹脂１８を硬化させる。
硬化後の状態を図８に示した。After the liquid insulating resin 18 is discharged so as to fill the inner lead 14 in the counterbore hole 12, the liquid insulating resin 18 is cured.
The state after curing is shown in FIG.
【００２６】図８からもわかるように，金属細線１６と
インナーリード１４との接続部は座ぐり穴１２内に位置
し，しかも座ぐり穴１２内におけるインナーリード１４
は，硬化した液状絶縁樹脂１８によって充填されている
ので，その後この状態の半導体装置を，所定の封止用成
形金型（図示せず）内に配置し，流動性を有する例えば
溶融状態の封止用絶縁樹脂をこの封止用金型のキャビテ
ィ内に注入して，この半導体装置を封止する場合でも，
金属細線１６がインナーリード１４との接続部から剥が
れたり，断線することはない。封止用絶縁樹脂１９が硬
化した後の状態を図９に示した。As can be seen from FIG. 8, the connection between the fine metal wire 16 and the inner lead 14 is located in the counterbore 12 and the inner lead 14 in the counterbore 12 is located.
Is filled with the cured liquid insulating resin 18, and then the semiconductor device in this state is placed in a predetermined molding die (not shown), and the semiconductor device having fluidity, for example, in a molten state, is sealed. Even if the semiconductor device is sealed by injecting an insulating resin for stopping into the cavity of the sealing mold,
The thin metal wire 16 does not peel off or break from the connection with the inner lead 14. FIG. 9 shows a state after the sealing insulating resin 19 has been cured.
【００２７】以上説明したように，第２の実施の形態に
かかる半導体装置の製造方法によれば，溶融状態の封止
用絶縁樹脂を注入して封止する場合，金属細線１６が，
インナーリード１４との接続部から剥がれたり，断線す
ることはない。したがって，従来よりも歩留まりの高い
製造を実施することができる。またかかる効果を得るた
めに金属細線１６におけるインナーリード１４との接続
部に液状絶縁樹脂１８を吐出する際も，当該接続部は座
ぐり穴１２内に位置しているので，吐出作業がしやす
く，また液状絶縁樹脂１８の粘度が極めて低いものであ
ってもよい。As described above, according to the method of manufacturing a semiconductor device according to the second embodiment, when the sealing insulating resin in a molten state is injected and sealed, the thin metal wires 16
There is no peeling or disconnection from the connection with the inner lead 14. Therefore, it is possible to carry out manufacturing with a higher yield than before. Also, when the liquid insulating resin 18 is discharged to the connection portion of the thin metal wire 16 with the inner lead 14 in order to obtain such an effect, since the connection portion is located in the counterbore hole 12, the discharge operation is easy. Alternatively, the viscosity of the liquid insulating resin 18 may be extremely low.
【００２８】[0028]
【発明の効果】請求項１，２の半導体装置によれば，製
造するにあたり，線材とインナーリードとの接続部を，
封止用絶縁樹脂とは異なった粘度，材質の樹脂で被覆す
ることができる。また被覆の際にも成形金型内への流動
性を持った封止用絶縁樹脂の注入とは異なった手法を採
用することができ，線材とインナーリードとの接続部に
過度の圧力をかけずに当該接続部を被覆することができ
る。特に請求項２の半導体装置では，粘度の低い絶縁樹
脂を凹部内に流し込むようにして充填させることがで
き，封止用絶縁樹脂とは異なった絶縁樹脂の材質の選択
の幅が広がり，また当該絶縁樹脂が他の領域にまで拡散
することを防止でき，好適な状態で被覆できる。According to the semiconductor device of the first and second aspects, in manufacturing, the connecting portion between the wire and the inner lead is formed by:
It can be coated with a resin having a different viscosity and material from the insulating resin for sealing. Also, when coating, a method different from the injection of insulating resin with fluidity into the molding die can be adopted, and excessive pressure is applied to the connection between the wire and the inner lead. The connection portion can be covered without using the same. In particular, in the semiconductor device according to the second aspect, the insulating resin having a low viscosity can be filled in such a manner as to be poured into the concave portion, so that the insulating resin material different from the sealing insulating resin can be selected in a wider range. The insulating resin can be prevented from diffusing into other regions, and can be covered in a suitable state.
【００２９】請求項３，４の半導体装置の製造方法によ
れば，流動性を有する封止用絶縁樹脂の注入の際，線材
におけるインナーリードとの接続部は，当該封止用絶縁
樹脂の注入圧力の影響を受けず，保護される。したがっ
て，線材がインナーリードから剥がれたり，断線するこ
とが防止される。特に請求項４の半導体装置の製造方法
によれば，粘度の低い液状の絶縁樹脂であっても，周囲
に流れたりせず，好適にかつ確実に線材におけるインナ
ーリードとの接続部を被覆してこれを保護することが可
能である。According to the semiconductor device manufacturing method of the third and fourth aspects, when the sealing insulating resin having fluidity is injected, the connection portion between the wire and the inner lead is filled with the sealing insulating resin. Protected without being affected by pressure. Therefore, the wire is prevented from being peeled off from the inner lead or broken. In particular, according to the method of manufacturing a semiconductor device of the present invention, even if the insulating resin is a liquid insulating material having a low viscosity, it does not flow around, and preferably and reliably covers the connecting portion of the wire with the inner lead. It is possible to protect this.
【図１】本発明の第１の実施形態にかかる製造方法にし
たがって半導体装置を製造する過程を示し，液状絶縁樹
脂を吐出している状態の縦断面からの説明図である。FIG. 1 is a diagram illustrating a process of manufacturing a semiconductor device according to a manufacturing method according to a first embodiment of the present invention, and is an explanatory view from a vertical cross section in a state in which a liquid insulating resin is discharged.
【図２】本発明の第１の実施形態にかかる製造方法にし
たがって半導体装置を製造する過程を示し，液状絶縁樹
脂が硬化した状態の縦断面からの説明図である。FIG. 2 is a view illustrating a process of manufacturing the semiconductor device according to the manufacturing method according to the first embodiment of the present invention, and is an explanatory view from a longitudinal section in a state where the liquid insulating resin is cured.
【図３】本発明の第１の実施形態にかかる製造方法にし
たがって半導体装置を製造する過程を示し，封止用絶縁
樹脂で封止した状態の縦断面からの説明図である。FIG. 3 is a view illustrating a process of manufacturing the semiconductor device according to the manufacturing method according to the first embodiment of the present invention, and is an explanatory view from a longitudinal section in a state where the semiconductor device is sealed with a sealing insulating resin.
【図４】本発明の第２の実施形態にかかる製造方法にし
たがって半導体装置を製造する過程を示し，絶縁樹脂基
板上に半導体素子を取り付けた状態の縦断面からの説明
図である。FIG. 4 is a view illustrating a process of manufacturing a semiconductor device according to a manufacturing method according to a second embodiment of the present invention, and is an explanatory view from a vertical cross section in a state where a semiconductor element is mounted on an insulating resin substrate.
【図５】本発明の第２の実施形態にかかる製造方法にし
たがって半導体装置を製造する過程を示し，絶縁樹脂基
板上に座ぐり穴を形成した状態の縦断面からの説明図で
ある。FIG. 5 is a diagram illustrating a process of manufacturing a semiconductor device according to a manufacturing method according to a second embodiment of the present invention, and is an explanatory view from a vertical cross section of a state in which a counterbore is formed on an insulating resin substrate.
【図６】本発明の第２の実施形態にかかる製造方法にし
たがって半導体装置を製造する過程を示し，座ぐり穴に
インナーリードを形成した状態の縦断面からの説明図で
ある。FIG. 6 is a diagram illustrating a process of manufacturing a semiconductor device according to a manufacturing method according to a second embodiment of the present invention, and is an explanatory view from a vertical cross section in a state where an inner lead is formed in a counterbore.
【図７】本発明の第２の実施形態にかかる製造方法にし
たがって半導体装置を製造する過程を示し，インナーリ
ードと金属細線を接続し，液状絶縁樹脂を吐出している
状態の縦断面からの説明図である。FIG. 7 shows a process of manufacturing a semiconductor device according to the manufacturing method according to the second embodiment of the present invention, in which the inner lead is connected to a thin metal wire, and the liquid insulating resin is discharged from a vertical cross section. FIG.
【図８】本発明の第２の実施形態にかかる製造方法にし
たがって半導体装置を製造する過程を示し，液状絶縁樹
脂が硬化した状態の縦断面からの説明図である。FIG. 8 is a diagram illustrating a process of manufacturing a semiconductor device according to a manufacturing method according to a second embodiment of the present invention, and is an explanatory view from a vertical cross section in a state where a liquid insulating resin is cured.
【図９】本発明の第２の実施形態にかかる製造方法にし
たがって半導体装置を製造する過程を示し，封止用絶縁
樹脂で封止した状態の縦断面からの説明図である。FIG. 9 is a diagram illustrating a process of manufacturing a semiconductor device according to a manufacturing method according to a second embodiment of the present invention, and is an explanatory view from a longitudinal section in a state where the semiconductor device is sealed with a sealing insulating resin.
【図１０】従来技術にかかる半導体装置の縦断面からの
説明図である。FIG. 10 is an explanatory view of a semiconductor device according to the related art, as viewed from a longitudinal section.
１，１１ 絶縁樹脂基板 ２，１３ 半導体素子 ４，１４ インナーリード ５，１６ 金属細線 ７，１８ 液状絶縁樹脂 ８，１９ 封止用絶縁樹脂 １２ 座ぐり穴 1,11 Insulating resin substrate 2,13 Semiconductor element 4,14 Inner lead 5,16 Fine metal wire 7,18 Liquid insulating resin 8,19 Sealing insulating resin 12 Counterbore
Claims (4)
部と当該基板に形成されたインナーリードにおける所定
の接続部とが線材によって電気的に接続され，さらにこ
れら半導体素子，インナーリード及び線材が，封止用絶
縁樹脂によって外側から封止された半導体装置におい
て，少なくとも前記線材におけるインナーリードとの接
続部が，前記封止用絶縁樹脂とは異なった絶縁樹脂で被
覆されていることを特徴とする，半導体装置。A predetermined connection portion of a semiconductor element on a substrate is electrically connected to a predetermined connection portion of an inner lead formed on the substrate by a wire, and the semiconductor element, the inner lead, and the wire are connected to each other by a wire. In a semiconductor device sealed from the outside with a sealing insulating resin, at least a connection portion of the wire with an inner lead is covered with an insulating resin different from the sealing insulating resin. , Semiconductor devices.
基板に形成された凹部内に形成され，当該凹部内に，封
止用絶縁樹脂とは異なった絶縁樹脂が充填されているこ
とを特徴とする，請求項１に記載の半導体装置。2. A method according to claim 1, wherein a predetermined connection portion of the inner lead is formed in a concave portion formed in the substrate, and the concave portion is filled with an insulating resin different from the sealing insulating resin. The semiconductor device according to claim 1.
部と当該基板に形成されたインナーリードにおける所定
の接続部とを線材によって電気的に接続し，次いでこれ
ら半導体素子，インナーリード及び線材を封止用絶縁樹
脂によって外側から封止して半導体装置を製造する方法
において，前記封止用絶縁樹脂によって封止する前に，
少なくとも前記線材におけるインナーリードとの接続部
を，液状の絶縁樹脂で被覆して硬化させることを特徴と
する，半導体装置の製造方法。3. A predetermined connection portion of the semiconductor element on the substrate and a predetermined connection portion of the inner lead formed on the substrate are electrically connected by a wire, and then the semiconductor element, the inner lead and the wire are sealed. In a method of manufacturing a semiconductor device by sealing from the outside with a sealing insulating resin, before sealing with the sealing insulating resin,
A method for manufacturing a semiconductor device, characterized in that at least a connection portion of the wire with an inner lead is covered with a liquid insulating resin and cured.
部と当該基板に形成されたインナーリードにおける所定
の接続部とを線材によって電気的に接続し，次いでこれ
ら半導体素子，インナーリード及び線材を封止用絶縁樹
脂によって外側から封止して半導体装置を製造する方法
において，前記基板上に凹部を形成する工程と，前記凹
部に導電層を形成してインナーリードの所定の接続部を
構成する工程と，前記半導体素子における所定の接続部
とインナーリードの所定の接続部とを線材によって電気
的に接続する工程と，前記線材におけるインナーリード
との接続部を，液状の絶縁樹脂で被覆して硬化させる工
程と，前記液状の絶縁樹脂の硬化後，前記半導体素子，
インナーリード及び線材を封止用絶縁樹脂によって外側
から封止する工程とを有することを特徴とする，半導体
装置の製造方法。4. A predetermined connection portion of a semiconductor element on a substrate and a predetermined connection portion of an inner lead formed on the substrate are electrically connected by a wire, and then the semiconductor element, the inner lead and the wire are sealed. In a method of manufacturing a semiconductor device by sealing from the outside with a stop insulating resin, a step of forming a recess on the substrate and a step of forming a conductive layer in the recess to form a predetermined connection portion of an inner lead Electrically connecting a predetermined connection portion of the semiconductor element and a predetermined connection portion of the inner lead with a wire; and covering the connection portion of the wire with the inner lead with a liquid insulating resin and curing. And after curing the liquid insulating resin, the semiconductor element,
Sealing the inner lead and the wire from the outside with a sealing insulating resin.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9066737A JPH10261741A (en) | 1997-03-19 | 1997-03-19 | Semiconductor device and manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9066737A JPH10261741A (en) | 1997-03-19 | 1997-03-19 | Semiconductor device and manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH10261741A true JPH10261741A (en) | 1998-09-29 |
Family
ID=13324507
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9066737A Withdrawn JPH10261741A (en) | 1997-03-19 | 1997-03-19 | Semiconductor device and manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH10261741A (en) |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010141109A (en) * | 2008-12-11 | 2010-06-24 | Sharp Corp | Solar cell module and method for producing the same |
| JP2011035334A (en) * | 2009-08-06 | 2011-02-17 | Panasonic Corp | Semiconductor device |
| CN103022011A (en) * | 2011-09-23 | 2013-04-03 | 国碁电子(中山)有限公司 | Semiconductor encapsulation structure and manufacture method thereof |
| JP6288344B1 (en) * | 2017-03-31 | 2018-03-07 | 日立化成株式会社 | Electronic circuit protective material, electronic circuit protective material sealing material, sealing method, and semiconductor device manufacturing method |
| JP6292334B1 (en) * | 2017-03-31 | 2018-03-14 | 日立化成株式会社 | Electronic circuit protective material, electronic circuit protective material sealing material, sealing method, and semiconductor device manufacturing method |
| WO2018181602A1 (en) * | 2017-03-31 | 2018-10-04 | 日立化成株式会社 | Protective material for electronic circuit, protective sealing material for electronic circuit, sealing method, and method for manufacturing semiconductor device |
| WO2019031513A1 (en) * | 2017-08-10 | 2019-02-14 | 日立化成株式会社 | Semiconductor device and method for producing same |
| JP2019169741A (en) * | 2017-12-14 | 2019-10-03 | 日立化成株式会社 | Protective material for electronic circuit, sealant for protective material for electronic circuit, sealing method and method for manufacturing semiconductor device |
| JP2019169742A (en) * | 2019-06-27 | 2019-10-03 | 日立化成株式会社 | Electronic circuit protection material, sealing material for the same, sealing method, and semiconductor device manufacturing method |
| US11545517B2 (en) * | 2019-06-14 | 2023-01-03 | Shenzhen GOODIX Technology Co., Ltd. | Chip package structure, electronic device and method for preparing a chip package structure |
-
1997
- 1997-03-19 JP JP9066737A patent/JPH10261741A/en not_active Withdrawn
Cited By (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010141109A (en) * | 2008-12-11 | 2010-06-24 | Sharp Corp | Solar cell module and method for producing the same |
| JP2011035334A (en) * | 2009-08-06 | 2011-02-17 | Panasonic Corp | Semiconductor device |
| CN103022011A (en) * | 2011-09-23 | 2013-04-03 | 国碁电子(中山)有限公司 | Semiconductor encapsulation structure and manufacture method thereof |
| CN110476243A (en) * | 2017-03-31 | 2019-11-19 | 日立化成株式会社 | The manufacturing method of electronic circuit protection materials, electronic circuit protection materials sealing material, encapsulating method and semiconductor device |
| KR20200007090A (en) * | 2017-03-31 | 2020-01-21 | 히타치가세이가부시끼가이샤 | Protective material for electronic circuit, protective sealing material for electronic circuit, sealing method, and method for manufacturing semiconductor device |
| WO2018181602A1 (en) * | 2017-03-31 | 2018-10-04 | 日立化成株式会社 | Protective material for electronic circuit, protective sealing material for electronic circuit, sealing method, and method for manufacturing semiconductor device |
| JP2018174278A (en) * | 2017-03-31 | 2018-11-08 | 日立化成株式会社 | Electronic circuit protection material, sealing material for the same, sealing method, and semiconductor device manufacturing method |
| JP2018174277A (en) * | 2017-03-31 | 2018-11-08 | 日立化成株式会社 | Protective material for electronic circuit, sealant for protective material for electronic circuit, sealing method and method for manufacturing semiconductor device |
| TWI800504B (en) * | 2017-03-31 | 2023-05-01 | 日商日立化成股份有限公司 | Protection material for electronic circuit, method of sealing and method of producing semiconductor device |
| JP6292334B1 (en) * | 2017-03-31 | 2018-03-14 | 日立化成株式会社 | Electronic circuit protective material, electronic circuit protective material sealing material, sealing method, and semiconductor device manufacturing method |
| JP6288344B1 (en) * | 2017-03-31 | 2018-03-07 | 日立化成株式会社 | Electronic circuit protective material, electronic circuit protective material sealing material, sealing method, and semiconductor device manufacturing method |
| KR20190119143A (en) * | 2017-03-31 | 2019-10-21 | 히타치가세이가부시끼가이샤 | Electronic circuit protective material, electronic circuit protective material sealing material, sealing method and semiconductor device manufacturing method |
| JPWO2019031513A1 (en) * | 2017-08-10 | 2020-10-01 | 日立化成株式会社 | Semiconductor devices and their manufacturing methods |
| SE543901C2 (en) * | 2017-08-10 | 2021-09-21 | Showa Denko Materials Co Ltd | Semiconductor device and method for producing same |
| TWI763902B (en) * | 2017-08-10 | 2022-05-11 | 日商昭和電工材料股份有限公司 | Semiconductor element and method of manufacturing the same |
| WO2019031513A1 (en) * | 2017-08-10 | 2019-02-14 | 日立化成株式会社 | Semiconductor device and method for producing same |
| JP2019169741A (en) * | 2017-12-14 | 2019-10-03 | 日立化成株式会社 | Protective material for electronic circuit, sealant for protective material for electronic circuit, sealing method and method for manufacturing semiconductor device |
| US11545517B2 (en) * | 2019-06-14 | 2023-01-03 | Shenzhen GOODIX Technology Co., Ltd. | Chip package structure, electronic device and method for preparing a chip package structure |
| JP2019169742A (en) * | 2019-06-27 | 2019-10-03 | 日立化成株式会社 | Electronic circuit protection material, sealing material for the same, sealing method, and semiconductor device manufacturing method |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6664646B2 (en) | Chip-on-board assemblies, carrier assemblies and carrier substrates using residual organic compounds to facilitate gate break | |
| US6498055B2 (en) | Semiconductor device, method of manufacturing semiconductor device, resin molding die, and semiconductor manufacturing system | |
| JP3194917B2 (en) | Resin sealing method | |
| JPH10261741A (en) | Semiconductor device and manufacture of semiconductor device | |
| US20010013674A1 (en) | Resin-molding method, molding dies and circuit base member | |
| US6545368B2 (en) | Use of an oxide surface to facilitate gate break on a carrier substrate for a semiconductor device | |
| JP2003218289A (en) | Semiconductor device and method for manufacturing the same and print mask | |
| KR20000050486A (en) | Encapsulation method of bga transfer molding in semiconductor | |
| US5706175A (en) | Resin-sealed semiconductor device | |
| KR100963151B1 (en) | Mold for manufacturing semiconductor package and method for molding using the same | |
| JPH11111738A (en) | Cob and method for manufacturing the same, semiconductor element and method for manufacturing the same | |
| JPH0434958A (en) | Resin sealing type semiconductor device and manufacture thereof | |
| JP3572764B2 (en) | Bare chip sealing method and bare chip sealing substrate | |
| JPH0936155A (en) | Manufacture of semiconductor device | |
| CN108831839B (en) | Method for removing burrs generated in semiconductor plastic packaging process | |
| KR100366110B1 (en) | Semiconductor device and assembling method thereof | |
| JPH10135252A (en) | Manufacturing method of semiconductor device | |
| JP3646663B2 (en) | Manufacturing method of semiconductor device | |
| JP3444747B2 (en) | Resin sealing molding method for electronic parts | |
| JP2005081695A (en) | Resin molding mold | |
| JP2000124237A (en) | Board for mounting semiconductor elements, resin-sealed semiconductor device using the same and manufacture of the substrate | |
| JP2002076198A (en) | Manufacturing method of semiconductor device | |
| JPH0722471A (en) | Carrier tape, manufacture of carrier tape, semiconductor device using carrier tape and manufacture thereof | |
| JPH0637127A (en) | Semiconductor package and its manufacture | |
| JPH03257937A (en) | Sealing method of bear chip |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A300 | Withdrawal of application because of no request for examination |
Free format text: JAPANESE INTERMEDIATE CODE: A300 Effective date: 20040601 |