JPH10105296A - Power source controller - Google Patents

Abstract

PROBLEM TO BE SOLVED: To perform adequate getting-up control corresponding to the state of a power source in power-OFF stand-by mode. SOLUTION: When the voltage of a battery drops, a power source state detecting circuit 15 outputs an abnormality detection signal and supplies it to an NMI terminal NMI of a CPU 1, which is caused to initiate a nonmaskable interruption. Once the nonmaskable interruption is initiated, a peripheral power source switch 6 is turned off to stop supplying electric power to a peripheral circuit 5. Then only an on-switch signal and a power source normal recovery signal are selected as getting-up factors of a getting-up recovery control circuit 7 and the CPU 1 enters a stop state. When the user connects an AC adapter to an AC jack 8, the power source state detecting circuit 15 generates a normal recovery detection signal. A getting-up recovery control circuit 7 generates a getting-up interruption signal since the normal recovery detection signal is effective as a getting-up factor and the CPU 1 exits from the stop state to allow all getting-up factors and then enters the stop state again when the getting-up factor is a power source normal recovery.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply control device for controlling a power supply of an information device or the like, and more particularly to a power supply control device suitable for a portable information device using a battery as a power supply.

[0002]

2. Description of the Related Art In portable information devices, the life of a battery as a power supply has an important effect on portability. For this reason, portable information devices are provided with various power supply modes to extend battery life.

A power-off mode is known as one of the power-saving power modes. This power-off mode is set by operating a power-off switch, and is a mode in which all power supplies of peripheral circuits are cut off except for a backup power supply of a memory. In addition, the operation returns from the power-off mode to the normal mode (power-on mode) in response to the operation of the power-on switch and the detection of the power-on input from the touch panel.

Returning from the power-off mode (power-off state) to the normal mode (power-on state) is referred to as wake-up, or "wake-up".

[0005] In recent years, portable information devices include PCM.
CIA (Personal Computer MemoryCard International
Association) based on IC card (so-called PC
Various functions such as a function for supporting a card, a communication function, and the like are being added.

As a new function of this type, for example, data stored in a portable information device can be transferred to a personal computer (PeP).
A function of automatically backing up data in a storage device of an rsonal computer (PC) is known. In order to properly realize this function, even when the power of the portable information device is off, when the portable information device is connected to a personal computer, the power is automatically turned on and the portable information device is turned on. It is necessary to transmit data in the information device to a personal computer.

[0007]

When such an automatic backup function is added, for example, even when the battery voltage is low, when a personal computer is connected, data is automatically transmitted to the personal computer. there's a possibility that. However, if communication is performed forcibly when the battery voltage is low, the power supply voltage will drop extremely,
It is not possible to secure a backup power supply for the memory, and there is a possibility that the stored contents of the memory will be destroyed.

In this type of portable information device, in order to avoid a malfunction or the like, a drop in the battery voltage is detected, and the above-mentioned power-off mode is automatically set. 2. Description of the Related Art Powering off information devices has been performed. With this configuration,
By setting the power-off mode, the load is reduced, and the battery power may be restored. However, when the battery power is restored, the power is turned on again by the automatic wake-up function, the load on the battery power is increased again, and the battery voltage is reduced. In this manner, an oscillation phenomenon in which the power is turned on and off repeatedly occurs, and the battery power may be significantly consumed. Therefore, it is not possible to secure a backup power supply for the memory, and eventually, the stored contents may be destroyed.

The present invention has been made in view of the above situation, and has as its object to provide a power supply control device capable of appropriately switching an operation mode of an information device in accordance with a state of a power supply. Another object of the present invention is to provide a power supply control device that appropriately controls wake-up in a power-off mode under conditions corresponding to an actual power supply state.

[0010]

In order to achieve the above object, a power supply control device according to a first aspect of the present invention stops main power supply to a target device, and sets the target device to a substantially stopped state. While waiting, responding to a predetermined wake-up factor, canceling the substantial stop state of the target device, wake-up control means for performing wake-up control of the target device including the main power supply, Power supply state detection means for detecting and generating a detection signal; and wake-up factor control means for changing and controlling the wake-up factor in the wake-up control means based on the detection signal of the power supply state detection means. I do.

According to such a configuration, in the stop (standby) state, the wake-up factor can be changed according to the state of the power supply. Therefore, for example, when the power is exhausted, the wake-up factors are limited to those that consume less power, and when the power is restored, control such as receiving all the wake-up factors can be performed. Therefore, it is possible to appropriately control the wake-up factor according to the state of the power supply. Therefore, memory destruction due to excessive power consumption and unstable operation of the power supply can be effectively prevented.

[0012] The power supply state detecting means includes means for determining whether the power supply has been consumed below a predetermined level,
The wake-up factor control means is configured to include a factor limiting means for limiting the wake-up factor only to a predetermined factor when the power state detection means detects that the power supply has been consumed to a predetermined level or less. You may.

The power supply includes, for example, a battery. In this case, for example, the power state detection means determines whether or not the voltage of the battery has dropped below a predetermined level, and the wake-up factor control means determines that the voltage of the battery has been reduced to a predetermined level by the power state detection means. Is detected, the rising factor is limited to only a predetermined factor.

When the power supply state detecting means detects that the voltage of the battery has returned to a predetermined level or higher,
Limit release means for releasing the restriction of the wake-up factor by the factor restriction means may be further arranged.

The factor limiting means limits the wakeup factor to only a predetermined wakeup factor including, for example, at least one of a factor of least power consumption after power-on, power-on, and power-up. . The factor restriction unit may further include a unit that excludes connection of the target device to an external device and occurrence of an alarm from a wakeup factor.

A power supply control device according to a second aspect of the present invention includes a processing unit for processing data including a processing device having a stop state and an operation state, and the processing unit responding to a predetermined wake-up factor. A wake-up control circuit that releases the stop state of the wake-up and wakes up, a power state detection circuit that detects a power supply state and generates a detection signal, and the wake-up control circuit in the wake-up control circuit A wake-up factor control circuit for controlling wake-up factors.

According to this configuration, when the processing unit such as the central processing unit is set in the stop state (standby state),
This can be woken up according to a predetermined wake-up factor. Moreover, the wake-up factor can be changed according to the power supply state. Therefore, for example, when the power supply is exhausted, the wake-up factor that requires high power after wake-up is excluded, and only the wake-up factor that requires less power after wake-up is received, and the power is restored. , It is possible to perform control such as receiving all wake-up factors. Therefore, it is possible to appropriately control the wake-up factor according to the state of the power supply. Therefore, memory destruction due to excessive power consumption and unstable operation of the power supply can be effectively prevented.

The wake-up factor control circuit includes, for example, a factor selection circuit for selectively enabling the wake-up factor, and controlling the factor selection circuit based on the detection content of the power status detection circuit. When it is detected by the circuit that the power supply has been consumed to a predetermined level or more, only the factor of low power consumption and power return are valid as the wake-up factor, and when the power return is detected by the power state detection circuit, And a selection control circuit that makes all wake-up factors valid.

The wake-up factor control circuit may be a circuit controlled by the processing unit.

The selection control circuit limits the wake-up factor only to, for example, power return and power switch ON. Also,
For example, the selection control circuit may exclude connection of an external device and occurrence of an alarm from a wake-up factor when power consumption is detected.

A stop state setting means for setting the processing section to a stop state based on a detection signal of the power supply state detection circuit may be further provided. In this case, for example, the stop state setting unit sets the processing unit to the stop state and stops supplying power to a predetermined circuit block, and the processing unit determines a wake-up factor when it wakes up. When the wake-up factor is only the restoration of the power supply, the wake-up factor may be all permitted, and in other cases, the power supply to the peripheral circuit of the processing unit may be restarted.

[0022]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A power supply control device according to an embodiment of the present invention will be described below with reference to FIGS. FIG. 1 shows a configuration of an information device incorporating a power supply control device according to an embodiment of the present invention.

The information equipment shown in FIG. 1 includes a CPU (central processing unit) 1, a ROM (read only memory) 2, a RAM (random access memory) 3, an off switch 4, a peripheral circuit 5, a peripheral power switch 6, a wake-up recovery. Control circuit 7, AC
(AC) jack 8, AC adapter detection circuit 9, battery 1
0, battery cover switch 11, cover open / close detection circuit 1
2. It includes diodes 13 and 14, a power state detection circuit 15, an on-switch 16, and an alarm circuit 17.

The CPU 1 executes a program stored in the ROM 2 by using the RAM 3 and the like as necessary, and performs main information processing of the information device and power supply control according to the present invention. The CPU 1 has an operation stop function such as halt by a HALT command or standby by a STANDBY command. This is H
By executing the ALT instruction, the STANDBY instruction, or the like, the CPU 1 enters a halt state (such as a halt state, a sleep state, or a standby state), and stops the operation of the CPU 1 until an external change due to an interrupt or the like occurs. .

The ROM 2 previously stores a processing program relating to information processing and power supply control in information equipment and necessary data. The CPU 1 stores the RO in which the program is stored.
The program data is sequentially read from M2, and the program is sequentially executed. The RAM 3 is a rewritable memory, and stores work data necessary for executing a program. That is, the RAM 3 stores necessary data and the like as needed in connection with the execution of the information processing and power control program stored in the ROM 2 by the CPU 1.

The off switch 4 is a switch for turning off the power of the information equipment and setting a stop (standby) state in the power off mode. The power off signal from the off switch 4 is monitored by the CPU 1.

The peripheral circuit 5 is a circuit used for the operation of the information equipment, and is a main load of the power supply circuit of the information equipment. The peripheral circuit 5 includes an LCD (liquid crystal display) 5-
1, a touch panel 5-2, a PC card slot 5-3, and a serial interface 5-4.

The LCD 5-1 displays information necessary for various processes and operations of the information device. The touch panel 5-2 is
It functions as an input device corresponding to a keyboard, a mouse, and the like. The touch panel 5-2 is disposed, for example, on the LCD 5-1 so as to be superimposed, and inputs desired information by performing a pressing operation with a finger or the like in relation to the display screen.

The PC card slot 5-3 is a PCMCI
It has an interface specification conforming to the A standard, and can be used by setting a PC card. A so-called PC card conforming to the PCMCIA standard is used not only for an IC memory card such as a normal flash memory card but also for various applications by using its interface. Such PC cards include, for example, a modem card, ISDN (Integrated Services Digital Network).
k) Terminal adapter card, LAN (LocalArea Net)
work) Adapter card, hard disk card, SCS
There are I (Small Computer System Interface) cards and the like. The serial interface 5-4 is a general-purpose communication serial interface, and is generally an interface conforming to the RS-232C standard. This serial interface includes a personal computer, modem,
Peripherals such as SDN terminal adapters, LAN adapters, and printers, that is, peripheral devices can be connected.

The peripheral power switch 6 opens and closes a power supply path to the peripheral circuit 5, that is, the LCD 5-1, the touch panel 5-2, the PC card slot 5-3, and the serial interface 5-4 under the control of the CPU 1. By the operation of the peripheral power switch 6, the power supply is turned on or off.

The CPU 1, the ROM 2, the RAM 3, the off switch 4, the LCD 5-1, the touch panel 5-2, the peripheral power switch 6, and the wake-up return control circuit 7 described below are all connected to the main bus. They are interconnected via a bus so that information can be exchanged.

The wake-up return control circuit 7 outputs a wake-up command to the CPU 1 selectively in response to various wake-up request signals output by peripheral devices or the like to wake up the information device (turn on the power). That is, the wake-up recovery control circuit 7
Is based on the wake-up condition and an external wake-up request signal.
A wake-up command is given to the wake-up control terminal Wake of U1, and wake-up control of the information device is performed. Table 1 shows an example of such a wakeup request signal.

[0033]

[Table 1]

The wake-up return control circuit 7 is specifically configured as shown in FIG. 2, and controls which of the above-mentioned wake-up request signals is actually woken up. The configuration is such that the validity (enable) and invalidity (disable) of the mask can be set for each signal.

That is, the wake-up recovery control circuit 7 has an OR circuit 7-1, AND circuits 7-2 to 7-6, a data register 7-7, and a register 7-8. OR circuit 7-1
Receives the outputs of the AND circuits 7-2 to 7-6, and issues a wake-up command to the wake-up control terminal Wake of the CPU 1 when a "true" signal is output from any of the AND circuits 7-2 to 7-6. .

The AND circuits 7-2 to 7-6 receive, at one input terminal, data of each bit of the mask data held in the data register 7-7, and gate circuits which are opened and closed by these bit data. Function as An on-switch 16 is connected to the other input terminals of the AND circuits 7-2 to 7-6.
Signal from the alarm circuit 17, an alarm signal from the alarm circuit 17, a personal computer connection signal from the serial interface 5-4, a PC card connection signal from the PC card slot 5-3, and the power supply state detection circuit 1
5, the normal recovery detection signal is supplied, and when the gate is opened by the above-mentioned mask data, it is output through the gate and is output when the gate is closed.

The data register 7-7 stores mask data given from the CPU 1 via the main bus.
The mask data is selection information of a wake-up request signal (wake-up factor) given to the AND circuits 7-2 to 7-6, and "true" or "false" of each bit corresponds to validity or invalidity of the wake-up factor. doing.

The register 7-8 holds the state of the wake-up request signal, and is referred to for detecting the wake-up factor that caused the CPU 1 to wake up.

In FIG. 1, the AC jack 8 is a commercial A
This is a connector to which a so-called AC adapter for obtaining DC (direct current) as a power supply from the C power supply is externally connected. A
The C adapter detection circuit 9 detects whether or not an AC adapter is connected to the AC jack 8 and outputs an insertion signal, a withdrawal signal and a voltage signal corresponding to the insertion, extraction and voltage of the plug of the AC adapter. , Power supply state detection circuit 1
Give 5 Power (power) supplied from the AC jack 8 is supplied to each unit in the information device as an internal power supply via the diode 13.

The battery 10 is used as a power source when no AC adapter is connected. In this case, the battery 10
May be any of a secondary battery such as a nickel metal hydride battery, a nickel cadmium battery, a lithium ion battery or a primary battery such as a dry battery. When a secondary battery is used as the battery 10, a charging circuit or a charger for charging the secondary battery is separately provided. A charging circuit using an AC adapter connected to the AC jack 8 as a power supply may be incorporated. The output of the battery 10 is supplied to each unit in the information device as an internal power supply via the diode 14.

The battery cover switch 11 is a switch which responds to opening and closing of a battery cover (not shown) of a battery housing section for housing the battery 10. Cover open / close detection circuit 12
Outputs a cover open signal indicating that the battery cover has been opened and a cover close signal indicating that the battery cover has been closed, based on the output of the battery cover switch 11, and gives the signal to the power supply state detection circuit 15.

The diode 13 prevents the output of the battery 10 from flowing into the AC adapter connected to the AC jack 8. The diode 14 is connected from the AC jack 8 to the battery 1.
Battery 10 when a voltage higher than the voltage of 0 is supplied.
Is disconnected from the power supply circuit to prevent the power of the battery 10 from being wasted and the current from the AC adapter flowing into the battery 10 to prevent the battery 10 from being damaged. That is, the diodes 13 and 14 prevent the current from flowing backward from one power supply to the other power supply. Generally, the voltage supplied from the AC jack 8 is set higher than the voltage of the battery 10,
When power is supplied from the C jack 8, the power supply from the battery 10 is blocked by the diodes 13 and 14.

When the battery 10 is set in the battery accommodating section or an AC adapter is inserted into the AC jack 8, the CPU 1 and the ROM are connected via a power supply line (not shown).
2 and the RAM 3 are supplied with internal power. Further, a signal related to the internal power supply is supplied to the power supply state detection circuit 15.

The power supply state detection circuit 15 detects, for example, that the internal power supply has risen from 0 V to a predetermined operating voltage or more, generates a reset signal, and resets the reset terminal Re of the CPU 1.
Supply to set. Therefore, when power is supplied for the first time, the power supply state detection circuit 15 generates a reset signal because the power supply voltage increases from 0 V to the operating voltage, and generates a reset signal.
Reset U1. The CPU 1 starts reading the program from the ROM 2 and starts operating.

The power supply state detection circuit 15 detects that the internal power supply has become abnormal, and generates an abnormality detection signal. This abnormality detection signal is supplied to a non-maskable interrupt (NMI) terminal (hereinafter, referred to as an “NMI terminal”) NMI of the CPU 1. Further, the power supply state detection circuit 15 detects that the internal power supply has returned from the abnormal state to the normal state, and supplies the above-described normal recovery detection signal to the wake-up recovery control circuit 7.

Note that the abnormality detection signal is generated based on Equation 1, and the normal recovery detection signal is generated based on Equation 2.

[0047]

[Equation 1] Abnormality detection = (battery cover open signal) OR (battery low voltage detection signal)

[Equation 2] Normal recovery detection = $ (AC adapter insertion signal) OR
(Battery cover close signal)｝ AND not (battery low voltage detection signal)

It is to be noted that the battery low voltage detection signal is generated when the internal power supply falls below the lower limit reference value close to the lower limit value within the operation guarantee voltage range, that is, the voltage of the internal power supply is likely to fall outside the operation guarantee range. Sometimes, it is output by the power state detection circuit 15. The battery cover open signal and the battery cover close signal are output by the cover open / close detection circuit 12 at the detection edges of the battery cover open operation and the close operation, respectively.
The AC adapter insertion signal indicates that the AC adapter has been plugged into the AC jack 8 at the detection edge.
Output by the adapter detection circuit 9.

The ON switch 16 is a switch for turning on the power supply of the information device to set the normal operation mode.
The alarm circuit 17 generates an alarm signal for waking up the information device in response to a predetermined alarm condition when in the power-off mode.

The AC jack 8, the AC adapter detection circuit 9, the battery 10, the battery cover switch 11, the cover open / close detection circuit 12, the diodes 13, 14 and the power supply state detection circuit 15 constitute a power supply circuit of the information device. .

Next, with reference to a flow chart shown in FIG. 3, how the information device operates in response to the operation of the power supply operation off switch 4 and on switch 16 will be described.

When the internal power supply is applied, the voltage rises from 0 V to the operating voltage. Therefore, the power supply state detection circuit 15 generates a reset signal and resets the CPU 1. CP
U1 starts reading the program from the ROM 2 storing the program, and starts the main processing shown in FIG.

First, the CPU 1 shifts the system to a stop state in the power-off mode. That is, the peripheral power switch 6 is turned off, that is, turned off, and the power of the peripheral circuit 5 is turned off (step S11). Also, CPU
1 sets the mask data in the data register 7-7 of the wake-up recovery control circuit 7, and disables all the masks for limiting the wake-up factor. That is, CPU1
Sets all bits of the mask data to "true", validates all wake-up factors, and sets the wake-up return control circuit 7 to wake up the device under any wake-up conditions (step S12).

Thereafter, the CPU 1 executes the HALT instruction to set itself in a halt state (halt state), and waits until the halt state is released by the wake-up interrupt signal (step S13).

As described above, all the bits of the data register 7-7 of the wake-up recovery control circuit 7 are set to "true". Therefore, by connecting the serial interface 5-4 to an external device such as a personal computer by connecting the on-switch signal output by pressing the on-switch 16 to the external device such as a personal computer, the PC connection signal generated from the serial interface 5-4, When any one of the alarm signal output from the alarm circuit 17 and the PC card signal which is an interrupt signal from the PC card is generated,
The wakeup interrupt signal is supplied to the Wake terminal of the CPU 1, and the halt state is released.

When the halt state is released, the CPU 1 turns on the peripheral power switch 6 via the main bus so that the normal operation can be performed (step S14), activates the peripheral circuits, and activates the information device. The operation state is entered, and various processes are executed (step S15). Thus, the original processing operation of the information device, for example, creation of a document and the like are performed.

The CPU 1 performs the original processing operation while
The state of the off switch 4 is periodically detected (step S
16). If the operation of the off switch 4 is detected in step S16, the process returns to step S11, and the CPU 1 turns off the peripheral power switch 6 in step S11 and selects all the wake-up factors in step S12 in the same procedure as described above. And execute the HALT instruction. If the operation of the off switch 4 is not detected in step S16, the process returns to step S15, and the original processing is repeated.

The main operation shown in FIG. 3 is executed irrespective of whether the power is the DC power supplied from the AC adapter to the AC jack 8 or the battery 10.

Here, while the battery 10 is used as a main power source and the steps S15 and S16 shown in FIG. 3 are repeatedly executed, the battery 10 is gradually consumed, the voltage of the battery 10 is reduced, and the lower limit reference value is set. Suppose that

The power supply state detection circuit 15 detects that the internal power supply voltage has fallen below the lower limit reference value, outputs a battery low voltage detection signal, and outputs an abnormality detection signal based on Equation 1. This abnormality detection signal is supplied to the NMI terminal of the CPU 1. In response to this interrupt signal, CPU 1 starts the NMI interrupt process shown in FIG.

That is, the CPU 1 turns off the peripheral power switch 6 to stop the power supply to the peripheral circuit 5 (step S21). Next, "10001" is set in the data register 7-7 so as not to cause the oscillation phenomenon (power off → on → off →... → abnormal drop in battery voltage) described in the related art. Then, only the on-switch signal output from the on-switch 16 and the normal recovery signal output from the power supply state detection circuit 15 are selected as the wake-up factors (step S22).

The ON switch signal is a signal output when the operator operates the ON switch 16, and does not cause oscillation. Also, no oscillation occurs when the power supply returns to normal.

Then, the HALT instruction is executed and the CPU 1
Is stopped and waits for an interrupt (step S2
3). In this state, the wake-up factor is restricted. Therefore, in this state, for example, even if an alarm interrupt occurs, the user does not wake up. Therefore, the power supply on / off oscillation phenomenon is prevented, unnecessary consumption of the power held by the battery 10 is suppressed, the voltage of the battery 10 is reduced gently, and the minimum necessary for backup to the RAM 3 or the like is provided. The voltage higher than the voltage can be maintained for a long time.

On the other hand, when the ON switch 16 is turned on,
A wake-up signal is output to CPU 1 and the power is turned on. Therefore, when the user has a clear intention, it can be appropriately dealt with.

It is assumed that the user has connected the AC adapter to the AC jack 8 in such a state. Since the power supply voltage is restored by connecting the AC adapter, the battery low voltage detection signal is no longer generated. Further, the AC adapter detection circuit 9 generates an insertion signal corresponding to the detection edge of the AC adapter connection.

For this reason, the power supply state detection circuit 15 generates a normal recovery detection signal based on Equation 2. The normal recovery detection signal is supplied to the wake-up recovery control circuit 7. In the wake-up recovery control circuit 7, the wake-up interrupt signal is generated and supplied to the wake-up interrupt terminal Wake of the CPU 1 because the wake-up recovery control circuit 7 sets the normal recovery detection signal as a valid condition as a wake-up factor.

Accordingly, the CPU 1 exits the halt state, reads the contents of the register 7-8, and analyzes the wake-up factor (step S24). As a result of the CPU 1 reading the wake-up factor, if the wake-up factor is the power supply normal recovery (only), the CPU 1 permits all the wake-up factors and returns to step S23 (step S25).

In step S23, the CPU 1 enters the halt state again. However, in this state, since all the factors have been selected as the wake-up factors, the CPU 1 is immediately woken up when, for example, an alarm interrupt occurs thereafter. As a result, the CPU 1 turns on the peripheral power switch 6 (Step S26) and returns to the main processing (Step S27) because the wake-up factor is a factor other than the power supply normal recovery. According to the above sequence, the wake-up factor is controlled according to the power supply state, and the wake-up condition is appropriately changed, whereby an information device with a power supply control circuit that does not excessively burden the power supply circuit can be configured.

In the above description, by controlling the condition of the wake-up factor based on the state of the power supply, it is possible to avoid the oscillation phenomenon due to the repeated power-on / off based on the automatic wake-up function, and to destroy the contents stored in the memory. Can be effectively prevented. In addition, when the power supply returns to normal, all the wake-up requirements are permitted, so that various interrupts can be dealt with immediately.

Further, when the power state is restored, the CP
Since the configuration is such that U1 is woken up, the wake-up condition can be set as desired by a program that operates the CPU1. Therefore, it can be applied to devices under various use conditions.

The present invention is not limited to the above embodiment, and various modifications and applications are possible. For example, in the embodiment, the change control of the wake-up factor that defines the condition for returning to the wake-up state is performed by the CPU 1, but may be configured by hardware logic designed to have the same function. Good.

In the above description, as a wake-up factor to be restricted in order to prevent an oscillation phenomenon upon detection of a power failure, all wake-up factors other than the detection of normal recovery of the power supply and the ON switch operated by the user are limited. However, all wake-up factors other than the detection of the normal return of the power supply may be limited. In addition, it is also possible to limit only to factors that cause the power supply to return to normal and consume less power.

The circuit configuration shown in FIGS. 1 and 2 and FIG.
The operation flow and the like shown in FIG. 4 are examples, and can be arbitrarily changed and applied.

[0074]

As described above, the power supply control device according to the present invention performs wake-up control based on the wake-up factor corresponding to the state of the power supply. Therefore, appropriate wake-up control can be performed, and memory destruction due to excessive power consumption and unstable operation of the power supply can be effectively prevented.

[Brief description of the drawings]

FIG. 1 is a block diagram schematically showing a configuration of a power supply control device according to an embodiment of the present invention.

FIG. 2 is a block diagram showing in detail a configuration of a wake-up return control circuit of the power supply control device of FIG. 1;

FIG. 3 is a flowchart illustrating an operation of a main process in the power supply control device of FIG. 1;

FIG. 4 is a flowchart illustrating an operation of non-maskable interrupt processing in the power supply control device of FIG. 1;

[Explanation of symbols]

1 CPU (Central Processing Unit) 2 ROM (Read Only Memory) 3 RAM (Random Access Memory) 4
... Off switch, 5 ... Peripheral circuit, 6 ... Peripheral power switch, 7 ... Wake-up recovery control circuit, 8 ... AC (AC) jack, 9 ... AC adapter detection circuit, 10 ... Battery, 11 ... Battery cover switch, 12 ... Cover Open / close detection circuit, 13,
14: Diode, 15: Power supply state detection circuit, 16: ON switch, 17: Alarm circuit, 5-1: LCD (liquid crystal 175-1: LCD (liquid crystal display), 5-2:
Touch panel, 5-3 ... PC card slot, 5-4 ...
Serial interface, 7-1 ... OR circuit, 7-2 ~
7-6: AND circuit, 7-7: Data register, 7-8
…register

Claims (13)

[Claims] A main power supply to a target device is stopped to suspend the target device in a substantially stopped state, and a substantial stop state of the target device is released in response to a predetermined wake-up factor. A wake-up control unit that performs wake-up control of the target device including the main power supply, a power state detection unit that detects a state of a power supply and generates a detection signal, and based on a detection signal of the power state detection unit. And a wake-up factor control means for changing and controlling the wake-up factor in the wake-up control means. 2. The power supply state detection means includes means for determining whether or not the power supply has been consumed to a predetermined level or less. The power supply control device according to claim 1, further comprising a factor limiting unit that limits the wake-up factor to only a predetermined factor when the exhaustion is detected below. 3. The power supply includes a battery. The power state detection means includes means for determining whether or not the voltage of the battery has dropped below a predetermined level. 2. A factor limiting unit that limits the wake-up factor to only a predetermined wake-up factor when the state detection unit detects that the voltage of the battery has dropped below a predetermined level. The power supply control device according to claim 1. 4. When the power supply state detecting means detects that the voltage of the battery has returned to a predetermined level or more,
3. The apparatus according to claim 2, further comprising a restriction release unit configured to release the restriction on the wake-up factor by the factor restriction unit.
Or the power supply control device according to 3. 5. The wake-up factor is limited to only a predetermined wake-up factor including at least one of a factor of least power consumption after power-on, power-on, and power-up after wake-up. The power supply control device according to claim 2, 3 or 4, wherein: 6. The power supply control device according to claim 2, wherein the factor limiting unit includes a unit that excludes connection of the target device to an external device and occurrence of an alarm from wake-up factors. 7. A processing unit for processing data including a processing device having a stopped state and an operating state, and a wake-up control circuit for releasing a stopped state of the processing unit and wake-up in response to a predetermined wake-up factor. A power state detection circuit that detects a state of a power supply and generates a detection signal; and a wake-up factor control circuit that changes the wake-up factor in the wake-up control circuit based on a detection signal of the power state detection circuit. A power supply control device, comprising: 8. The wake-up factor control circuit controls the factor selection circuit based on the detection content of the power supply state detection circuit, and a factor selection circuit for selectively enabling the wake-up factor.
When the power supply state detection circuit detects that the power supply has been consumed to a predetermined level or more, only the cause of low power consumption and power return are valid as the wake-up factor, and the power return state is detected by the power supply state detection circuit. The power supply control device according to claim 7, further comprising a selection control circuit that makes all the wake-up factors valid. 9. The power supply control device according to claim 7, wherein the wake-up factor control circuit is a circuit controlled by the processing unit. 10. The power supply control device according to claim 8, wherein the selection control circuit includes a circuit that limits a wake-up factor only when the power is restored and the power switch is turned on. 11. The power supply control device according to claim 8, wherein the selection control circuit includes a circuit for excluding connection of an external device and occurrence of an alarm from a wake-up factor when power consumption is detected. 12. The apparatus according to claim 7, further comprising stop state setting means for setting said processing section to a stop state based on a detection signal of said power state detection circuit. Power control device. 13. The stop state setting means sets the processing section to a stop state and stops supply of power to a predetermined circuit block. The processing section determines a wake-up factor when the wake-up occurs. When the wake-up factor is only the recovery of the power supply, all the wake-up factors are permitted, and in other cases, a means for restarting the supply of power to the peripheral circuit of the processing unit is provided. The power supply control device according to claim 12, wherein