JPH0982682A - Plasma processing device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To restrain electron shading phenomena and notching from occurring by a method wherein a bias voltage applied in plasma etching is so varied as to accelerate electrons. SOLUTION: A microwave etching device for processing a polysilicon gate generates plasma of high density through such a manner that microwaves generated through a magnetron 20 are introduced into a discharge tube 22 through a waveguide 21, and the introduced microwaves are turned into plasma of high density through electron cyclotron resonance with a magnetic field formed by a coil 23. A pulse power supply 19 is provided, and a pulse voltage of rise speed 10<3> V/μs or above is applied as a bias voltage through the pulse power supply 19. When the potential of an applied pulse voltage is higher than a plasma potential, electrons are accelerated by a voltage difference (electron accelerating voltage) between a substrate potential and the plasma potential so as to impinge on the base of a fine pattern. By this setup, the positive charge of the fine pattern base is neutralized.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a surface treatment apparatus using plasma, and more particularly to a method for applying a bias voltage applied to an object to be treated (sample).

[0002]

2. Description of the Related Art FIG. 2 shows an RF bias, which is the most typical example of conventional bias applying methods. The sample 1 to be etched is connected to a high frequency power source 3 via a capacitor 2 caused by an electrostatic attraction mechanism. A sinusoidal voltage is applied from the high frequency power supply 3. At this time, since the electrons supplied from the plasma 4 are several tens of times larger than the ions, negative charges are accumulated on the sample side of the capacitor 2. Due to this capacitor charge, a negatively shifted voltage appears on the substrate. This negative voltage accelerates the positive ions, which are etching species, and makes them vertically incident on the substrate, thereby enabling vertical etching. In addition to this, as an idea, a method of using a voltage of a pulse waveform as a bias has already been devised in Japanese Patent No. 1095402 and Japanese Patent Laid-Open No. 6-61182.

However, among these known examples, electrons are not accelerated while being incident on the bottom surface of the fine pattern by controlling the bias voltage waveform, and etching is not performed by ions.

[0004]

When a fine pattern is processed by applying a voltage of a conventional sinusoidal substrate bias waveform, a charge-up phenomenon called electron shading occurs at the bottom surface of the fine pattern. This charge-up phenomenon causes various problems in plasma etching. One of the most important problems is the occurrence of local abnormal side etching (notching) in the processing of gate polysilicon. This charge-up phenomenon and notching mechanism are shown in FIG.

In the conventional sinusoidal substrate bias waveform,
Since the positive voltage for accelerating the electrons in the positive cycle in which the electrons enter the sample is almost 0, the electrons are hardly accelerated and enter the substrate. Since the ions 10 are accelerated and enter the sample, they reach the bottom surface of the fine pattern, while the electrons 11 are not accelerated and areotropically incident on the sample, so that the fine pattern is blocked by the mask 12 and reaches the bottom surface. I can't. Therefore, in the fine pattern, the mask is charged up negatively and the bottom surface is charged up positively (electron shading phenomenon). This charge-up repels the ion 10, which is the etching species,
It is incident on the side surface of the pattern. Ions 10 incident on this side surface are locally anomalous side etching 15 at the interface between the polysilicon layer 13 and the underlying silicon oxide film layer 14.
(Notching) occurs. The occurrence of the notching 15 was more remarkable in the case of processing the pattern 18 having the conduction with the substrate than the pattern 17 having no conduction with the substrate 16.

Further, it is known that the charge-up due to the electron shading phenomenon is the main factor causing the gate deterioration by causing the breakdown of the gate insulating film and the V _t shift in addition to the shape abnormality such as notching. .

The present invention provides a method of suppressing the electronic shading phenomenon and solving various problems caused by the phenomenon.

[0008]

According to the present invention, the bias voltage applied in plasma etching is changed from a sinusoidal voltage, which cannot accelerate electrons in a plasma sheath as in the prior art, to a bias capable of accelerating electrons. By replacing, the electronic shading phenomenon and the occurrence of notching are suppressed. Specifically, as shown in FIG. 1 as an example, the bias power source is replaced with a conventional sinusoidal high frequency power source, a pulse power source 19 is installed, and a rising speed of 10 ³ V / μ is used as a bias voltage from the pulse power source.
A pulse voltage of s or more is applied.

[0009]

First, consider the case where a high-speed pulse waveform voltage is applied from the pulse power source 19 in the plasma etching apparatus of FIG. In this case, a bias waveform as shown in FIG. 4 appears on the substrate. While the input voltage is 0, the substrate is in a potential state called floating potential, which is about 20 V lower than the plasma potential. During this time, the bottom surface of the fine pattern on the substrate is shown in FIG.
Positive charge-up due to electronic shading occurs as in the case. On the other hand, the substrate has a potential higher than the floating potential while the positive pulse voltage is applied. When the potential during the application of the pulse voltage is higher than the plasma potential, the voltage of the difference between the substrate potential and the plasma potential (hereinafter referred to as electron acceleration voltage) accelerates the electrons and makes them enter the bottom surface of the fine pattern. As a result, the positive charge-up on the bottom surface of the fine pattern is neutralized. As a result, it is considered that various problems caused by electronic shading such as notching are reduced.

In the apparatus of FIG. 1, a high-speed pulse waveform voltage was applied from the bias pulse power source 19 to actually process the polysilicon gate. As a result, pattern notching was completely eliminated.

[0011]

【Example】

(Embodiment 1) FIG. 1 shows an example of an apparatus in which an electron acceleration pulse bias of the present invention is applied to a microwave etching apparatus for processing polysilicon for gates. In this device, a microwave generated by the magnetron 20 is introduced into the discharge tube 22 through the waveguide 21, and a high-density plasma can be generated by electron cyclotron resonance of the introduced microwave and the magnetic field created by the coil 23. Has become. As a sample 1 to be etched, a 6-inch size Si wafer was thermally oxidized to deposit a polysilicon film, and a resist mask was formed on the polysilicon film.

The resist pattern has a line width of 0.3.
The width of the space is 0.3 μm and the height is 1 μm. The polysilicon film thickness is 0.2 μm. Therefore, the space width / height ratio (aspect ratio) after etching is 4.

The sample 1 is connected to an electrostatic attraction constant voltage source 5 and a bias pulse power source 19 via an electrostatic attraction insulating ceramic 7 having an electrostatic capacity of 30 pF / cm ² . A terminating resistor 24 having a resistance value (40 ohms or more and 60 ohms or less) equivalent to the internal resistance of the power source is attached between the output end of the pulse power source 19 and the ground.
In order to observe the bias waveform, an oscilloscope 25 having a frequency band upper limit value of 100 MHz or more was attached to the output end of the bias pulse power supply 19. In this experimental device, the pulse width was fixed at 100 ns and the duty ratio,
The change in the size of the notch was investigated by changing the size of the pulse voltage.

At this time, the electron density (plasma density) of the plasma is about 1 × 10 ¹¹ / cm ³ , and the saturation ion current is 3 mA.
/ Cm ² . The plasma potential was + 20V. The results of etching are shown in FIG. The magnitude of notching decreases with increasing pulse voltage. Further, the effect of suppressing notching is saturated when the magnitude of the pulse voltage is 50 V or more. Therefore, it is understood that the magnitude of the pulse voltage should be at least 50 V or higher. On the other hand, when a conventional RF bias (800 KHz, 5 W) was applied, large notching was observed.

As shown in FIG. 5, various waveforms were tried as a bias waveform, but as long as a waveform having a moment when the positive peak voltage exceeds the plasma potential is used, a pulse waveform (or rectangular wave), a sawtooth wave A similar effect was observed with a staircase waveform, a combination of these waveforms, or a combination of a sine wave and these waveforms.

The effect of this embodiment is not limited to the microwave etching apparatus, and the same effect can be obtained in a plasma etching apparatus using another discharge method such as an inductively coupled high frequency plasma etching apparatus or a helicon plasma etching apparatus. is there.

(Embodiment 2) FIG. 7 shows an example of an apparatus in which the electron acceleration pulse bias of the present invention is applied to a microwave plasma CVD apparatus for silicon deposition. In this device, the microwave generated by the magnetron 20 is transmitted to the waveguide 2
1 is introduced into the discharge tube 22 through 1 and a high density plasma can be generated by the electron cyclotron resonance of the introduced microwave and the magnetic field generated by the coil 23. As the sample 1 to be deposited, a 6-inch size Si wafer is thermally oxidized. This oxide film is processed into a pattern by etching using a mask, and then a silicon film is buried and deposited in the groove. SiH ₄ or the like was used as the deposition gas.

Although a positively ionized deposit material enters the oxide film groove, the conventional RF bias method accumulates positive charges in the hole to form a film having a uniform film thickness and film quality in the depth direction of the hole. Is not formed. However, a film with uniform film thickness and film quality was formed in the depth direction of the hole by the pulse bias method.

[0019]

By using the present invention, charge-up and local abnormal etching that occur during gate etching are suppressed. Further, it is possible to prevent deterioration of etching characteristics due to other charge-up.

Further, according to the present invention, a uniform film can be formed in the groove in plasma CVD.

[0021]

[Brief description of drawings]

FIG. 1 is a diagram showing an example in which a pulse bias application method of the present invention is applied to a microwave plasma etching apparatus.

FIG. 2 is a diagram showing a configuration of a conventional etching apparatus used for applying an RF bias.

FIG. 3 is a view showing a mechanism of occurrence of local abnormal side etching (notching) in processing a gate polysilicon.

FIG. 4 is a diagram showing an example of a voltage waveform of pulse bias application according to the present invention.

FIG. 5 is a diagram showing another example of a voltage waveform of bias application according to the present invention.

FIG. 6 is for preventing notching of gate etching.
It is a figure which shows the effect of the pulse bias application of this invention.

FIG. 7 is a diagram showing an example in which the pulse bias application of the present invention is applied to a microwave plasma CVD apparatus.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Sample, 2 ... Capacitor, 3 ... Bias high frequency voltage source, 4 ... Plasma, 5 ... Electrostatic adsorption constant voltage source, 6 ... Sample stage, 7 ... Insulating ceramic plate, 8 ... Positive charge, 9 ... Negative charge ,
10 ... Positive ions, 11 ... Electrons, 12 ... Resist mask,
13 ... Polysilicon layer, 14 ... Base silicon oxide film layer,
15 ... Notching, 16 ... Substrate, 17 ... Pattern 1 (without conduction), 18 ... Pattern 2 (with conduction), 19 ... Bias pulse power supply, 20 ... Magnetron, 21 ... Waveguide, 22 ... Discharge tube, 23 ... Coil, 24 ... Termination resistor, 25 ... Oscilloscope, 26 ... Quartz window, 27 ... Shield plate.

Claims (8)

[Claims] 1. A process gas is introduced into a vacuum processing chamber to generate plasma by electric discharge, and a bias voltage for accelerating ions is applied to a workpiece mounting stage in the vacuum processing chamber and the plasma is mounted on the stage. In a plasma processing method for processing an object to be processed placed, a waveform of the bias voltage is such that a portion of the voltage waveform that accelerates ions in the plasma toward the substrate to be processed and electrons in the plasma toward the substrate to be processed. A plasma processing method comprising a portion of an accelerating voltage waveform. 2. The bias voltage according to claim 1 has a cycle of a positive voltage and a negative voltage, the cycle of the positive voltage is shorter than the cycle of the negative voltage, and the maximum value of the positive voltage is larger than the positive plasma potential. The plasma processing method is characterized by having the following moment. 3. A groove formed on the substrate to be processed, a groove having a hole-shaped pattern to be processed, and a hole bottom portion in a portion of a voltage waveform for accelerating electrons in the plasma toward the substrate to be processed according to claim 1. A plasma processing method characterized in that electrons incident from plasma can reach. 4. The shape of the groove or hole of the pattern to be processed according to claim 3, wherein the ratio of the minimum width to the depth (aspect ratio) of the opening (groove, hole bottom) is at least 3 or more. Plasma treatment method. 5. The electron density in plasma is 5 × 10 ¹⁰ / cm.
³ or more, and saturated ion current to the substrate to be processed is 1 mA /
A plasma processing method, characterized in that the bias application method according to claim 1 is used in a process using high-density plasma having a cm ² or more. 6. A plasma processing apparatus for independently controlling a discharge power source for generating plasma and a bias power source for accelerating charged particles to a substrate to be processed, wherein the bias applying method is used. Method. 7. The shape of the bias waveform according to claim 1 is an arbitrary waveform other than a sine wave or a sine wave which is unintentionally deformed by an external factor such as a ripple component. A plasma processing method characterized by a sawtooth wave, a staircase waveform, a combination of these waveforms, or a combination of a sine wave and these waveforms. 8. The plasma processing of claim 1 is plasma etching in which plasma is used and the substrate to be processed is irradiated with ions and electrons using the bias applying method of claim 1. A plasma processing method characterized by being present.