JPH09232627A - White light emitting device - Google Patents
White light emitting deviceInfo
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- JPH09232627A JPH09232627A JP3770096A JP3770096A JPH09232627A JP H09232627 A JPH09232627 A JP H09232627A JP 3770096 A JP3770096 A JP 3770096A JP 3770096 A JP3770096 A JP 3770096A JP H09232627 A JPH09232627 A JP H09232627A
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- light emitting
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- emitting device
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Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、窒化ガリウム系の
発光素子に関するものである。TECHNICAL FIELD The present invention relates to a gallium nitride-based light emitting device.
【0002】[0002]
【従来の技術】家庭用、屋外用の照明に関しては高純度
かつ高信頼性の白色光は得られておらず、信頼性でもLE
Dほど長寿命のものは開発されていない。GaNを用いた高
輝度青色LEDの開発により、AlGaAsの赤色LED及びGaPの
緑色LEDと組み合わせて屋外用フルカラ−パネルディス
プレイが製品化されているが、白色光を得るために少な
くとも3個以上のLEDチップを必要とする。2. Description of the Related Art With respect to domestic and outdoor lighting, white light of high purity and high reliability has not been obtained.
The one with a longer life than D has not been developed. By developing a high brightness blue LED using GaN, an outdoor full color panel display has been commercialized in combination with a red LED of AlGaAs and a green LED of GaP, but at least three or more LEDs are required to obtain white light. Need chips.
【0003】また、GaPの緑色LEDは発光波長が555nmで
黄緑色発光、かつ輝度が数百mcdと低いためにフルカラ
−パネルディスプレイでは高輝度かつ高純度な白色発光
が得られていない。Further, since the GaP green LED has an emission wavelength of 555 nm and emits yellowish green light and has a low luminance of several hundred mcd, a full-color panel display has not been able to obtain white emission with high luminance and high purity.
【0004】さらに、赤色、青色、緑色の3色のLEDチッ
プを樹脂モ−ルドしたLEDで白色光を出そうとすると近
距離からの単色発光が確認できない。また、樹脂に光拡
散剤を使用すれば輝度が下がる。Furthermore, if an LED in which red, blue, and green LED chips of three colors are resin-molded is used to emit white light, monochromatic light emission from a short distance cannot be confirmed. Further, if a light diffusing agent is used for the resin, the brightness will be lowered.
【0005】特開平7−183576号公報では、GaN
を用いたフルカラ−LEDチップの構造が提案されてい
る。図6に示すように、サファイア基板1上にn型の Al0.
23In0.66Ga0.11Nからなるクラッド層2、n型あるいはp型
の In0.89Ga0.11Nからなる活性層3、p型のAl0.23In0.66
Ga0.11Nからなるクラッド層4、n型あるいはp型のIn0.63
Ga0.37Nからなる活性層5、p型のAl0.23In0.66Ga0.11Nか
らなるクラッド層6、n型あるいは p型のAl0.13In0.63Ga
0.24Nからなる活性層7、p型のAl0.23In0.66Ga0.11Nから
なるクラッド層8を順次形成した発光素子である。In Japanese Patent Application Laid-Open No. 7-183576, GaN is used.
A structure of a full color LED chip using is proposed. As shown in Figure 6, n-type Al0.
23In0.66 Ga0.11N cladding layer 2, n-type or p-type In0.89Ga0.11N active layer 3, p-type Al0.23In0.66
Ga0.11N cladding layer 4, n-type or p-type In0.63
Ga0.37N active layer 5, p-type Al0.23In0.66Ga0.11N cladding layer 6, n-type or p-type Al0.13In0.63Ga
A light emitting device in which an active layer 7 made of 0.24N and a cladding layer 8 made of p-type Al0.23In0.66Ga0.11N are sequentially formed.
【0006】この発光素子は各クラッド層に設けられた
電極α、β、γ、δに通電することにより、各活性層
3、5、7が発光するようになっている。この方法では、
発光の際に短波長が長波長に吸収されるのを避けるため
に、長波長側の活性層を基板側に形成している。In this light emitting device, by energizing the electrodes α, β, γ, δ provided on each clad layer, each active layer is activated.
3, 5, 7 are designed to emit light. in this way,
In order to avoid absorption of short wavelengths into long wavelengths during light emission, an active layer on the long wavelength side is formed on the substrate side.
【0007】[0007]
【発明が解決しようとする課題】しかしながら、前述の
方法では基板側に形成されているクラッド層2や活性層3
のIn組成が大きいため、結晶成長の初期段階で素子の結
晶性が下がる。その結果、活性層3、5、7は成長初期に
多く発生した欠陥転位を引き継いで結晶性が大幅に下が
り、素子の信頼性に問題が発生する。However, in the above-mentioned method, the clad layer 2 and the active layer 3 formed on the substrate side are formed.
Because of the large In composition, the crystallinity of the device is lowered in the initial stage of crystal growth. As a result, the active layers 3, 5, and 7 inherit the defect dislocations often generated in the early stage of growth, and the crystallinity is significantly lowered, which causes a problem in device reliability.
【0008】また、前述の方法で白色光を得ようとした
場合、p側で十分に電流が広がらないために電極下部で
各活性層の単色発光があり、近距離では白色光と認識で
きないといった問題点もある。Further, when trying to obtain white light by the above-mentioned method, since the current does not spread sufficiently on the p side, there is monochromatic light emission of each active layer under the electrode, and it cannot be recognized as white light at a short distance. There are also problems.
【0009】本発明は、上記課題を解決し、高輝度、高
純度かつ高信頼性の白色光源を実現できる白色発光素子
を提供することを目的とする。It is an object of the present invention to provide a white light emitting device which solves the above problems and can realize a white light source with high brightness, high purity and high reliability.
【0010】[0010]
【課題を解決するための手段】窒化ガリウム系半導体の
バンドギャップエネルギ−はAlNの6.2eVから InNの1.
89eVまで広範囲にわたり、窒化ガリウム系青色LEDの活
性層であるInXGa1-XN(0≦X≦1)のXを変化させると理
論的には365nmから655nmまでのバンド間発光が可能であ
る。[Means for Solving the Problems] The bandgap energy of gallium nitride-based semiconductors is 6.2 eV for AlN to 1.
By changing X of In X Ga 1-X N (0 ≦ X ≦ 1), which is the active layer of gallium nitride-based blue LED, over a wide range up to 89 eV, theoretically band-to-band emission from 365 nm to 655 nm is possible. is there.
【0011】まず、白色発光素子の課題を解決するため
に、本発明はInXGa1-XN(0≦X≦1)及びAlYGa1-YN (0
≦Y≦1)から構成されている窒化ガリウム系LEDにおい
て、バンドギャップエネルギ−の異なる活性層を3層形
成し、各活性層のバンドギャップエネルギ−を基板に近
い程大きくした白色発光素子である。First, in order to solve the problem of the white light emitting device, the present invention provides In X Ga 1-X N (0 ≦ X ≦ 1) and Al Y Ga 1-Y N (0
This is a white light emitting device in which three active layers with different bandgap energies are formed in a gallium nitride-based LED composed of ≦ Y ≦ 1) and the bandgap energies of each active layer are increased toward the substrate. .
【0012】また、本発明は、活性層のIn組成が異なる
MQW構造をとった白色発光素子であり、活性層とバリア
層の各膜厚は100Aを上限として数10Aまで含む。Further, according to the present invention, the In composition of the active layer is different.
It is a white light emitting device having an MQW structure, and the thickness of each of the active layer and the barrier layer is up to several tens of A, with 100 A being the upper limit.
【0013】活性層の形成においては、本発明は6H-SiC
基板の(0001)面のオフ基板を利用するとInの取り込ま
れが増え、活性層のIn組成を大きくすることができるこ
とを特徴とする。特に、(0001)面の基板の面方位
から、[11−20]方向へ傾斜した基板を使用するとよ
い。In forming the active layer, the present invention provides 6H-SiC.
When the off-substrate of the (0001) plane of the substrate is used, the incorporation of In increases and the In composition of the active layer can be increased. In particular, it is preferable to use a substrate inclined in the [11-20] direction from the plane orientation of the (0001) plane substrate.
【0014】次に、エピウエハ−の加工工程の課題を解
決する方法として、本発明はサファイア基板の研磨によ
るエピ表面の機械的なダメ−ジを緩和するために、エピ
表面をレジストで塗布し、ベ−ク炉で硬化させて保護膜
とした後で、エピ表面側をワックスでガラス板に貼り付
ける方法をとる。Next, as a method of solving the problem of the processing step of the epi-wafer, the present invention applies a resist to the epi-surface in order to alleviate mechanical damage on the epi-surface due to polishing of the sapphire substrate, After curing in a baking oven to form a protective film, the epi surface side is attached to the glass plate with wax.
【0015】発光素子の組立工程の課題を解決する方法
として、本発明はサファイアの両面基板を用いてLEDを
作製し、LEDチップの基板側が天面、エピ側がリ−ドフ
レ−ムに装着されることを特徴とする。As a method of solving the problem of the light emitting element assembling process, the present invention produces an LED by using a double-sided substrate of sapphire, and the substrate side of the LED chip is mounted on the top surface and the epi side is mounted on the lead frame. It is characterized by
【0016】また、LEDの表面酸化を防ぐために、本発
明はSiC基板(ジャスト基板またはオフ基板)またはサ
ファイア基板を用いたLEDチップを反射鏡にマウントし
た後、反射鏡内をチップごとゾルゲルのSiO2で埋めてし
まうことを特徴とする。Further, in order to prevent the surface oxidation of the LED, the present invention mounts the LED chip using a SiC substrate (just substrate or off-substrate) or a sapphire substrate on the reflecting mirror, and then, inside the reflecting mirror, the SiO chip of the sol gel is mounted together with the chip. It is characterized by being filled with 2 .
【0017】[0017]
【発明の実施の形態】以下、本発明の実施例について詳
説する。BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described in detail below.
【0018】(実施の形態1)図1に発光素子の一例と
して、LEDの素子構造を示す。(Embodiment 1) FIG. 1 shows an element structure of an LED as an example of a light emitting element.
【0019】まず、結晶成長をMOCVD法により行
う。図1(a)はサファイア基板を用いた場合である。サフ
ァイア基板1上にn型GaNバッファ層2、n型Al0.1Ga0.9Nク
ラッド層3、n型GaNガイド層4、アンド−プIn0.26Ga0.74
N活性層5、アンド−プGaNバリア層6、アンド−プIn0.46
Ga0.54N活性層7、アンド−プGaNバリア層8、アンド−プ
In0.89Ga0.11N活性層9、p型GaNガイド層10、p型Al0.1Ga
0.9Nクラッド層11、p型GaNコンタクト層12、p型電流拡
散層13の各層を順次積層する。結晶成長後は、N2雰囲
気中でアニ−ルを行う。First, crystal growth is performed by MOCVD. FIG. 1 (a) shows the case where a sapphire substrate is used. On sapphire substrate 1, n-type GaN buffer layer 2, n-type Al0.1Ga0.9N cladding layer 3, n-type GaN guide layer 4, undoped In0.26Ga0.74
N active layer 5, AND-type GaN barrier layer 6, AND-type In0.46
Ga0.54N active layer 7, AND-GaN barrier layer 8, AND-AND
In0.89Ga0.11N active layer 9, p-type GaN guide layer 10, p-type Al0.1Ga
The 0.9N cladding layer 11, the p-type GaN contact layer 12, and the p-type current diffusion layer 13 are sequentially laminated. After the crystal growth, annealing is performed in a N 2 atmosphere.
【0020】ここでIII族原料にはTMG(トリメチルガリ
ウム)、TMA(トリメチルアルミニウム)、TMI(トリメ
チルインジウム)を用い、V族原料にはNH3を用いる。
また、n型ド−パントはSiで原料ガスにSiH4を用い、p型
ド−パントはMgでCp2Mgを用いる。n型ド−パントは他に
Ge、Te、Seがあり、p型ド−パントは他にC、Zn、Ca、Sr
がある。Here, TMG (trimethylgallium), TMA (trimethylaluminum), and TMI (trimethylindium) are used as the group III raw material, and NH 3 is used as the group V raw material.
The n-type dopant is Si and SiH 4 is used as a source gas, and the p-type dopant is Mg and Cp 2 Mg. Other n-type dopants
Ge, Te, Se, and p-type dopants are C, Zn, Ca, Sr.
There is.
【0021】また、図1の素子構造で、バンドギャップ
エネルギーは活性層5で2.75eV、活性層7で2.38eV、活
性層9で2.0eVである。即ち、発光波長では、活性層5は
450nm、活性層7は520nm、活性層9は620nmである。In the device structure of FIG. 1, the band gap energy is 2.75 eV in the active layer 5, 2.38 eV in the active layer 7, and 2.0 eV in the active layer 9. That is, at the emission wavelength, the active layer 5
The thickness is 450 nm, the active layer 7 is 520 nm, and the active layer 9 is 620 nm.
【0022】図1(a)の電極工程は次の手順に従って行
う。図2のように、(1)エピタキシャル層200の全
面にSiO2層16を形成する。ここでは、基板は省略して
いる。(2)p側電流拡散層13が形成されている部分を
フォトリソグラフィ−でパタ−ニングして選択的にレジ
スト202を形成する。(3)パタ−ニングされたSiO2
を除去し、(4)Au/Ni203を蒸着、(5)リフトオフ
を行い、p側電流拡散層以外のAu/Ni203及びレジス
ト202を除去する。The electrode process of FIG. 1 (a) is performed according to the following procedure. As shown in FIG. 2, (1) the SiO 2 layer 16 is formed on the entire surface of the epitaxial layer 200. Here, the substrate is omitted. (2) The resist 202 is selectively formed by patterning the portion where the p-side current diffusion layer 13 is formed by photolithography. (3) Patterned SiO 2
Is removed, (4) Au / Ni203 is vapor-deposited, and (5) lift-off is performed to remove the Au / Ni203 and the resist 202 other than the p-side current diffusion layer.
【0023】次に、(6)SiO2除去、(7)SiO2204を
全面に蒸着、(8)エピのエッチング部分をフォトリソ
グラフィ−でパタ−ニング、(9)エピのエッチング部
分のSiO2を除去、(10)レジスト除去、(11)ECR-REBE
またはRIEによって結晶をn型Al0.1Ga0.9Nクラッド層ま
でエッチング、(12)SiO2除去、(13)エピ全面にSiO2
を形成、(14)n側電極部分をフォトリソグラフィ−で
パタ−ニング(15)Alを蒸着、(16)リフトオフを行
い、n側電極以外のAlを除去、(17)レジストを除去、
(18)電極のシンタ−、(19)p側電極のフォトリソグ
ラフィ−、(20)p側電極部分のSiO2を除去、(21)Au
/Niを蒸着、(22)リフトオフでn電極以外のAu/Ni及
びレジストを除去する。Next, (6) SiO 2 is removed, (7) SiO 2 204 is vapor-deposited on the entire surface, (8) the etched portion of the epi is patterned by photolithography, and ( 2 ) the etched portion of the epi of the SiO 2 is etched. Removal, (10) Resist removal, (11) ECR-REBE
Alternatively, the crystal is etched by RIE to the n-type Al0.1Ga0.9N cladding layer, (12) SiO 2 is removed, (13) SiO 2 is formed on the entire surface of the epi.
(14) n-side electrode part is patterned by photolithography, (15) Al is vapor-deposited, (16) lift-off is performed, Al other than the n-side electrode is removed, (17) resist is removed,
(18) Sinter of the electrode, (19) Photolithography of the p-side electrode, (20) Removal of SiO 2 from the p-side electrode, (21) Au
/ Ni is vapor-deposited, and (22) lift-off is performed to remove Au / Ni and the resist other than the n electrode.
【0024】以上の工程により、図1(a)のp型Au/Ni電
流拡散層13、p型Au/Ni電極14、n側Al電極15、SiO2保護
膜16が形成される。Through the above steps, the p-type Au / Ni current diffusion layer 13, the p-type Au / Ni electrode 14, the n-side Al electrode 15, and the SiO 2 protective film 16 shown in FIG. 1A are formed.
【0025】ウエハ−加工工程は図3に示すように次の
手順に従って行う。(1)電極形成後のエピタキシャル
層が形成されたウエハ−の全面にレジスト塗布、(2)
ベーク炉で硬化、(3)ステッキワックスを硝子板に塗
布、(4)エピウエハーの表面側を貼付、(5)基板側を
ダイヤモンドパウダ−にて研磨を行う。エピウエハ−の
研磨後は、ステッキワックスを溶かしてエピウエハ−表
面のステッキワックス及びレジストを除去する。The wafer processing step is performed according to the following procedure as shown in FIG. (1) Resist coating on the entire surface of the wafer on which the epitaxial layer after electrode formation is formed, (2)
Harden in a baking oven, (3) apply stick wax to the glass plate, (4) stick the front side of the epi-wafer, and (5) polish the substrate side with a diamond powder. After polishing the epi-wafer, the stick wax is melted to remove the stick wax and the resist on the surface of the epi-wafer.
【0026】次に(6)エピウエハ−の基板側を粘着シ
−トに貼り付け、(7)スクライバ−によって、エピ側
をチップサイズに溝を掘る。そして(8)粘着シ−トを
エピウエハ−のエピ側に貼り、今度はエピ表面につけた
溝に沿って基板側にも溝を掘る。この際、ダイシングソ
−を利用し、(9)最後にチップ分離を行う。Next, (6) the substrate side of the epi wafer is attached to the adhesive sheet, and (7) a scriber is used to dig a groove on the epi side to a chip size. Then, (8) an adhesive sheet is attached on the epi side of the epi wafer, and a groove is also formed on the substrate side this time along the groove formed on the epi surface. At this time, using a dicing saw, (9) Finally, chip separation is performed.
【0027】図4に示すように、(1)分離したチップ
を真空ピンセットで取り、Agペ−ストでリ−ドフレ−ム
に装着する。この際、リ−ドフレ−ムには反射鏡を設け
ることが望ましい。As shown in FIG. 4, (1) the separated chips are taken with vacuum tweezers and mounted on a lead frame with Ag paste. At this time, it is desirable to provide a reflecting mirror on the lead frame.
【0028】ここでAgペ−ストを硬化させる。次に
(3)樹脂モ−ルドを行い、樹脂を硬化させる。そして
(4)リ−ドフレ−ムを分離し、半田付けしてLEDが完成
する。Here, the Ag paste is cured. Next, (3) resin molding is performed to cure the resin. Then (4) the lead frame is separated and soldered to complete the LED.
【0029】この白色発光素子は単品では白色点光源と
して利用できる。また、複数の白色LEDを組み合わせれ
ば家庭用あるいは屋外用照明といった光源にも利用で
き、その用途は幅広い。This white light emitting element can be used alone as a white point light source. Also, by combining multiple white LEDs, it can be used as a light source for home or outdoor lighting, and its applications are wide.
【0030】実際LED製造に至るまでの結晶成長工程、
電極工程、加工工程、組立工程の工程も容易である。Ga
N青色LEDの組立工程では、ダイシング後のLEDチップの
リ−ドフレ−ムへのマウントは、通常電極側が天面で片
方の電極にワイヤ−を張る方式でなので、ワイヤ−切れ
も少ない。Crystal growth process up to actual LED manufacturing,
The electrode process, processing process, and assembly process are also easy. Ga
In the assembly process of the N blue LED, the LED chip after dicing is mounted on the lead frame by a method in which the electrode side is usually the top surface and a wire is stretched on one of the electrodes, so there is little wire breakage.
【0031】(実施の形態2)基板にSiC結晶を用いた
場合は、結晶成長は図1(b)のように、n型SiC基板
1’上に、n型AlNバッファ層2’で始まり、n型Al0.1G
a0.9Nクラッド層3、n型GaNガイド層4、アンド−プIn0.2
6Ga0.74N活性層5、アンド−プGaNバリア層6、アンド−
プIn0.46Ga0.54N活性層7、アンド−プGaNバリア層8、ア
ンド−プIn0.89Ga0.11N活性層9、p型GaNガイド層10、p
型Al0.1Ga0.9Nクラッド層11、p型GaNコンタクト層12
を成長する。(Embodiment 2) When a SiC crystal is used as a substrate, crystal growth starts with an n-type AlN buffer layer 2'on an n-type SiC substrate 1 ', as shown in FIG. 1 (b). n-type Al0.1G
a0.9N clad layer 3, n-type GaN guide layer 4, and InP In0.2
6Ga0.74N active layer 5, AND-GaN barrier layer 6, AND-
In0.46Ga0.54N active layer 7, AND-type GaN barrier layer 8, AND-type In0.89Ga0.11N active layer 9, p-type GaN guide layer 10, p
-Type Al0.1Ga0.9N cladding layer 11 and p-type GaN contact layer 12
Grow.
【0032】電極工程は図2の(1)から(5)までを行
う。p側にレジストを全面塗布して基板裏面の電極パタ
−ンを形成した後、p側のレジストを除去する。エピ済
みウエハ−は図3の(6)から(9)までを行い、図5の
(3)に示すような組立を行う。The electrode process is performed from (1) to (5) in FIG. A p-side resist is applied over the entire surface to form an electrode pattern on the back surface of the substrate, and then the p-side resist is removed. The epi-finished wafer is subjected to steps (6) to (9) in FIG. 3 and assembled as shown in (3) in FIG.
【0033】図5の(2)にLEDチップの反射鏡を示す。
大抵のLEDではこの反射鏡内部は樹脂で埋め尽くされ
る。樹脂にはBr、Cl2等が含まれており、かつ水分も透
過するので、電極の酸化防止のため、反射鏡内部を樹脂
の代わりにゾルゲルのSiO2で埋め尽くして硬化させた。
ゾルゲルSiO2は透明かつ電極酸化の原因となる不純物が
ないため、LEDの信頼性の向上が可能である。FIG. 5 (2) shows a reflecting mirror of the LED chip.
In most LEDs, the inside of this reflector is filled with resin. Since the resin contains Br, Cl 2 and the like and also allows water to pass through, the inside of the reflecting mirror was filled with SiO 2 of sol-gel instead of the resin and cured in order to prevent oxidation of the electrode.
Since sol-gel SiO 2 is transparent and has no impurities that cause electrode oxidation, the reliability of the LED can be improved.
【0034】[0034]
【発明の効果】以上のように、本発明によれば白色発光
素子において、LED素子の結晶性を向上させ、均一な
白色光を効率よく取り出すことができ、電極の酸化を抑
制して白色発光素子の信頼性を向上させることができ
る。As described above, according to the present invention, in the white light emitting device, the crystallinity of the LED device can be improved, uniform white light can be efficiently extracted, and the oxidation of the electrode can be suppressed to achieve the white light emission. The reliability of the device can be improved.
【0035】こうして白色発光素子は、1チップのみで
高輝度かつ高信頼性の白色光源を実現する。また、発光
層である3層のInGaN層は、単独ではそれぞれ青、緑、赤
の発光を有するが、基板側またはエピ側から光を得る
時、これらの発光の混色によって均一な白色光となる。
従って、この白色光源用発光素子を複数個組み合わせる
ことで信頼性の高い家庭用照明あるいは屋外用照明とし
て使用可能である。発光素子単品では、白色の点光源と
しても利用できる。Thus, the white light emitting element realizes a white light source of high brightness and high reliability with only one chip. In addition, the three InGaN layers, which are the light emitting layers, individually emit blue, green, and red light, respectively, but when light is obtained from the substrate side or the epi side, a uniform white light is obtained by the color mixture of these light emissions. .
Therefore, by combining a plurality of light emitting elements for the white light source, it can be used as highly reliable home lighting or outdoor lighting. A single light emitting element can also be used as a white point light source.
【図1】本発明の実施例の白色LEDの素子の構造を示
す図FIG. 1 is a diagram showing a structure of a white LED element according to an embodiment of the present invention.
【図2】本発明の実施例に係わる白色LED素子の電極
プロセスを示す図FIG. 2 is a diagram showing an electrode process of a white LED element according to an embodiment of the present invention.
【図3】本発明の実施例に係わる白色LED素子の基板
研磨工程、白色LED素子のチップ加工工程を示す図FIG. 3 is a diagram showing a white LED element substrate polishing step and a white LED element chip processing step according to an embodiment of the present invention.
【図4】本発明の実施例に係わる白色LEDの組立を示
す図FIG. 4 is a diagram showing an assembly of a white LED according to an embodiment of the present invention.
【図5】本発明の実施例に係わる白色LED素子のマウ
ント法を示す図FIG. 5 is a diagram showing a method of mounting a white LED element according to an embodiment of the present invention.
【図6】従来の発光素子の構造断面図FIG. 6 is a structural cross-sectional view of a conventional light emitting device.
1 サファイア(0001)基板 2 アンド−プGaNバッファ層 3 n型Al0.1Ga0.9Nクラッド層 4 n型GaNガイド層 5 アンド−プInGaN層 6 アンド−プGaNバリア層 7 アンド−プInGaN層 8 アンド−プGaNバリア層 9 アンド−プInGaN層 10 p型GaNガイド層 11 p型Al0.1Ga0.9Nクラッド層 12 p型GaNコンタクト層 13 p型Au/Ni電流拡散電極 14 p型Au/Ni電極 15 n型Al電極 16 SiO2保護膜1 sapphire (0001) substrate 2 AND-type GaN buffer layer 3 n-type Al0.1Ga0.9N cladding layer 4 n-type GaN guide layer 5 AND-type InGaN layer 6 AND-type GaN barrier layer 7 AND-type InGaN layer 8 AND -Type GaN barrier layer 9 and-type InGaN layer 10 p-type GaN guide layer 11 p-type Al0.1Ga0.9N cladding layer 12 p-type GaN contact layer 13 p-type Au / Ni current spreading electrode 14 p-type Au / Ni electrode 15 n-type Al electrode 16 SiO 2 protective film
───────────────────────────────────────────────────── フロントページの続き (72)発明者 石橋 明彦 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Akihiko Ishibashi 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd.
Claims (6)
と、前記活性層の両側に形成したバリア層とを備え、 前記バリア層は、AlXGa1-XN(0≦X≦1)であり、前記活
性層は、InYGa1-YN(0≦Y≦1)で構成されており、 前記活性層は、バンドギャップエネルギ−の異なる少な
くとも3層で構成され、前記活性層の各層のバンドギャ
ップエネルギ−が、基板に近いほど大きくなることを特
徴とする白色発光素子。1. A substrate, an active layer formed on the substrate, and barrier layers formed on both sides of the active layer, wherein the barrier layer comprises Al X Ga 1 -X N (0 ≦ X ≦ 1 ), The active layer is composed of In Y Ga 1-Y N (0 ≦ Y ≦ 1), and the active layer is composed of at least three layers having different bandgap energies. The white light-emitting device characterized in that the band gap energy of each layer becomes larger as it gets closer to the substrate.
成が異なる多重量子井戸構造をとることを特徴とする請
求項1に記載の白色発光素子。2. The white light emitting device according to claim 1, wherein the white light emitting device has a multiple quantum well structure in which the In composition of each active layer is different.
板を用いることを特徴とする請求項1に記載の白色発光
素子。3. The white light emitting device according to claim 1, wherein an off-substrate of 6H—SiC (0001) is used as the substrate.
研磨を行う際にあたり、エピタキシャル表面にレジスト
をつけて硬化させることを特徴とする発光素子ののエピ
ウエハ−の加工方法。4. A method for processing an epi-wafer of a light-emitting element, which comprises using a sapphire substrate and, when polishing the back surface of the substrate, applying a resist to an epitaxial surface and curing the resist.
子チップの基板側が天面、エピ側がリ−ドフレ−ムに装
着され、ワイヤ−ボンディングを必要としない構造であ
る発光素子。5. A light emitting device having a structure in which a double side polished sapphire substrate is used, the substrate side of the light emitting device chip is mounted on the top surface, and the epi side is mounted on a lead frame, and wire bonding is not required.
い、発光素子チップを反射鏡にマウントする際、LEDチ
ップを保護するため、前記反射鏡内をゾルゲルSiO 2で埋
めることを特徴とする発光素子の組立方法。6. A SiC substrate or a sapphire substrate is used.
When mounting the light emitting element chip on the reflector,
Sol-gel SiO2 inside the reflector to protect TwoBuried in
A method for assembling a light emitting device, which comprises:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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JP3770096A JPH09232627A (en) | 1996-02-26 | 1996-02-26 | White light emitting device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3770096A JPH09232627A (en) | 1996-02-26 | 1996-02-26 | White light emitting device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH09232627A true JPH09232627A (en) | 1997-09-05 |
Family
ID=12504819
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3770096A Pending JPH09232627A (en) | 1996-02-26 | 1996-02-26 | White light emitting device |
Country Status (1)
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JP (1) | JPH09232627A (en) |
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