JPH0916756A - Chrominance signal system converting device - Google Patents

Abstract

PURPOSE: To reduce the storage capacity of an LUT for chrominance signal system conversion without performing any complicated interpolating arithmetic. CONSTITUTION: An image generator 20 generates the B, G and R data of respective 8 bits. A chrominance signal system converting device 30 converts the B, G and R data to the Y, M, C and K data of respective 8 bits and outputs them. An image recorder 40 records color images based on the YMCK data. Gradation number converting circuits 31-33 convert the B, G and R data of respective 8 bits (namely the B, G and R data of respective 256 gradations) to the B, G and R data of respective 3 bits (namely B, G and R data of respective 8 gradations) so that picture quality can not be lowered as much as possible. A BGR→YMCK converting LUT 34 generates the Y, M, C and K data of respective 8 bits based on the B, G and R data of respective 3 bits.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a color signal system converter for converting a plurality of color separated image data of a first color signal system into a plurality of color separated image data of a second color signal system. .

[0002]

2. Description of the Related Art As color signal systems, there are a BGR signal system which is a representative of additive color mixture and a YMCK signal system which is a representative of subtractive color mixture. In a printing plate making process or the like, it may be necessary to perform conversion from the BGR signal system to the YMCK signal system. In such conversion of the color signal system, a lookup table (hereinafter abbreviated as LUT) is used in order to perform the conversion at high speed.
Is performed using. However, for example, each 8-bit BG
When R data is also converted into 8-bit YMCK data, a huge storage capacity of 4 × 2 ²⁴ words is required as the storage capacity of the LUT.

Therefore, in the conventional color signal system converter, B
The YMCK data for only the upper bits (eg, 4 bits) of the GR data are stored in the LUT. And
Using this LUT, the upper bits of the BGR data are YM
YMCK obtained from the LUT by converting to CK data and using the lower bits (eg, 4 bits) of BGR data
The final YMCK data was obtained by interpolating the data. As an interpolation method, for example, a tetrahedron division method in which a color solid based on BGR data is divided into a plurality of tetrahedra and interpolation is performed in the tetrahedron,
A three-dimensional bilinear method or the like is used in which the color solid based on the BGR data is divided into a plurality of rectangular parallelepipeds, and the volume of each rectangular parallelepiped and the vertex opposite to each rectangular parallelepiped are calculated to perform interpolation.

As such a conventional color signal system conversion device, for example, Japanese Patent Publication No. Sho 58-16180 and Japanese Patent Laid-Open No. Hei.
Those described in JP-A-242372 and JP-A-6-31355 are mentioned.

[0005]

In the conventional color signal system conversion apparatus, the LUT is used by using the lower bits of the color separated image data (BGR data in the above example) before the color signal system conversion.
The color-separated image data (YMCK data in the above example) after the color signal system conversion obtained by the above is interpolated, but the interpolation calculation is complicated. Therefore, if an attempt is made to perform this interpolation operation in real time by an arithmetic circuit, the arithmetic processing takes time, which slows down the overall processing speed and increases the scale of the arithmetic circuit. In addition, it is conceivable that the interpolation is also performed by the LUT without using the arithmetic circuit, but even in that case, there is a problem that it takes time because the complicated interpolation calculation described above needs to be performed in advance.

Therefore, an object of the present invention is to solve the above-mentioned problems of the prior art and to perform a complicated interpolation operation,
It is an object of the present invention to provide a color signal system conversion device capable of reducing the storage capacity of a LUT for color signal system conversion.

[0007]

In order to achieve the above-mentioned object, the invention according to claim 1 uses a plurality of color-separated image data of a first color signal system for a plurality of colors of a second color signal system. A color signal system conversion device for converting into separated image data, each of which corresponds to a plurality of color separated image data of the first color signal system, and the number of gradations M of the corresponding color separated image data (however, M is an integer greater than or equal to 3 and other gradation number N (however, N is M
A plurality of gradation number conversion means for converting into a smaller integer 2 or more) and a plurality of color separation image data of the first color signal system after the gradation number conversion to a plurality of second signal systems. Data conversion means for converting into color separated image data,
The gradation number conversion means multiplies the value of the color-separated image data before gradation number conversion by a coefficient (N-1) / (M-1), and obtains an integer part and a decimal part having one or more digits. Coefficient multiplication result deriving means for outputting a value consisting of and as multiplication result data,
The value of the fractional part data of the multiplication result data is binarized to obtain 2
Binarization means for obtaining value data, and the value of the binary data is added to the value of the integer part data of the multiplication result data, and the obtained value is output as the color separation image data after gradation number conversion. Adding means for

The invention described in claim 2 is the same as claim 1.
In the color signal system conversion device described in (1), the binarization unit adds a random number generation unit that generates random number data and a value of the random number data to the value of the fractional part data, and the highest rank when the addition is performed. Means for obtaining, as the binary data, carry data indicating the presence or absence of a carry exceeding the above range.

[0009] The invention described in claim 3 is the first invention.
In the color signal system conversion device described in (1), the binarizing means generates dither data, and dither data generating means,
Means for adding the value of the dither data to the value of the fractional part data, and obtaining carry data indicating whether or not a carry beyond the most significant digit has occurred as the binary data.
Is provided.

[0010] The invention described in claim 4 is the first invention.
In the color signal system conversion device according to the item (4), the binarizing unit includes a unit that binarizes the value of the fractional part data using an error diffusion method.

[0011]

As described above, according to the first aspect of the present invention, before converting the color separation image data of the first color signal system into the color separation image data of the second color signal system by the data converting means, The tone number conversion unit converts the tone number M of the color separation image data of the first color signal system into a tone number N smaller than that.

In the gradation number converting means, the coefficient multiplication result deriving means converts the value of the color separated image data into a coefficient (N-
1) / (M-1), which is a value consisting of an integer part and a fractional part with one or more digits, and is obtained as multiplication result data, and the separation result is the multiplication result data. And the fractional part of the data, and the binarizing means binarizes the value of the fractional part of the data to obtain the binary data, and the adding means adds the value of the binary part to the value of the integer part of the data. The values obtained by addition are output as color-separated image data after gradation number conversion. In this way, since the gradation number conversion means converts the gradation number of the color-separated image data of the first color signal system, complicated interpolation calculation is unnecessary.

[0013]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing an image recording system provided with a color signal system conversion apparatus as an embodiment of the present invention. The image recording system shown in FIG.
And the color signal system conversion device 30 and the image recording device 40 of this embodiment.
It is composed of

In FIG. 1, each of the image generating devices 20 has eight
Color separation image data of the BGR signal system of bits (that is,
(BGR data) is generated. Examples of the image generation device 20 include an image reading device such as an image scanner and an image storage device using a recording medium such as a magnetic disk and a CD-ROM. The color signal system conversion device 30 as the present embodiment converts each 8-bit BGR data generated from the image generation device 20 into 8-bit YMCK.
The color-separated image data of the signal system (that is, YMCK data) is converted and output. The image recording device 40 records a color image based on each 8-bit YMCK data output from the color signal system conversion device 30.

Here, as shown in FIG. 1, the color signal system conversion device 30 includes three gradation number conversion circuits 31 to 33 respectively corresponding to BGR data, and a BGR → YMCK conversion LUT3.
4 is provided. The gradation number conversion circuits 31 to 33 convert each 8-bit BGR data (that is, each BGR data of 256 gradations) input from the image generation device 20 into each 3-bit BGR data (that is, each 8 bits). It is a circuit for converting into BGR data of gradation. Also, BGR →
The YMCK conversion LUT 34 is a gradation number conversion circuit 31 to 33.
This is a LUT for converting each 3-bit BGR data input respectively to 8-bit YMCK data.

Gradation number conversion circuit 3 used in this embodiment
Nos. 1 to 33 have 256 gradations of BGR data, respectively.
Although the gradation is converted into eight gradations, which is smaller than the gradation, it is devised so that the image quality is not degraded as much as possible even if the gradation number is reduced.

FIG. 2 is a block diagram showing the configuration of the gradation number conversion circuit in FIG. The gradation number conversion circuits 31 to 33 have the same configuration. That is, the gradation number conversion circuit includes the coefficient multiplication LUT 150 and the bit number conversion circuit 10.
0 is provided. Further, the bit number conversion circuit 100 includes an adder 200 and a binarization circuit 300. Furthermore, the binarization circuit 300 includes a random number generator 301 and an adder 30.
2 is provided.

First, the coefficient multiplying LUT 150 receives the 8-bit color-separated image data (ie, B data, G data, or R data) as a coefficient and outputs 7/255 as a coefficient.
And outputs 8-bit color separation image data. Actually, the coefficient multiplication LUT 150 stores the result of multiplying each value of the input 8-bit color separation image data by 7/255, and inputs the 8-bit color separation image data. Then, the multiplication result corresponding to the value is output as 8-bit color separation image data.

Here, the meaning of the coefficient 7/255 is
The denominator “255” corresponds to the change range of the number of gradations of the color separation image data input to the gradation number conversion device, and the numerator “7” is the color separation image to be output from the gradation number conversion device. It corresponds to the variation range of the number of gradations of data. Generally, in the case of n-gradation (n is an integer of 2 or more) color-separated image data, the number of gradations of the color-separated image data can change from the 0th gradation to the (n-1) th gradation. Is (n-1) -0,
It is represented as n-1. Therefore, in the case of 256-gradation input color-separated image data, the change range of the number of gradations is 255, and in the case of 8-gradation output color-separated image data, it is 7. When the coefficient 7/255 as described above is multiplied by the input color separation image data of 256 gradations, all the values of the input color separation image data are 7/2.
Since it is reduced to 55, the change width of the number of gradations of 255 is converted to 7.

In addition, 7 / is added to 8-bit color separation image data.
When multiplying 255 to obtain 8-bit color separation image data, the upper 3 bits of the obtained 8-bit color separation image data are the integer part and the lower 5 bits are the decimal part.

FIG. 3 is a graph showing the conversion characteristics of the color separated image data in the coefficient multiplication LUT 150 of FIG.
3, the horizontal axis represents the number of gradations of the color separation image data input to the coefficient multiplication LUT 150, and the vertical axis represents the number of gradations of the color separation image data output from the coefficient multiplication LUT 150. As shown in FIG. 3, for example, when the number of gradations of the input color separation image data is the 255th gradation (the value of the color separation image data is “11111111”), the coefficient multiplication LUT 150 is used to perform just , And the color-separated image data of the seventh gradation (color-separated image data of “11100000”). Further, the number of gradations of the input color separated image data is the 120th gradation (the value of the color separated image data is “0
1111000 ″), the number of gradations is approximately 3.
28125 color separated image data (“01101001”)
Color separated image data).

Next, the bit number conversion circuit 100 converts the 8-bit color-separated image data output from the coefficient multiplication LUT 150 into 3-bit color-separated image data (that is, 8-gradation color-separated image data). And output.

FIG. 4 is a graph showing the conversion characteristics of the color separated image data in the bit number conversion circuit 100 of FIG.
4, the horizontal axis represents the number of gradations of color separated image data input to the bit number conversion circuit 100, and the vertical axis represents the number of gradations of color separated image data output from the bit number conversion circuit 100. There is. Further, FIG. 5 is an explanatory diagram showing the values of the color separation image data corresponding to the respective gradation numbers shown in FIG.
In FIG. 5, the left column shows the input color separated image data, and the right column shows the output color separated image data.
Further, the value of the color separation image data corresponding to each gradation number is described in each column.

When the 8-bit color separation image data is input from the coefficient multiplication LUT 150, the bit number conversion circuit 100 corresponds to the integer part of the 8-bit color separation image data, as shown in FIG. The upper 3 bits of data are extracted, and the data is output as it is as 3 bits of output color separated image data. For example, LU for coefficient multiplication
When the number of gradations of the color separated image data input from T150 is 3.28125 (“01101001”),
When the upper 3 bits of the 8-bit color-separated image data are extracted, the value of the data is "011", and the 3-bit data is output as output color-separated image data. That is, since it is "011", the gradation number of the output color separated image data is determined to be the third gradation as shown in FIG.

However, in the process using only the upper 3 bits of data in this way, the lower 5 bits of data (“01001” in the above example) corresponding to the fractional part is truncated and is not reflected in the output color separation image data. Therefore, the conversion characteristic becomes stepwise as shown by the dotted line in FIG. Therefore, in this embodiment, the lower 5 bits of data (“01001” in the above example) corresponding to the fractional part are treated as error data, and according to the error data, the rank of the output color separation image data previously determined Conversion is performed by selecting whether to keep the number of tones as it is (remaining at the third gradation in the above example) or changing it to the next higher number of gradations (to change to the fourth gradation in the above example). The characteristic is set to be a smooth characteristic as shown by the solid line in FIG.

Therefore, first, in the bit number conversion circuit 100, the 8-bit color-separated image data output from the coefficient multiplication LUT 150 is converted into upper 3-bit data (that is, integer part data) and lower 5-bit data (that is, , Fractional part data) and the integer part data is added to the adder 2
00, and the fractional part data as error data to the adder 302 of the binarization circuit 300. For example, when the value of the 8-bit color separation image data output from the coefficient multiplication LUT 150 is “01101001” (that is, the number of gradations is 3.28125), the adder 20
“011” is input to 0 as the integer part data, and “01001” is input to the adder 302 of the binarization circuit 300 as the decimal part data.

The binarization circuit 300 binarizes the inputted 5-bit fractional part data and converts it into 1-bit data. That is, the random number generator 301 generates 5-bit random number data. The adder 302 inputs this 5-bit random number data, adds it to the previously input 5-bit fractional part data, and outputs a 1-bit digit indicating whether or not a carry beyond the most significant digit has occurred. Add data to adder 200
Output to For example, if the random number generator 301 generates "11101" as random number data, the value of the fractional part data is "01001" in the above example, and the addition result is "100110". Therefore, since carry has occurred beyond the fifth bit, which is the most significant bit, "1" is output as carry data.

On the other hand, the adder 200 outputs fractional data (that is, carry data) which is binarized error data.
Is input and added to the previously input 3-bit integer part data, and output as 3-bit color separation image data. That is, in the above example, the value of the integer part data is "011" and the value of the carry data is "1".
As the 3-bit color separation image data output from 00, "100" (4th gradation) is output.

In this way, the gradation number of BGR data is set to 256.
Even when converting from gradation to 8 gradations smaller than that,
By performing the conversion by the gradation number conversion circuit shown in FIG. 2, the deterioration of the image quality can be suppressed as much as possible.

The 3-bit BGR data respectively output from the gradation number conversion circuits 31 to 33 is BGR → YMCK.
It is input to the conversion LUT 34. BGR → YMCK conversion L
The UT 34 stores in advance combinations of values of 8-bit YMCK data corresponding to combinations of respective values of 3-bit BGR data, and inputs BGR data from the gradation number conversion circuits 31 to 33. Then, the combination of the values of the YMCK data corresponding to the combination of those values is read and output.

As described above, in this embodiment, BGR → YM
Before the BGR data is converted into YMCK data by the CK conversion LUT 34, the gradation number conversion circuits 31 to 33 are performed.
The number of gradations of BGR data (that is, the number of bits)
Is converted from 256 gradations (8 bits) to 8 gradations (3 bits) smaller than that, the storage capacity of the BGR → YMCK conversion LUT 34 is a relatively small capacity of 4 × 2 ⁹ words. .

Further, in the present embodiment, the gradation number conversion circuit 31
Since the number of gradations of BGR data is only converted according to ~ 33 and complicated interpolation calculation is not necessary, the overall processing speed becomes slower or the scale of the calculation circuit becomes larger, unlike the conventional case. Alternatively, it does not take time and effort.

FIG. 6 is a block diagram showing a color signal system conversion apparatus as another embodiment of the present invention. The image recording system shown in FIG. 6 includes an image generating device 20, first and second color signal system conversion devices 50 and 60 of the present embodiment, an image recording device 40, and an image display device 70.

In FIG. 6, the image generating device 20 and the image recording device 40 are respectively the devices 20, 4 shown in FIG.
Same as 0. In addition, the first color signal system conversion device 50 is
The 8-bit BGR data generated from the image generation device 20 is converted into 8-bit YMCK data and output to the image recording device 40. On the other hand, the second color signal system converter 6
0 converts each 8-bit YMCK data output from the first color signal system conversion device 50 into 8-bit BGR data and outputs the 8-bit BGR data to the image display device 70. Image display device 7
0 displays a color image on the screen based on each 8-bit BGR data output from the second color signal system conversion device 60.

That is, in the image recording system shown in FIG. 6, an image substantially the same as the image recorded by the image recording device 40 is displayed on the image display device 70, and the recorded image is displayed in advance on the display screen. I can check it. The BGR data converted from the YMCK data is used as the BGR data input to the image display device 70 without directly using the BGR data output from the image generation device 20 for the following reason. That is, the first color signal system conversion device 50 causes B
When the GR data is converted into YMCK data, the expression area (specifically, the density range or the color tone range) of the color separation image data is changed by the conversion, and thus the BGR data output from the image generating device 20 is directly converted. This is because when the image is input to the image display device 70, an image substantially similar to the image recorded by the image recording device 40 cannot be displayed on the image display device 70.

In the present embodiment, the first color signal system conversion device 50, as shown in FIG. 6, has three gradation number conversion circuits 51 to 53 respectively corresponding to BGR data and BGR → YMC.
And a K conversion LUT 54. Among these, the gradation number conversion circuits 51 to 53 respectively convert the 8-bit BGR data (that is, the 256-gradation BGR data) input from the image generation device 20 into the 4-bit BGR data.
It is a circuit for converting into data (that is, BGR data of each 16 gradations).

Also, the BGR → YMCK conversion LUT 54
Is an LUT for converting each 4-bit BGR data input from each of the gradation number conversion circuits 51 to 53 into 8-bit YMCK data. That is, BGR → YM
The CK conversion LUT 54 stores in advance a combination of values of 8-bit YMCK data corresponding to a combination of values of 4-bit BGR data, and the gradation number conversion circuit 51.
When the BGR data is input from ~ 53, the combination of the values of the YMCK data corresponding to the combination of those values is read and output.

On the other hand, the second color signal system conversion device 60 uses the YM
Four gradation number conversion circuits 61 to 61 respectively corresponding to CK data
64 and a YMCK → BGR conversion LUT 65. Among these, the gradation number conversion circuits 61 to 64 are the first
Each 8-bit YM input from the color signal system converter 50
It is a circuit for converting CK data (that is, YMCK data of 256 gradations) into YMCK data of 4 bits (that is, YMCK data of 16 gradations), respectively.

Further, the YMCK → BGR conversion LUT 65
Is a LUT for converting each 4-bit YMCK data input from each of the gradation number conversion circuits 61 to 64 into 8-bit BGR data. That is, YMCK → B
The GR conversion LUT 65 stores in advance a combination of 8-bit BGR data values corresponding to a combination of 4-bit YMCK data values, and the gradation number conversion circuit 61.
When YMCK data is input from ~ 64, the combination of the values of the BGR data corresponding to the combination of those values is read and output.

Gradation number conversion circuit 5 used in this embodiment
1 to 53 and 61 to 64 are circuits for converting the number of gradations of the color-separated image data from 256 gradations to 16 gradations, which is less than that, but the gradation number conversion circuit shown in FIG. Similarly to 31 to 33, even if the number of gradations is reduced,
It is designed so that the image quality does not deteriorate as much as possible.

FIG. 7 is a block diagram showing an example of the configuration of the gradation number conversion circuit in FIG. Gradation number conversion circuits 51-5
3 and 61 to 64 have the same configuration. That is, the gradation number conversion device includes the coefficient multiplication LUT 160 and the bit number conversion circuit 110. The bit number conversion circuit 110 includes an adder 210 and a binarization circuit 310. Furthermore, the binarization circuit 310 includes a dither data generator 311 and an adder 312.

First, the coefficient multiplying LUT 160 applies 15/2 as a coefficient to the input 8-bit color separation image data.
Multiply by 55 to output 8-bit color separation image data. That is, the coefficient multiplication LUT 160 stores the results obtained by multiplying each value of 8-bit color separation image data input by 15/255 similarly to the coefficient multiplication LUT 150 of FIG. When the color separation image data of is input, the multiplication result corresponding to the value is output as 8-bit color separation image data.

In the coefficient 15/255, the denominator "255" corresponds to the range of change in the number of gradations of the color separation image data input to the gradation number conversion device, as in FIG. The numerator “15” corresponds to the range of change in the number of gradations of the color separation image data to be output from the gradation number conversion device.

In addition, the 8-bit color separation image data has 15
When multiplying / 255 to obtain 8-bit color separation image data, the upper 4 bits of the obtained 8-bit color separation image data are the integer part, and the remaining lower 4 bits are the decimal part.

That is, the color-separated image data that has changed from "00000000" (0th gradation) to "11111111" (255th gradation) through the coefficient multiplication LUT 160 is "00000000" (0th gradation).
It becomes possible to change from the gradation) to "1110000" (the 15th gradation).

Next, the bit number conversion circuit 110 converts the 8-bit color-separated image data output from the coefficient multiplication LUT 160 into 4-bit color-separated image data (that is, 16 bits).
It is converted into gradation color separation image data) and output. That is, in the bit number conversion circuit 110, the coefficient multiplication LUT1
The 8-bit color-separated image data output from 60 is separated into upper 4-bit data (that is, integer part data) and lower 4-bit data (that is, decimal part data), and the integer part data is added by the adder 210. And the fractional part data as error data to the adder 312 of the binarization circuit 310.

The binarization circuit 310 binarizes the inputted 4-bit fractional part data and converts it into 1-bit data. That is, the dither data generator 311 generates 4-bit dither data.

FIG. 8 is an explanatory diagram for explaining the dither data generated by the dither data generator 311 of FIG. In FIG. 8, (a) shows an example of a dither matrix (dither pattern) for processing 16 gradations (that is, 4 bits), and (b) shows a screen in which a plurality of dither matrices shown in (a) are arranged vertically and horizontally. Indicates.

When a plurality of dither matrices shown in FIG. 8A are arranged on the screen as shown in FIG. 8B, each pixel on the screen must correspond to one of the dither data shown in FIG. 8A. become. Therefore, for example, when the first line on the screen is scanned, the dither data generator 311 causes the dither data generator 311 to change the color separation image data of each pixel each time they are input to the gradation number conversion device. Dither data “13”, “9”, “5”, “14”, ... Corresponding to pixels are sequentially generated.

Further, the adder 312 inputs the 4-bit dither data, adds it to the previously input 4-bit fractional part data, and carries it over the most significant carry.
1-bit carry data that indicates the occurrence of
Output to 10 The adder 210 inputs the decimal part data (that is, carry data) which is the binarized error data, adds it to the previously input 4-bit integer part data, and adds the 4-bit color separation image data. Output as.

As described above, in the gradation number conversion circuit shown in FIG. 7, the dither data generator 311 is used instead of the random number generator 301 shown in FIG. The 256-gradation color-separated image data (that is, 8-bit color-separated image data) is converted into the 16-gradation color-separated image data (that is, 4-bit color-separated image data).

As described above, in the present embodiment, the gradation number conversion circuits 51 to 53, 61 to 64 are used to convert the color separation image data before the conversion of the color signal system by the color signal system conversion LUTs 54 and 64. Since the number of tones (that is, the number of bits) is converted from 256 gradations (8 bits) to 16 gradations (4 bits) smaller than that, L for color signal system conversion is used.
The storage capacity of the UTs 54 and 64 is a relatively small capacity of 2 ¹² words.

Further, in this embodiment, the gradation number conversion circuit 51 is used.
.., 53, 61 to 64, only the number of gradations of the color-separated image data is converted, and complicated interpolation calculation is not required.
There is no increase in the scale of the arithmetic circuit, or no trouble.

FIG. 9 is a block diagram showing another configuration example of the gradation number conversion circuit in FIG. Gradation number conversion circuit 51-
53 and 61 to 64 have the same configuration.
This configuration example is different from the configuration example shown in FIG. 7 in that as a binarizing circuit for binarizing fractional part data (that is, error data), a binarizing circuit for binarizing by an error diffusion method. This is the point where 320 is used. As shown in FIG. 9, the binarization circuit 320 includes an error memory 321, an adder 322, comparators 323 and 324, an AND gate 325, a subtractor 326,
And an error diffusion calculator 327.

Here, the error diffusion method is a method of performing binarization by adding or subtracting a deviation (error) between the decimal part data and the binarized binary data to the decimal part data of the peripheral pixels. is there.
FIG. 10 is an explanatory diagram for explaining the principle of the error diffusion method. In FIG. 10, 71 indicates a screen, an arrow 72 indicates the state of raster scanning, and 73 indicates a pixel on the screen.

Let X be the value of the fractional part data of a pixel P,
When the value of the binary data obtained by binarizing the fractional part data is Y, the error E between the two is expressed by the following equation. E = XY (1)

Therefore, the value of E is diffused to the peripheral pixels. That is, the value of the error E is divided and added to the peripheral pixels. As an example of a typical diffusion process, the value of the error E is distributed to four pixels of A on the right side, B on the lower right side, C on the right side, and D on the lower left side, and the error diffusion rate is 7/1
6, 1/16 for B, 5/16 for C, 3 for D
An example of applying / 16 is well known. A: E × 7/16 B: E × 1/16 (2) C: E × 5/16 D: E × 3/16 Thus, the error diffused to the peripheral pixels is In this case, the data will be stored as error storage data.

The operation of the multi-gradation pixel processing device shown in FIG. 9 will be described. In FIG. 9, a coefficient multiplication LUT
The operations of 160 and the adder 210 are the same as those of the configuration example shown in FIG. 7, and therefore the description thereof will be omitted, and the operation of the binarization circuit 320 will be mainly described. Binarization circuit 32
At 0, the error memory 321 is a memory for storing the above-mentioned error accumulated data, and as shown in FIG. 9, can store the error accumulated data for pixels of two lines on the screen. If the pixel (pixel of interest) corresponding to the input color separated image data is the pixel P, the error memory 321 reads and outputs the error accumulated data stored in the storage position p corresponding to the pixel P. .

The adder 322 has a coefficient multiplication LUT 160.
The lower-order 4-bit fractional part data output from the above is input, and the error accumulation data output from the error memory 321 is input and both are added. The error accumulation data is a total of 5 bits of data obtained by adding 1-bit code data to 4 bits of data. As a result, the error diffused and accumulated from the peripheral pixels is added to the fractional part data of the pixel P. For example, if the value of the decimal part data is “0.7” and the value of the error accumulation data is “0.2”,
The value of the addition data output from the adder 322 is “0.
9 ”.

The comparator 323 inputs the 6-bit (5-bit data + 1-bit code data) addition data output from the adder 322, compares it with the separately input first reference value data, and compares it. As a result, 1-bit binary data is output. Here, 4-bit data “1000” representing “0.5” is used as the first reference value data. That is, the comparator 323 determines that the value of the addition data is “1”.
If it is 000 "(that is," 0.5 ") or more," 1 "is output, and if it is smaller than" 1000 "," 0 "is output. As a result, the addition data output from the adder 322 is binarized. In the case of the above example, the value of the addition data is “0.9”, which is larger than the reference value data “0.5”, so the comparator 323 outputs “1” as binary data.

The binary data thus obtained will be described later.
In the adder 210, the higher-order 4-bit integer part data output from the coefficient multiplication LUT 160 is added, but the value of the integer part data is “1111” (that is, the maximum gradation ““ 15 "),
When the value of the accumulated error data is "0.5" or more and the value of the binary data is "1", an incorrect carry is performed by the addition and an overflow occurs. Will be output.

Therefore, in order to prevent this, in the present embodiment, when the value of the integer part data is "1111", the value of the binary data added in the adder 210 is always "0". I am trying to become. First, the comparator 324
Inputs the integer part data output from the coefficient multiplication LUT 160, compares the integer part data with the second reference value data input separately, and outputs 1-bit data as a comparison result. As the second reference value data, 4-bit data “1111” representing “15” is used. That is, the value of the integer part data of the comparator 324 is “1111” (that is, “15”).
"0" is output in the case of, and "1" in other cases
Is output. Then, the AND gate 325 is operated by the comparator 32.
According to the 1-bit data output from 4, the comparator 3
It is determined whether the binary data output from 23 is input to the adder 210. That is, AND gate 325
When the data output from the comparator 324 is “1” (that is, when the value of the integer part data is other than “15”), the binary data from the comparator 323 is input to the adder 210. However, when it is "0" (that is, when the value of the integer part data is "15"), "0" is always input without inputting the binary data from the comparator 323.

Thus, the AND gate 325 always outputs "0" as binary data when the value of the integer part data is "15", and otherwise the comparator 32.
The binary data from 3 is output as it is. Of the binary data output from the AND gate 325,
"1" represents an integer "1" as it is, and "0" represents "0" as it is.

On the other hand, the subtractor 326 inputs the addition data output from the adder 322, inputs the binary data output from the AND gate 325, and subtracts the binary data from the addition data. As a result, an error between the data before binarization and the data after binarization is derived. In the above example, the value of the addition data is “0.9” and the value of the binary data is “1” (that is, an integer “1”), so the error that is the subtraction result is “−0. 1 ”. The error diffusion computing unit 327 diffuses the error obtained by the subtractor 326 into the peripheral pixels A, B, C, and D for the pixel P as described in FIG. That is, the error diffusion computing unit 327 sets the obtained error as E, multiplies the error E by a coefficient corresponding to each peripheral pixel, for example, as shown in Expression 2, and then calculates the calculation result as the error. Each peripheral pixel A, B, C in the memory 321
The values of the storage positions a, b, c, d corresponding to D are added and stored.

As described above, in the present embodiment, the error diffusion method is used when binarizing the fractional part data.
Although the processing becomes more complicated than the case of using the dither method that uses a fixed pattern as in the configuration example shown in FIG. 7, the reduction in resolution can be reduced.

As described above, in the color signal system conversion device 30 shown in FIG. 1, the gradation number conversion circuits 31 to 33 are connected to each other by the first and second color signal system conversion device 5 shown in FIG.
In the case of 0 and 60, the gradation number conversion circuits 51 to 53 and 61 to 64 have the same configuration, but they may have different configurations. Further, the configuration example of the gradation number conversion circuit is shown in FIG. 2, FIG. 7 or FIG. 9, respectively, but other configurations may be used as long as they do not depart from the scope of the present invention.

[0067]

As described above, claims 1, 2, 3
According to the invention described in (4), before converting the color separation image data of the first color signal system into the color separation image data of the second color signal system by the data conversion means, the gradation number conversion means makes Since the number of gradations of the color-separated image data of one color signal system is converted to a smaller number of gradations, the storage capacity can be reduced when the data conversion unit is configured by the LUT.

Further, since only the number of gradations of the color separation image data of the first signal system is converted by the number-of-gradations converting means and complicated interpolation calculation is not necessary, as in the conventional case,
The overall processing speed does not slow down, the scale of the arithmetic circuit does not increase, and no trouble is involved.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an image recording system provided with a color signal system conversion apparatus as an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a gradation number conversion circuit in FIG.

FIG. 3 is a graph showing conversion characteristics of color separation image data in the coefficient multiplication LUT 150 of FIG.

4 is a graph showing conversion characteristics of color separation image data in the bit number conversion circuit 100 of FIG.

5 is an explanatory diagram showing values of color separation image data corresponding to each gradation number shown in FIG.

FIG. 6 is a block diagram showing a color signal system conversion apparatus as another embodiment of the present invention.

7 is a block diagram showing a configuration example of a gradation number conversion circuit in FIG.

8 is an explanatory diagram for explaining dither data generated by the dither data generator 311 of FIG. 7. FIG.

9 is a block diagram showing another configuration example of the gradation number conversion circuit in FIG.

FIG. 10 is an explanatory diagram for explaining the principle of the error diffusion method.

[Explanation of symbols]

 20 ... Image generating device 30 ... Color signal system conversion device 31-33 ... Gradation number conversion circuit 34 ... BGR-> YMCK conversion LUT 40 ... Image recording device 50 ... First color signal system conversion device 51-53 ... Gradation number conversion Circuit 54 ... BGR-> YMCK conversion LUT 60 ... Second color signal system conversion device 61-64 ... Gradation number conversion circuit 65 ... YMCK-> BGR conversion LUT 70 ... Image display device 71 ... Screen 72 ... Raster scan 73 ... Pixel 100 ... Bit number conversion circuit 110 ... Bit number conversion circuit 150 ... Coefficient multiplication LUT 160 ... Coefficient multiplication LUT 200 ... Adder 210 ... Adder 300 ... Binarization circuit 301 ... Random number generator 302 ... Adder 310 ... Binarization Circuit 311 ... Dither data generator 312 ... Adder 320 ... Binarization circuit 321 ... Error memory 322 ... Adder 323, 324 ... Comparator 32 5 ... AND gate 326 ... Subtractor 327 ... Error diffusion calculator

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁶ Identification code Agency reference number FI Technical display location H04N 1/46 H04N 1/46 Z

Claims (4)

[Claims] 1. A color signal system conversion device for converting a plurality of color separated image data of a first color signal system into a plurality of color separated image data of a second color signal system, wherein the first color signal Corresponding to a plurality of color separation image data of the system, and the number of gradations M of the corresponding color separation image data
(However, M is an integer of 3 or more) is set to another gradation number N (however, N
A plurality of gradation number conversion means each for converting into a smaller integer than M 2) and a plurality of color separation image data of the first color signal system after the gradation number conversion of the second signal system. Data conversion means for converting into a plurality of color separation image data, wherein the gradation number conversion means converts the value of the color separation image data before the gradation number conversion into a coefficient (N−
1) / (M-1), a coefficient multiplication result deriving means for outputting, as multiplication result data, a value consisting of an integer part and a decimal part of one digit or more, and the decimal part data of the multiplication result. Binarizing means for binarizing the value of to obtain binary data, and adding the value of the binary data to the value of the integer part data of the multiplication result data, and converting the obtained value after gradation number conversion. A color signal system conversion device comprising: an addition unit that outputs the color separated image data. 2. The color signal system conversion device according to claim 1, wherein the binarizing means adds a random number generating means for generating random number data, and a value of the random number data to a value of the fractional part data. And a means for obtaining carry data indicating whether or not a carry over the most significant digit occurs when the binary data is added, the color signal system conversion device. 3. The color signal system conversion device according to claim 1, wherein the binarization unit adds a dither data generation unit that generates dither data, and a value of the fraction data to the value of the dither data. And a means for obtaining carry data indicating whether or not a carry over the most significant digit has occurred when the addition is performed, as the binary data. 4. The color signal system conversion device according to claim 1, wherein the binarization unit includes a unit that binarizes a value of the fractional part data by using an error diffusion method. .