JPH09148482A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable easy electric inspection for every bump even after mounting on a mother board, making use of a through hole, and also, improve electric and thermal properties, and raise mounting density, by providing said through hole at the periphery of a base film member. SOLUTION: A semiconductor device has a plurality of electrode pads 26 inside and also is equipped with a periphery, and further this is equipped with a base film member 30 having a plurality of electrode pads 26 at the periphery, a semiconductor chip 21 fixed and supported by the inner electrode pad 26, a wiring for electrically connecting the semiconductor chip 21 with the electrode pad 26 at the periphery, and an external connection pad 35 projecting to the periphery. And, a through hole 31 is provided at the periphery of the base film member 30. By the utilization of this through hole 31, bonding or electric inspection can be performed. Moreover electric and thermal properties can be improved.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a structure in which a semiconductor chip is attached to a device hole provided in a base film and an electrode pad.

[0002]

2. Description of the Related Art Conventionally, as this kind of semiconductor device, there is one described in Japanese Patent Application No. 6-94881.
The semiconductor device described in the above specification is manufactured by fixing a semiconductor chip 21 to an insulating film 20 made of polyimide or the like as shown in FIG. More specifically, sprocket holes 22 for transporting and positioning the film are provided on both sides in the width direction of the film 20, and the film 20 is moved in the longitudinal direction by using the sprocket holes 22. Can be transported.

The film 20 includes a semiconductor chip 2
Opening for positioning 1, ie, device hole 2
3 are provided inside, and four trapezoidal cut holes 24 are formed outside the device holes 23. Therefore, the area of the semiconductor chip 21 is defined by the peripheral area defined inside the cut hole 24.

[0004] In the region of the peripheral portion defined by the film 20, wiring is provided by inner leads 25.
One end of each inner lead 25 is electrically connected to an electrode of the semiconductor chip 21, while the other end of each inner lead 25 is electrically connected to an electrode pad 26 that is dispersed in a region defined by the film 20. It is connected to the. Also,
On each electrode pad 26, a ball-shaped bump 27 formed of solder or the like as an external connection electrode member protrudes in the surface direction in the drawing.

[0005] Also, as shown by a broken line in the drawing,
The partitioned peripheral area other than the bumps 27 is covered with a cover resist 28.
This prevents the inner leads 25 and the like from being contaminated. The semiconductor chip 21 is sealed with a resin together with the inner leads 25 around the semiconductor chip 21.

[0006] Finally, the film 20 is cut into the cut hole 2
The semiconductor chip 21 is cut out from the portion 4.
And a base film member.

In the semiconductor device having the above-described structure, the bumps 27 on the electrode pads 26 can be directly mounted on the motherboard, so that the base film member can be used substantially as a package. Therefore, the above-described semiconductor device has an advantage that it is less expensive than a semiconductor device having a ceramic package or the like. Further, since the wiring region of the inner lead 25 can be limited only to the inside of the cut hole 24, the illustrated semiconductor device is advantageous in terms of miniaturization.

[0008]

However, when the above-described semiconductor device is mounted on a motherboard via the bumps 27, the back surface of the semiconductor chip is directly exposed to the atmosphere, so that the semiconductor chip is easily contaminated, and In addition, there is a disadvantage that each element in the semiconductor chip cannot be electromagnetically shielded. In addition, since the semiconductor device described above is mounted with the surface on which the semiconductor element is formed, that is, the surface on which the bumps are formed, facing the motherboard, the heat dissipation is insufficient. Furthermore, even after mounting on the motherboard, it is necessary to conduct an electrical test on the operation of the semiconductor device by applying a probe to each bump. Was in a difficult situation.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a semiconductor device capable of easily performing an electrical test for each bump even after being mounted on a motherboard.

Another object of the present invention is to provide a semiconductor device which can be shielded electromagnetically and does not cause any problem in terms of contamination and heat radiation.

Still another object of the present invention is to provide a semiconductor device capable of performing bonding by abutting a bonding tool for each bump during mounting.

Another object of the present invention is to provide a semiconductor device manufacturing tape suitable for obtaining the above-mentioned semiconductor device.

[0013]

According to the present invention, a base film member having a plurality of electrode pads inside and a peripheral portion, and a plurality of electrode pads on the peripheral portion, and the inside electrode pad are provided. A semiconductor chip fixed and supported on the wiring, wiring for electrically connecting the semiconductor chip and the electrode pads of the peripheral portion, and an external connection electrode member protruding with respect to the peripheral portion, the base film member A semiconductor device having a through hole in the peripheral portion can be obtained.

As described above, in the present invention, by providing the through hole in the peripheral portion of the base film member, the bonding or electrical inspection can be performed by utilizing the through hole. Also, if protrusions are provided above and below the base film member as external connection electrode members through the through holes, one of the protrusions can be used as an external connection electrode for connection with an electrode on the motherboard. On the other protruding portion, a shield plate or a heat radiating plate can be attached.

[0015]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings.

1 (a), 1 (b), 1 (c), 1 (d),
A semiconductor device according to a first embodiment of the present invention and a method for manufacturing the same will be described with reference to FIGS. First,
As shown in FIG. 1A, a semiconductor chip 21 and a base film member 30 are prepared. The illustrated base film member 30 is made of a non-conductive material such as a polyimide resin, and like the device hole 23 shown in FIG.
In addition, the device hole 23 is surrounded by a peripheral portion defined by a cut hole (not shown), and a plurality of through holes 31 are provided in the peripheral portion, which is shown in FIG. The film 20 is different.

On one surface of the base film member 30 (the surface facing upward in the figure), an inner lead 25 extending from the periphery of the base film member 30 to the inside of the device hole 23 is formed. In addition, an electrode pad provided on the through hole 31, that is, a land 26 is provided at a terminal portion on the peripheral side of the inner lead 25. The upper surface of the land 26, that is, the peripheral region other than the upper part of the through hole 31 is covered with a cover resist, that is, a solder resist 28. Further, the end portion of the inner lead 25 on the device hole 23 side is the semiconductor chip 2
It is electrically connected to the upper chip electrode 32 by bonding.

Next, as shown in FIG. 1 (b),
The semiconductor chip 21 in the device hole 23 is molded with a resin 33. In this state, the land 26 is exposed to the outside without being covered by the cover resist 28.

As shown in FIG. 1C, ball-shaped first bumps 35 are formed on the lands 26 not covered with the cover resist 28 by soldering or the like. It serves as a connection electrode member.

Further, in this embodiment, as shown in FIG. 1D, a metal plate 40 made of copper or the like having a size capable of covering the peripheral portion of the base film member 30 is prepared. The solder resist 41 is applied to the base film member 30 except for the position corresponding to the through hole 31 (on the surface facing upward in the figure). As in the case of the base film member 30, a second bump 42 made of solder or the like is formed on a portion where the solder resist 41 is not attached. As is clear from this figure, the illustrated metal plate 40 has an opening for accommodating the semiconductor chip 21 at the center similarly to the base film member 30.

Next, as shown in FIG. 1E, the above-mentioned metal plate 40 with the second bumps 42 and the base film member 30 having the through holes 31 shown in FIG. 2 bump 42 and through hole 31 of base film member 30
Are inverted so as to face each other. In this inverted state, the second bumps 42 are softened to flow into the through holes 31, and the lands 2 of the inner leads 25 are formed.
6 and the metal plate 40 are electrically connected. by this,
A semiconductor device having projections formed by bumps on both the front and back surfaces of the base film member 30 is obtained. As shown in FIG. 1F, the surface of the base film member 30 on the first bump 35 side is covered with the adhesive layer 43.

2A and 2B, the semiconductor device shown in FIG. 1E is formed into a first bump 35 and a metal plate 40.
A plan view from the side is shown. As is clear from FIG. 2A, the first bumps 35 are arranged around the resin 33 on which the semiconductor chip 21 is molded, and the first bumps 35 are respectively formed on the base film member 3.
0 is connected to the electrode pad of the inner lead.

On the other hand, the metal plate 40 is
And is arranged so as to surround the semiconductor chip 21 molded with the resin 33. The number of the second bumps 42 on the metal plate 40 side is the first
It can be seen that the number is smaller than the number of bumps 35 of FIG. Therefore, the second bumps 42 have a limited number of inner leads 2.
Only 5 is electrically connected. Therefore, the second
Inner leads 25 electrically connected to the bumps 42
The same potential can be applied to both.

The semiconductor device having this configuration is a metal plate 4
By giving a ground potential or a power supply potential, for example, Vcc, to 0, the resistance or inductance in the power supply circuit can be reduced to 1/5 to 1/10. In addition, since the first bump 35 can be electromagnetically shielded by disposing the metal plate 40, a semiconductor device less affected by external noise or the like can be configured. Furthermore,
By providing the through holes 31 in the base film member 30, there is also an advantage that the warpage of the film can be reduced.

Referring to FIGS. 3A and 3B, in the semiconductor device according to the second embodiment of the present invention, the metal plate 40a shown in FIG. 3A has an opening at the center. This is different from the metal plate 40 shown in FIG. In this connection, a solder portion 45 made of silver paste is provided at the center of the metal plate 40a, and around the center, similar to the metal plate 40 shown in FIG. The cover resist 41 is applied except for the land area of the second bump 42.

As shown in FIG. 3B, the metal plate 40a shown in FIG. 3A is placed on the base film 30 having the semiconductor chip 21 and the through holes 31 with the second bumps 42 facing down. Mounted on Therefore, the second bump 42 is positioned so as to face the through-hole 31 of the base film 30, while the central solder portion 45 contacts the back surface of the semiconductor chip 21. In this state, the second
When the bumps 42 and the silver paste of the solder portion 45 are softened and melted, the second bumps 42 are electrically connected to the lands 26 of the inner leads 25 through the through holes 31, while the metal plate 40 a is It is mechanically fixed to the back surface of the semiconductor chip 21 via the solder part 45.

With this structure, the metal plate 40a that is in direct contact with the semiconductor chip 21 can be used as a heat radiating plate (heat spreader), and the elements in the semiconductor chip 21 can be electromagnetically shielded. Also, in this example, when the metal plate 40a is used by applying a predetermined potential thereto, the second bumps 42 are provided with a predetermined number of inner leads 25.
It only needs to be electrically connected. On the other hand, the metal plate 40a
Is used only as a heat sink, the second bumps 42 need not necessarily be electrically connected to the inner leads 25.

In this embodiment, the first and second bumps 35 and 42 connected to the base film member 30 via the through holes 31 are disposed on both surfaces of the base film member 30. This is the same as in the embodiment.

Referring to FIG. 4, there is shown a semiconductor device according to a third embodiment of the present invention. In this example, a through hole 50 is also provided in a metal plate 40b acting as a heat spreader. . In this case, bumps 35 and 42 made of solder or the like and connected through the through holes 31 are projected on both surfaces of the base film 30 having the through holes 31, and a part of the bumps 42 is made of metal. Board 4
0b is inserted into the through hole 50. In this case, these bumps 35 and 42 are used as cover resists 28 and 4.
1 is formed in the uncoated region, as in the above-described embodiment.

In the semiconductor device having the illustrated configuration, the tip of the bump 42 is inserted into the through hole 50 of the metal plate 40b, so that the position of the bump 42 can be seen from the metal plate 40b side. Therefore, the electrical inspection of the semiconductor chip 21 can be performed by bringing the electrical inspection probe into contact with the bump 42.

Referring to FIG. 5, the semiconductor device according to the fourth embodiment of the present invention has a configuration substantially equivalent to the configuration in which the semiconductor devices used in FIG. 1 are vertically stacked. In this connection, corresponding parts are designated by the same reference numerals. More specifically, the lowermost portion includes a semiconductor chip 21 sealed with a resin 33 and a semiconductor chip 21 similar to the case of FIG.
And a land 26 electrically connected to the lower base film member 30 via the inner lead 25. As shown, the lower base film member 30 has a plurality of through holes 31 as in FIG.
Are provided, and bumps 35 protrude from the lower surface of the lower base film member 30. In addition, the bumps 35 of the lower base film 30 are electrically connected to the bumps 35 'projecting downward from the upper base film member 30' through the through holes 31 described above.
Another semiconductor chip 21 'is supported and fixed to the upper base film member 30' by a resin 33 'and inner leads 25'.

As shown in the figure, a through hole 31 'is also formed in the upper base film member 30'.
Some of these through holes 31 'are formed in the land 26 of the bump 35' that protrudes downward from the upper base film member 31 '.
′. Further, in the illustrated embodiment, a metal plate 40 having bumps 42 is mounted on the upper base film member 30 ′ as in FIG.
Each bump 42 is formed in the through hole 3 of the upper base film 30 '.
Via 1 ', it is electrically connected to the bump 35' extending downward of the upper base film 30 '.

In this configuration, as in the case of FIG. 1, a predetermined potential can be applied only to predetermined inner leads 25 and 25 ', and a plurality of semiconductor chips 21 and 21' can be provided.
By laminating 'in the vertical direction, the mounting density can be improved.

Referring to FIG. 6, a semiconductor device according to a fifth embodiment of the present invention will be described with reference to FIGS. 6 (a), 6 (b) and 6 (c).
As shown in FIG. 1, the semiconductor chip 21 is fixed to the base film member 30 having the through hole 31 by the inner lead 25 and the resin 33 in the same manner as in FIG.
A first bump 35 such as solder is formed on the surface of the base film member 30 in the downward direction in FIG. These first bumps 35 have portions embedded in the through holes 31 of the base film member 30, and are electrically connected to the lands 26 of the inner leads 25 provided on the upper surface of the base film member 30. I have. The lands 26 of each inner lead 25 are exposed without being covered by the cover resist 28.

On the other hand, in this embodiment, a circuit board (hereinafter simply referred to as a board) 55 made of ceramic, glass epoxy or the like as shown in FIG. 6D is prepared. The illustrated substrate 55 is configured by a multilayer wiring substrate, and a power supply layer 56 and a ground layer 57 are provided inside the substrate 55. These power supply layer 56 and ground layer 5
7 passes through a via hole 58 formed in the substrate 55,
It is electrically connected to specific lands 61 and 62 of the conductor lands provided on the upper and lower surfaces of the substrate 55. On each land provided on the lower surface of the substrate 55, a ball bump 63 made of solder or the like is provided as an external connection electrode member. Among the first bumps 35 on the base film member 30, except for the signal bumps, the power and ground bumps 35 include the power layer 56 and the ground layer 57 in the substrate 55.
Can be commonly used, so that the ball bumps 6 on the substrate 55 can be used.
The number 3 is the first bump 3 on the base film member 30.
The number may be smaller than the number of five.

Here, the power supply layer 56 and the ground layer 57 formed in the substrate 55 will be described with reference to FIGS. 6 (e) and 6 (f). First, as shown in FIG. 6E, the power supply layer 56 has a via hole 581 to be connected to the power supply bump among the via holes 58 formed in the substrate 55.
And the ground via hole 5 to be connected to the ground bump and the signal bump 35.
82, it is not formed around the signal via hole 583. That is, the power supply layer 56 is provided with the ground via hole 5.
82, are formed so as to surround the signal via hole 583.

On the other hand, as shown in FIG.
7 is a via hole 58 for grounding among the via holes 58.
2 and is formed so as to surround the power supply and signal via holes 581 and 583, whereby the ground layer 57 is connected to the power supply and signal via holes 581 and 583. It is electrically insulated.

In FIG. 6G, the base film member 30 shown in FIG. 6C is laminated on the substrate 55 shown in FIG. 6D. In this case, the first bump 35 of the base film member 30 is
It is positioned to abut on. by this,
The first ball 35 of the base film member 30 and the substrate 5
5 can be electrically connected to the ball bump 63.

In the configuration shown in FIG. 6E, since the lands 26 on the base film 30 are exposed to the outside, the lands 26 are contacted with a bonding tool or an electrical inspection probe to perform bonding or bonding. Electrical inspection can be performed. In addition, the semiconductor chip 2
1 is mounted on the base film member 30 below the substrate 5
5 and the ground electrode and the power supply electrode are shared in the substrate 55, the resistance value of the ground electrode and the power supply electrode,
Since the inductance value can be reduced by 30 to 50% and the substrate 55 also functions as a heat spreader, the thermal resistance value can be reduced to 10 ° C./W. Furthermore, since the base film member 30 is supported by the substrate 55 and has a plurality of through holes 31, warpage of the base film member 30 can be prevented.

A semiconductor device according to a sixth embodiment of the present invention and a method of manufacturing the same will be described with reference to FIGS. As shown in FIG. 7A and FIG.
A base film member 30 having the following structure is prepared. The inner end of the inner lead 25 on the base film member 30 is bonded to the chip electrode of the semiconductor chip 21 by bonding, and the surface of the inner lead 25 is removed except for the land 26. To cover with a cover resist 28. Subsequently, the semiconductor chip 21 is molded with the resin 33.
The steps of FIGS. 7A and 7B are shown in FIGS.
This is the same as the step.

Next, in this embodiment, as shown in FIG. 7C, a semiconductor member is obtained by forming a ball bump 35 on the land 26 of the inner lead 25.

On the other hand, a substrate 55 as shown in FIG. 7D is prepared. This substrate 55 has a power supply layer 56 and a ground layer 57 inside similarly to FIG. 6D, and has lands 61 and 6 electrically connected to the power supply layers 56 and 57 on both front and back surfaces.
2 are formed. The land 6 on the back surface of the substrate 55
2, ball bumps 63 such as solder are formed and mounted.

In FIG. 7E, the semiconductor member shown in FIG. 7C is turned over, and the semiconductor member is placed on the substrate 55 so that the land 61 of the substrate 55 and the bump 35 of the semiconductor member coincide. The semiconductor device is completed by bonding. In the semiconductor device having this configuration, the back surface of the semiconductor chip 21 is exposed and the base film member 3
The zero through-hole 31 is exposed, and the land 26 of the inner lead 25 can be seen through the through-hole 31. Therefore, an electrical inspection can be performed for each inner lead 25 by applying an electrical inspection probe or the like to the land 26 of the inner lead 25 via the through hole 31.

FIGS. 8A, 8B and 8C show a semiconductor device according to a seventh embodiment of the present invention. The illustrated semiconductor device includes a land 61 on a substrate 55.
The land and the inner lead 25 on the base film member 30 are directly connected to each other without the intervention of solder bumps, thereby forming a connection portion 70. In this case, the above connection can be performed by a single point method in which a bonding tool is inserted into the through hole 31 of the base film member 30.

In this embodiment, a concave portion, that is, a cavity portion 65 is provided in the center of the substrate 55, and the concave portion 65 is filled with a silver paste 66.
A structure is provided in which the resin 33 sealing the semiconductor chip 21 and the substrate 55 are adhered to each other. Some of the ball bumps 63 on the substrate 55 are thermally connected to the silver paste in the concave portions 65 of the substrate 55 via thermal via holes. As a result, as shown in FIG. 8C, the ball bumps 63 are also arranged as dummy bumps (heat radiating bumps) on the lower surface of the semiconductor chip 21 to enhance heat radiation.

This structure has an advantage that the heat from the semiconductor chip 21 can be efficiently radiated through the substrate 55 because the semiconductor chip 21 is bonded to the substrate 55 by the silver paste 66.

Referring to FIG. 9, in a semiconductor device according to an eighth embodiment of the present invention, the back surface of semiconductor chip 21 is
The fifth embodiment differs from the embodiment of FIG. 8 in that the fifth recess 65 is bonded with a silver paste 66. As is clear from this, in the example of FIG. 9, the semiconductor member including the semiconductor chip 21 and the base film 30 is turned upside down with respect to FIG. 8 and attached to the concave portion 65 of the substrate 55.

In the case of this embodiment, the lands 62 on which the ball bumps 63 of the substrate 55 are mounted project through the internal wiring of the substrate 55 into the through holes 31 provided in the base film 30 in the form of electrode pins 69. One end of each electrode pin 69 is electrically connected to the inner lead 25. Further, some of the ball bumps 63 provided on the substrate 55 are connected to the silver paste 66 in the concave portions 65 of the substrate 55 as in FIG. 8, thereby enhancing the heat radiation effect.

It has been found that the same effects as those of the semiconductor device shown in FIG. 6 can be obtained in any of the embodiments shown in FIGS. 6 to 9, only the case where the ball bump 63 is provided as the external connection electrode member disposed on the substrate 55 has been described.
The pins may be replaced by pins used in a pin grid array. Further, in each of the embodiments, the side surface of the through hole 31 provided in the base film 30 is not covered with the conductive coating.

10 (a), 10 (b) and 11 (a),
A semiconductor device and a method of manufacturing the same according to a ninth embodiment of the present invention will be described with reference to (b), (c) and (d).

First, as shown in FIG. 10A, the semiconductor chip 21 and the base film member 30 are prepared.
The illustrated base film member 30 is formed of a non-conductive material such as polyimide fiber, and is provided with a plurality of electrode electrode pads 82 inside and a peripheral portion surrounding and partitioning the electrode electrode pads 82, and the peripheral portion includes a plurality of electrode pads. 26 and a plurality of through holes 31 are provided.

A wiring 83 extending from the peripheral portion of the base film 30 to the inside is formed on one surface of the base film member 30. The peripheral portion of the wiring 83 has a terminal portion on the side of the through hole 31. The electrode pad provided on the
Lands 26 are provided. The upper surface of the land 26, that is, the peripheral area other than the upper portion of the through hole 31 is covered with a cover resist, that is, a solder resist 28. Further, the inner end of the wiring 83 becomes an electrode pad 82, which is connected to the chip electrode 81 on the semiconductor chip 21.
For example, they are electrically connected by solder bumps 80.

Next, the surface of the semiconductor chip 21 and the area inside the solder resist 28 are molded with resin 33. In this state, the land 26 is exposed to the outside without being covered by the cover resist 28.

Next, ball-shaped bumps 35 are formed in the through holes 31 with solder or the like, and the bumps 35 serve as external connection electrode members. FIG.10 (b) is this front view.

FIG. 11A is a sectional view for explaining the connection relationship between the semiconductor chip 21 and the electrode pads on the base film member 30. When the connection is made by solder bumps, for example, the electrode pads 81 on the semiconductor chip 21 are connected.
The aluminum electrode is covered with a metal such as copper (Cu) or nickel (Ni) as a barrier metal on the aluminum electrode, and a solder bump is formed on the pad 81 by a plating method or a vapor deposition method.

Electrode pad 8 on base film member 30
2 is formed of, for example, copper or the like, and its surface has a thickness of 0.
Gold plating of about 1 μm to 1.0 μm and 0.1 μm to 0.1 μm.
It is plated with about 5 μm of tin.

By applying a flux to the surface of the electrode pad 82 or the surface of the solder bump 80, aligning them with each other, and performing a reflow process and a cleaning process, as shown in FIG.
The state shown in (b) is obtained.

Next, the resin 33 is applied by the potting method or the like and cured to obtain the state shown in FIG. 11C, and the solder ball supply method or the like is used to obtain the state shown in FIG.
The state shown in (d) is obtained. With this configuration, the semiconductor chip having the flip chip structure can be connected to the tape BGA type semiconductor device.

FIG. 12 shows a semiconductor device according to a tenth embodiment of the present invention. In the same manner as FIG. 10, the semiconductor chip 21 is fixed to the base film member 30 having the through holes 31 by the bumps 80 and the resin 33. Also, bumps 35 such as solder are formed downward on the surface of the base film member 30.

These bumps 35 have portions embedded in the through holes 31 of the base film member 30, and the lands 26 provided on the upper surface of the base film member 30.
Is electrically connected to Further, each land 26 is exposed without being covered by the cover resist 28.

On the other hand, in this embodiment, a circuit board made of ceramic, glass epoxy or the like (hereinafter simply referred to as
A substrate 55 is prepared, which is the same as the substrate shown in FIG. 6, and the lands 61 on the substrate and the solder bumps 35 are connected to each other. Bumps such as solder are also connected to the lands 62 under the substrate.

In this configuration, the semiconductor chip 21 having the flip chip structure is connected to the tape BGA type semiconductor device and is also connected to the substrate having the ground electrode and the power supply electrode built therein. The electrical inspection can be performed by bringing the two into contact with each other. Further, by disposing the substrate 55, the electric resistance value and the inductance value of the package can be reduced by 30 to 50%.

Furthermore, while the base film member 30 is supported by the substrate 55 and has a plurality of through holes 31, it is possible to prevent the base film member 30 from warping.

[0064]

As described above, according to the present invention, by providing the through hole in the base film member, the through hole can be utilized for improving the electrical or thermal characteristics of the semiconductor device. At the same time, there is an effect that it can be used for improving the mounting density.

[Brief description of the drawings]

FIGS. 1A to 1F are views for explaining a semiconductor device and a method of manufacturing the same according to a first embodiment of the present invention.

FIGS. 2A and 2B are diagrams showing a front surface and a back surface of the semiconductor device shown in FIG.

3A and 3B are views for explaining a semiconductor device according to a second embodiment of the present invention.

FIG. 4 is a diagram for explaining a semiconductor device according to a third embodiment of the present invention.

FIG. 5 is a cross-sectional view illustrating a semiconductor device according to a fourth embodiment of the present invention.

FIGS. 6A to 6G are diagrams illustrating a semiconductor device and a method of manufacturing the same according to a fifth embodiment of the present invention.

FIGS. 7A to 7E are views for explaining a semiconductor device and a method of manufacturing the same according to a sixth embodiment of the present invention; FIGS.

FIGS. 8A, 8B, and 8C are a cross-sectional view, a plan view from a semiconductor chip side, and a plan view from a bump side of a semiconductor device according to a seventh embodiment of the present invention. is there.

FIG. 9 is a cross-sectional view illustrating a semiconductor device according to an eighth embodiment of the present invention.

10A and 10B are views for explaining a semiconductor device according to a ninth embodiment of the present invention, in which FIG. 10A is a sectional view and FIG. 10B is a front view.

11A to 11D are sectional views for explaining a method for manufacturing a semiconductor device according to a ninth embodiment of the present invention.

FIG. 12 is a sectional view illustrating a semiconductor device according to a ninth embodiment of the present invention.

FIG. 13 is a diagram for explaining a conventional semiconductor device.

[Explanation of symbols]

 21 semiconductor chip 23 device hole 25 inner lead 26, 26 'land 28 cover resist 30, 30' base film member 31, 31 'through hole 32 chip electrode 33, 33' resin 35, 35 'first bump 40, 40a, 40b Metal plate 41 Cover resist 42 Second bump 45,66 Silver paste 55 Substrate 56 Power supply layer 57 Ground layer 61, 62 land 63 Ball bump 65 Recess 80 Bump 81, 81 Electrode pad 83 Wiring

Claims (4)

[Claims] 1. A base film member having a plurality of electrode pads inside and a peripheral portion, and a plurality of electrode pads on the peripheral portion, a semiconductor chip fixedly supported by the inside electrode pads, Wiring for electrically connecting the semiconductor chip and the electrode pad of the peripheral portion, and an external connection electrode member protruding with respect to the peripheral portion, the through-hole is provided in the peripheral portion of the base film member. A semiconductor device characterized in that 2. The semiconductor device according to claim 1, further comprising a circuit board having a via hole, wherein the external connection electrode member is an external projecting portion projecting to the outside through the via hole of the circuit board. A semiconductor device comprising: 3. The semiconductor device according to claim 1, wherein the semiconductor chip and the base film member are connected to bumps. 4. The semiconductor device according to claim 1, wherein the external connection electrode member is formed of a ball-shaped bump.