JPH08320924A - Graphic processing system - Google Patents

Abstract

PURPOSE: To reduce CPU load required for referring to the status of an FIFO in a graphic accelerator(GA) by preparing virtual GA status information on the CPU side. CONSTITUTION: A GA command conversion means 21 converts a graphic command from a user program 10 into a GA command, and when virtual GA status information 24 is FIFO-NOT-FULL, a GA status information judging means 22 transfers the GA command to an FIFO 51 and a GA plotting means 52 extracts the GA command from the FIFO 51, generates a plotting image and develops the image on a frame buffer(FRB) 60. When the FIFO 51 becomes FIFO-FULL or FIFO-NOT-FULL, a GA status information setting means 53 sends hardware(HW) interruption to a CPU and a virtual GA status information setting means 23 sets up virtual GA status information on the FIFO-FULL or the FIFO-NOT-FULL.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a graphic processing system, and more particularly, to a graphic processing system in which a graphic accelerator (hereinafter abbreviated as GA) different from a central processing unit (hereinafter abbreviated as CPU) is mounted as hardware. Regarding the system.

[0002]

2. Description of the Related Art Conventionally, a GA is provided with one or more processors and a memory in addition to a CPU for high-speed graphic drawing processing.
In a graphics processing system that implements as a hardware, a set of GA commands is sent from the CPU to the GA FIF.
When the data is transferred to O (First-In First-Out), the GA status information of the GA is referenced via the bus and is not FIFO-FULL (FIFO-NO).
After confirming that it is T-FULL)
The A command was transferred to the FIFO.

[0003]

In the above-mentioned conventional graphic processing system, a set of GA commands is converted into a GA FI.
Every time the data is transferred to the FO, the GA status information of the GA is referenced via the bus, and a set of GA commands
FIFO after confirming that the data can be transferred to O
Since the GA command is transferred to the CPU, the load on the CPU for referring to the GA status information is heavy, and there is a problem in that a group of GA commands cannot be transferred efficiently to the FIFO.

In view of the above points, an object of the present invention is to provide a CPU
Does not refer to the GA status information of the GA via the bus, but prepares the virtual GA status information on the CPU side, so that the CPU required to refer to the FIFO status of the GA
The object of the present invention is to provide a graphic processing system capable of significantly reducing the load of the above.

As prior art, Japanese Patent Laid-Open No. 125
Although there is a "graphic display device" disclosed in Japanese Patent No. 619, this device includes a graphic processing unit having a FIFO and a data transfer control unit for sending graphic information to the FIFO, but it uses direct memory access (DMA). It is intended to minimize the overhead at the time of data transfer, and has a different purpose, configuration and effect from the present invention.

[0006]

In the graphic processing system of the present invention, the CPU transfers the GA command to the FIFO,
In a graphic processing system in which a GA command is fetched from a FIFO to perform a graphic drawing process, a GA draws a GA command from the FIFO to generate a drawing image and expands it on a frame buffer, and a FIFO is a FIFO-FULL. When this happens, the HW interrupt is sent to the CPU, and the FIFO becomes FIFO-FIFO after FULL-
GA status information setting means for raising a HW interrupt to the CPU when the status becomes ENTTY, the CPU generates GA command from a graphic command from the user program, and GA command conversion means, and virtual GA status information is FIFO. -FULL, FIFO-NOT-FU
It waits until it becomes LL, and if the virtual GA status information is FIFO-NOT-FULL, GA status information judging means for transferring the GA command generated by the GA command converting means to the FIFO, and HW from the GA.
If the interrupt is an interrupt caused by FIFO-FULL, set FIFO-FULL in the virtual GA status information,
Virtual GA if it is an interrupt due to FIFO-EMPTY
And virtual GA status information setting means for setting FIFO-NOT-FULL in the status information.

[0007]

In the graphic processing system of the present invention, the GA command converting means changes the graphic command from the user program to G.
If an A command is generated and the GA status information determining means determines that the virtual GA status information is FIFO-FULL, FI
Wait until it becomes FO-NOT-FULL, and virtual G
If the A status information is FIFO-NOT-FULL, the GA command generated by the GA command conversion means is transferred to the FIFO, and the GA drawing means changes from the FIFO to the GA.
A command is taken out, a drawing image is generated, and it is expanded on the frame buffer. When the FIFO becomes FIFO-FULL, the GA status information setting means CP
HW interrupt is sent to U, FIFO is FIFO-FULL
HW to CPU when it becomes later FIFO-EMPTY
Raise the interrupt and the virtual GA status information setting means is GA
If the HW interrupt from is an interrupt caused by FIFO-FULL, the virtual GA status information is FIFO-FULL.
Is set, and if the interrupt is caused by FIFO-EMPTY, the virtual GA status information is FIFO-NOT-FUL.
Set L.

[0008]

The present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of a graphic processing system according to an embodiment of the present invention. The graphic processing system according to the present embodiment includes a user program 10, a graphic processing unit 20, a GA 50, a frame buffer (hereinafter, FR).
Abbreviated as B) 60 and a graphic display device 70 constitute a main part thereof. The user program 10
The graphic processing section 20 operates on the CPU (not shown) side. The CPU has two input terminals for hardware (hereinafter abbreviated as HW) interrupts, and the GA50 has H
Equipped with two output terminals for W interrupt, CPU and G
Two interrupt signal lines are connected to A50.

The graphic processing section 20 includes a GA command converting means 21, a GA status information judging means 22, and a virtual GA.
The status information setting means 23 and the virtual GA status information 24 are included.

The GA 50 comprises a FIFO 51, a GA drawing means 52, a GA status information setting means 53, and a GA status information 54.

Referring to FIG. 2, the processing of the GA command converting means 21 comprises a GA command string generating step 211.

Referring to FIG. 3, the processing of the GA status information setting means 22 includes a FIFO-FULL determination step 221 and a GA command transfer step 222.

Referring to FIG. 4, the processing of the virtual GA status information setting means 23 includes a FIFO-FULL interrupt reception determination step 311, a FIFO-FULL setting step 312, and a FIFO-NOT-FULL setting step 313.

Referring to FIG. 5, the processing of the GA drawing means 52 includes a GA command fetching step 521, a drawing image generating step 522, and a drawing image developing step 523.

Referring to FIG. 6, the processing of the GA status information setting means 53 is performed by a FIFO-FULL setting step 531 and a FIFO-FULL interrupt step 532.
And a FIFO-NOT-FULL setting step 533.
And a FIFO-NOT-FULL interrupt step 534.
Consists of

Next, the operation of the graphic processing system of this embodiment having the above configuration will be described.

From the user program 10 to the graphic processing unit 20
When a graphics command is passed to the GA command conversion means 2,
1 is F from the figure command from the user program 10.
A GA command string to be transferred to the IFO 51 is generated (step 211).

When the GA command sequence is generated, or when the GA command sequence is a set of GA commands, the GA status information judging means 22 determines the virtual GA.
If the status information 24 is FIFO-FULL (yes in step 221), wait until it becomes FIFO-NOT-FULL (if FIFO-NOT-FULL (no in step 221), send a group of GA commands to the FIFO 51 of GA50. Transfer (Step 22)
2).

The GA drawing means 52 of the GA 50 is a FIFO.
The GA command is extracted from 51 (step 521),
A drawing image is generated from the fetched GA command (step 522), and the generated drawing image is FRB6.
Expand to 0 (step 523). As a result, drawing is performed on the graphic display device 70.

On the other hand, GA status information setting means 53
Sets the GA status information 54 to FIFO-FULL by an electric signal generated when the FIFO 51 reaches the storage position of FIFO-FULL (step 531) and then raises the HW interrupt to the CPU side (step 5).
32). In addition, the GA status information 54 is stored in the FIFO 51 by an electric signal generated when the FIFO 51 reaches the storage position of the FIFO-EMPTY after the FIFO-FULL.
-After setting NOT-FULL (step 53
3) Raise HW interrupt to CPU (step 53)
4).

Upon receiving the HW interrupt from the GA 50, the virtual GA status information setting means 23 of the graphic processing section 20.
Is a HW interrupt due to FIFO-FULL (Yes in step 311), sets FIFO-FULL in the virtual GA status information 24 (step 31).
2) If it is an interrupt caused by FIFO-EMPTY (No in step 311), virtual GA status information 2
4 is set to FIFO-NOT-FULL (step 313).

FIG. 7 is a timing chart showing an example of the operation of the graphic processing system of this embodiment. It is assumed that to are arranged in order of time.

In the figure processing section 20, the GA status information judging means 22 checks the virtual GA status information 24, and the status is FIFO-NOT-FULL.
Then, a set of GA commands is transferred to the FIFO 51.

Then, in GA50, FI is stored in FIFO51.
When FO-FULL occurs, the GA status information setting unit 53 notifies the graphic processing unit 20 of the HW interrupt, and the virtual GA status information setting unit 23 updates the virtual GA status information 24 to the FIFO-FULL state.

Then, in the figure processing section 20, the GA status information judging means 22 checks the virtual GA status information 24, but since it is FIFO-FULL,
The transfer of the GA command is waited until it becomes FIFO-NOT-FULL.

At the time of GA 50, FIFO 51
FIFO-EMPTY is generated in the virtual machine, the GA status information setting unit 53 notifies the graphic processing unit 20 of the HW interrupt, and the virtual GA status information setting unit 23 outputs the virtual GA status information 24 to the FIFO-NOT-FULL.
It is updated to the state of.

In the figure processing section 20, the GA status information judging means 22 checks the virtual GA status information 24, and the status is FIFO-NOT-FULL.
Then, a group of GA commands is transferred to the FIFO 51.

In the above embodiment, the GA status information 54 is set in the GA 50.
Since the GA status information 54 is not referred to except when an interrupt failure or the like occurs, the setting of the GA status information 54 can be omitted.

[0030]

As described above, according to the present invention, the virtual GA status information is prepared on the CPU side and the state of the FIFO of the GA is notified to the CPU side by the HW interrupt to generate the virtual GA.
By setting the status information, the CP
Compared with the case where the U directly refers to the GA status information of the GA via the bus, the state of the FIFO can be known at extremely high speed, and the CP required to refer to the state of the GA FIFO
There is an effect that the load of U can be significantly reduced and the GA command can be transferred from the CPU to the FIFO of the GA more efficiently.

[Brief description of drawings]

FIG. 1 is a block diagram showing the configuration of a graphic processing system according to an embodiment of the present invention.

FIG. 2 is a flow chart showing a process of a GA command converting means in FIG.

FIG. 3 is a flowchart showing a process of a GA status information judging means in FIG.

FIG. 4 is a flowchart showing a process of virtual GA status information setting means in FIG.

5 is a flowchart showing the processing of the GA drawing means in FIG.

FIG. 6 is a flowchart showing the processing of the GA status information setting means in FIG.

FIG. 7 is a timing chart showing an example of the operation of the graphic processing system according to the present exemplary embodiment.

[Explanation of symbols]

 10 User Program 20 Graphic Processing Unit 21 GA Command Converting Means 22 GA Status Information Judging Means 23 Virtual GA Status Information Setting Means 24 Virtual GA Status Information 50 GA 51 FIFO 52 GA Drawing Means 53 GA Status Information Setting Means 54 GA Status Information 60 FRB 70 Graphic display device

Claims (2)

[Claims] 1. A graphic processing system in which a CPU transfers a GA command to a FIFO, and the GA fetches a GA command from the FIFO to perform graphic drawing processing. In the graphic processing system, the GA fetches a GA command from the FIFO to generate a drawing image and creates a frame. A GA drawing means to be expanded on the buffer and a HW interrupt to the CPU when the FIFO becomes FIFO-FULL, and the FIFO makes FIFO-FU.
GA status information setting means for raising a HW interrupt to the CPU when it becomes FIFO-EMPTY after LL, and the CPU receives the G command from the graphic command from the user program.
A GA command converting means for generating an A command, and a virtual G
FIFO if the A status information is FIFO-FULL
-GA-status information determining means for waiting until the status becomes NOT-FULL, and transferring the GA command generated by the GA command converting means to the FIFO if the virtual GA status information is FIFO-NOT-FULL.
If the HW interrupt from the GA is an interrupt caused by FIFO-FULL, the virtual GA status information will have FIFO-FU.
If LL is set and the interrupt is caused by FIFO-EMPTY, the virtual GA status information is FIFO-NOT-F.
A graphic processing system, comprising: a virtual GA status information setting means for setting ULL. 2. The GA status information setting means is F
When the IFO becomes FIFO-FULL, the GA status information is set to FIFO-FULL and then a HW interrupt is sent to the CPU. When the FIFO becomes FIFO-FULL, the GA status information is changed to FIFO-NOT. -CPU after setting to FULL
The graphic processing system according to claim 1, wherein the HW interrupt is raised.