JPH08223624A - Radio selective call receiver and radio data transmitting system - Google Patents

Abstract

PURPOSE: To shorten time for transmission by avoiding transmission to which an unnecessary redundant bit is added, by adopting a first communication means only with an information bit, to which the redundant bit is not added, when the quality of a communication line is satisfactory by adopting a second communication means with an error correction code, to which the redundant bit is added, when any answer corresponding to normal reception does not come from an opposite side device. CONSTITUTION: The first stage of communication with the opposite device is performed by a receiver 102 and following a synchronizing signal, any redundant bit is not added but only the required information bit is transmitted. When it is judged on this first stage of communication that normal data transmission can not be performed, a CPU 108 controls an encoder 110, converts data related to a received message to the error correction code for the unit of L+M bits, to which the redundant bit of a bit length M is added for each of L bits, and outputs it to a serial transmission part 112 continuously to the synchronizing signal. Further, when it is judged even in this communication that the normal data transmission can not be performed, transmission is performed after executing interleave processing to the error correction code.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a radio selective calling receiver for receiving and storing a transmission signal from a base station for its own device, and particularly, for transmitting information related to the stored reception signal to another device. The present invention relates to a wireless selective call receiver having a function of wirelessly transmitting by wireless and a wireless data transmission system.

[0002]

2. Description of the Related Art Conventionally, in such a wireless selective call receiver, in wireless data transfer for wirelessly transferring the received and stored information to another device, an error occurs in communication data due to noise in the communication line. , There is a technology that adds a fixed number of redundant bits to the information bits required for actual communication in consideration of the receiving sensitivity of the receiver and converts it to a code that can detect and correct errors for communication. . However, with this technology, if the quality of the communication line is extremely good and the reception sensitivity is good, and no error occurs in the transmitted data, conversion processing to error correction code and data transmission caused by adding redundant bits are performed. The increase in time is wasted.

In order to solve such a problem, for example, in Japanese Unexamined Patent Publication No. 63-172535, as shown in FIG. 8, information bits are transmitted according to the quality information of the communication line transmitted from the other party. It has been proposed to change the number of redundant bits to be added to the line to enable communication in the optimum processing time and transmission time according to the line quality at that time and to effectively use the line. In the example of the figure, the redundant bit length M is increased as the line quality information deteriorates.

[0004]

However, in the technique disclosed in the publication, the number of redundant bits added to the information bits increases as the quality of the communication line deteriorates. There is a problem in that the data transmission time for the conversion processing into the correction code is increased and the transmission efficiency is reduced.

When the transmission time becomes longer, the operation of transmitting information related to the stored data is directly related to the battery life in the radio selective call receiver where the battery life is emphasized. As a result, the life of the radio selective call receiver is shortened, which causes practical problems.

[0006]

SUMMARY OF THE INVENTION It is an object of the present invention to enable accurate data transmission without increasing the number of redundant bits added to information bits even if the line quality deteriorates, thereby improving the transmission efficiency and the receiver. It is an object of the present invention to provide a radio selective call receiver and a radio data transmission method capable of improving the life of the radio.

[0007]

A radio selective calling receiver of the present invention communicates with a partner device which transfers data stored in the receiver by adding only necessary information bits without adding redundant bits. In the communication between the first means to be performed and the first means, when the normal reception signal from the partner device with respect to the predetermined communication start signal is not returned, the bit length L
A second means for adding a redundant bit of bit length M to the information bit and converting to an error correction code of bit length L + M for communication.

In this case, it is preferable to have means for detecting the number of error bits in the error correction code and correcting if the number of error bits is correctable.

Further, the receiver of the present invention, in the communication by the second means, the presence or absence of a normal reception signal from the partner device,
A third means is provided for performing interleave processing in which N error correction codes of bit length L + M are set as one unit and communication is performed in accordance with information regarding the number of error bits.

Further, in this case, in the communication by the second means or the third means, the communication speed with the partner device is changed according to the information regarding the presence or absence of the normal reception signal from the partner device and the error bit number. It is preferable to have a possible fourth means.

[0011]

When the quality of the communication line between the receiver and the data transmission partner device is good, the first communication is performed only with the information bit without adding the redundant bit, and the partner device is provided by this first communication means. If the normal response is not received from the other device, the second communication is performed using the error correction code with the redundant bit added, and if the second device does not return the normal reception from the partner device or Judging from the information about the line quality from the device, if it is recognized that accurate communication is impossible even by this second communication, N (N
≧ 2) The third communication is performed in which the interleave processing is performed by using the error correction code as a unit, and then the third communication is performed, and thereafter, N is made variable according to the information from the partner device, so that the redundant bit to be added is added. The third communication is performed without changing the number.

Further, in the second or third communication, the communication speed is changed according to the state of the line quality without changing the amount of data handled.

[0013]

Next, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram of a radio selective calling receiver with a radio data transfer function showing an embodiment of the present invention. In the figure, a radio base station 101 and a radio selective calling receiver (hereinafter, referred to as a receiver) 102 are connected by radio, and the radio base station 101 transmits a transmission signal based on a predetermined format to the receiver 102. To send.

In the receiver 102, the receiving antenna 10
3 receives the transmission signal from the wireless base station 101 and supplies the reception signal to the receiving unit 104. The receiving unit 104 amplifies, demodulates, and further shapes the waveform of the received signal, and outputs the demodulated signal to the decoder 107 via the signal line S101. The decoder 107 cuts out the demodulated signal with a clock having a predetermined cycle generated by dividing the clock supplied from the reference oscillator 115, detects a frame synchronization signal from the cut out bit string, and synchronizes the frame with the transmission signal. To take. After the frame synchronization is established, the CPU 108 sets the signal line S10.
3, the decoder 107 is operated to perform intermittent reception control peculiar to the receiver, so-called battery saving, to the reception unit 104 via the signal line S101.

Further, the receiver 102 is provided with a receiving antenna 105 and a receiving section 106. As will be described later in detail, the receiving antenna 105 receives a reply signal to the normal reception from the partner device, and the reception signal is received. Signal receiving unit 1
At 06, amplification, demodulation, and waveform shaping are performed, and this demodulated signal is supplied to the decoder 107.

Further, the decoder 107 outputs the self-call number preset in the memory 116 built in itself to the signal line S.
108, from the CPU 108 via S103,
When a match of the self-call number is detected for the bit string cut out at a predetermined frame position, and if a match is detected, the self-call message that follows is cut out and set in the cut out bit string and the memory 116. If there are a plurality of self-call numbers that have been identified, information relating to the self-call number for which a match has been detected this time is supplied to the CPU 108 via the signal line S103.

The CPU 108 supplies information regarding the self-call number and the self-call message supplied from the decoder 107 via the signal line S103, and the signal line S10.
The time information read out from the clock unit 117 via 9 is stored in the memory 109 via the signal line S104 for each predetermined bit. At this time, the CPU 108 adopts a storage method in which the order in which the self-call messages are received (old and new) is known in the memory 109. In addition, the received self-call message is a certain cipher, and the standard message for the cipher is previously stored in the memory 109 or the memory 116.
If registered in, the bit string after the fixed message is stored in the memory 109 in a predetermined bit unit.

At the same time, the CPU 108 controls the notification section 119 including the drive circuit by the signal line S111 in order to notify the receiver carrier of the reception of the self-call number and the self-call message.
D, a vibrator, etc. are used for notification, and the memory 109
The bit string of the self-calling message stored in is extracted for each predetermined bit, character conversion is performed, the display unit 118 including the drive circuit is controlled by the signal line S110, and the received message is displayed. As the operation clock of the clock unit 117, the clock supplied from the reference oscillator 115 is divided into a predetermined cycle by the decoder 107 and supplied.

Further, the receiver 102 has a CPU 10
The signal received from 8 is serially output to the transmission unit 112 via the signal line S107.
The serial data received from the encoder 110 is modulated, and the modulated signal is transmitted from the transmission antenna 113 to the partner device.

FIG. 2 is a block diagram showing an embodiment of the internal structure of the encoder 110. This encoder 11
0 is an error correction code conversion circuit 201 which performs error correction code conversion on input parallel data from the CPU 108 based on a control signal from the CPU 108, and a control circuit 2.
02, an interleaver 203 that performs interleave processing described later, a control circuit 202, and an interleaver 203.
The selector 204 for selecting the output of the, the parallel-serial conversion circuit 205, and the output speed control circuit 206 are provided.

FIG. 3 is a block diagram showing an embodiment of a partner device for transmitting data from the receiver 102.
The partner device 302 includes at least the receiving antenna 103, the receiving unit 104, and the memory 11 in the receiver of FIG.
6, a clock unit 117 and a unit excluding the notification unit 119. Here, the corresponding part is
The numbers in the 300s with the same digits are attached.

Next, in the receiver 102 having the above configuration,
As described above, the data related to the received message stored in the memory 109 (the received message itself, the information about the self-call number that received the message, the time information, the fixed message after the expansion, etc., will be simply referred to as data hereinafter) A technique for transmitting to the device 302 by wireless I / F (interface) will be described.

In FIG. 1, the receiver user operates a switch to interrupt the switch unit 120 via the signal line S112 to the CPU 108 for data transmission to the partner device 302. Accordingly, the CPU 108
In order to transmit the data related to the received message stored in the memory 109 to the partner device 302, the memory 1
09 or a synchronization signal 1 preset in the memory 116 and pre-arranged with the partner device (an example of the relationship between the synchronization signal and the data following it is shown in FIG. 4) and a transmission start signal with predetermined bits. The data is read out in units, and the data related to the above-mentioned received data to be transmitted is read out in a predetermined bit unit (in parallel) from the memory 109 via the signal line S104 and output to the encoder 110 via the signal line S105.

In the encoder 110, first, the CP
The synchronization signal 1 and the transmission start signal received from U108 are serially output to the transmission unit 112 via the signal line S107. In the transmitter 112, the encoder 110
The serial data received from is modulated and the modulated signal is transmitted from the transmitting antenna 113 to the partner device 302. At this time, the CPU 108 operates the encoder 110 through the signal line S105, and controls ON / OFF of the transmission unit 112 through the signal line S107. Also, C
The PU 108 transmits the transmission unit 11 via the encoder 110.
The completion of the data transmission in 2 is monitored, and when the transmission is completed, the transmission unit 112 is turned off by the control described above. After that, the CPU 108 prepares for a reply from the partner device 302.
Operates the decoder 107 through the signal line S103,
Further, the receiving unit 106 is turned on via the signal line S102.

In the partner device 302, the receiver 102
The reception antenna 305 receives the transmission signal from the receiver and supplies the reception signal to the reception unit 306. The receiving unit 306 amplifies, demodulates, and further shapes the waveform of the received signal, and outputs the demodulated signal to the decoder 307 via the signal line S302. The decoder 307 cuts out the demodulated signal with a clock of a predetermined cycle generated by dividing the clock supplied from the reference oscillator 315, and performs the above-described operation of detecting the sync signal 1 from the cut bit string. When it is detected, the above-described operation of detecting the transmission start signal is subsequently performed.

Further, when the transmission start signal is detected, the decoder 307 interrupts the CPU 308 through the signal line 303, and the CPU 308 responds to this by receiving a normal reception from the partner receiver 102. The synchronization signal 1 which is set in the memory 109309 in advance and which is arranged in advance with the partner receiver,
The normal reception signal is read through the signal line S304, and those bit strings are output in a predetermined bit unit (in parallel) to the encoder 310 through the signal line S305.

In the encoder 310, the output data from the CPU is serially converted and passed to the transmitting section 312 through the signal line S307. The transmitting unit 312 modulates the serial data received from the encoder 310, and transmits the modulated signal from the transmitting antenna 313 to the partner receiver.

Next, in the receiver 102, the partner device 302
A return signal (normal reception signal described above) to the normal reception from is received by the reception antenna 105, the reception signal is amplified, demodulated, and waveform shaped by the reception unit 106, and the demodulated signal is supplied to the decoder 107. The decoder 107 cuts out the demodulated signal at a predetermined clock and interrupts the CPU 108 when a normal reception signal is detected subsequent to the synchronization signal 1. On the other hand, the CPU 108 determines that the quality of the communication line is good, and determines that the signal line S105.
The encoder 110 is controlled via the
Then, the data related to the received message read from the memory 109 is serially output to the transmission unit 112.
The transmitting unit 112 modulates the received serial data and transmits the modulated signal from the transmitting antenna 113 to the partner device.

Next, when the partner device 302 does not return the normal reception signal because the synchronization signal 1 or the transmission start signal is not detected, or the normal reception signal is returned, the receiver 102 Sync signal 1 or
A case where a normal reception signal is not detected will be described.

In the receiver 102, the decoder 107 outputs a normal reception signal from the partner device even if a predetermined time has elapsed after transmitting the transmission start signal to the partner device after the synchronization signal 1. If not detected, CPU 10
8 indicates that the quality of the communication line is not good, and the memory 1
09 or a synchronization signal 2 set in the memory 116, which is different from the one described above, is read out, and this synchronization signal 2 is supplied to the encoder 110.

In the encoder 110, a redundant bit having a bit length M is added to the transmission start signal (bit length L) and converted into an error correction signal such as a BCH code, which is followed by the synchronization signal 2 and the transmission section 112. Output serially to. The transmitting unit 112 modulates the received serial data and outputs the modulated signal from the transmitting antenna 113 to the partner device 302.
Send to.

The partner device 302 receives the transmission signal as described above, and the decoder 307 detects the synchronization signal 2 while detecting the synchronization signal 2 while allowing the mismatch of the predetermined number of bits. Then, error detection and correction are performed on the subsequent data of L + M bit length, and the result of the correction is L
The CPU 308 is informed by interrupting the information indicating whether the transmission start signal having the bit length is correctly detected and the error detection result. In the CPU 308, the memory 309
The synchronization signal 2 read from the above and the information received from the decoder 307 are set in a predetermined bit unit in the encoder 310.
The encoder 310 adds the redundant bit of the bit length M to the information (bit length L) from the decoder 307 and converts it into an error correction code, as in the present transmission in the receiver 102. Following the synchronization signal 2, the transmitter 3
Output to 12 serially. The transmitting unit 312 modulates the received serial data and transmits the modulated signal from the transmitting antenna 313 to the partner receiver.

Next, in the receiver 102, the partner device 302
The transmission signal from the decoder 107 is received as described above, and the decoder 107
Then, the synchronization signal 2 is detected while allowing the predetermined number of bits to be inconsistent. When the synchronization signal 2 is detected, error detection is performed on the data of the subsequent L + M bit length,
Correction is performed, and then the CPU 108 is interrupted to pass the error detection result and the corrected data.

When the CPU 108 analyzes the data received from the decoder 107 and determines that accurate data transmission can be performed by the present transmission method (when the predetermined condition is satisfied), it controls the encoder 110. Then, the data related to the received message read from the memory 109 is converted into an error correction code in L + M bit unit (hereinafter, this unit is referred to as a codeword) in which a redundant bit of a bit length M is added for each L bit, and synchronization is performed. Following signal 2,
These codeword groups are serially output to the transmitter 112. The transmitting unit 112 modulates the serial data as described above and transmits the modulated signal from the transmitting antenna 113 to the partner device.

When the CPU 108 determines that accurate data transmission cannot be performed by the present transmission method, or when the decoder 107 does not detect the synchronization signal 2 from the partner device even after the lapse of a predetermined time, CPU 108
Preset in the memory 109 or the memory 116,
The synchronization signal 3 different from the above-mentioned synchronization signal is read out, the encoder 110 is controlled, the data related to the transmission start signal and the reception message read out from the memory 109 is code-converted into the above-mentioned codeword unit, and further so-called interleave processing is performed. Then, the synchronization signal 3 and the serial signal are serially output to the transmission unit 112.

In this interleaving process, as shown in FIG. 5, data of one codeword is arranged horizontally in L + M bit strings, and vertically N (≧ 2) codeword rows (hereinafter, these N codewords are collectively coded. It is called a block), and it is arranged in order from the first bit of each row, that is, D ₁₁ D ₂₁ D ₃₁ ... DN ₁ D ₁₂ D ₂₂ D ₃₂ ... DN ₂ ... D _1L D
_2L D _3L … D _NL C ₁₁ C ₂₁ C ₃₁ … C _N1 … C _1M C _2M C _3M … C _NM
Rearrange in order. In the transmitter 112, the procedure is as described above.
The received serial data is modulated and transmitted from the transmitting antenna 113 to the partner device.

Next, the partner device 302 receives the transmission signal from the receiver 102 in the above-described manner, and the decoder 307 allows the predetermined number of bits to be inconsistent, while detecting the synchronization signal 3. When the synchronization signal 3 is detected, the process of interchanging the transmission bit order (interleave process) performed when the partner receiver transmits data of the subsequent N codewords (1 code block) is the reverse of the process. Processing (deinterleave processing) to cancel interleaving, perform error detection and correction for each codeword, and as a result of the correction, information on whether the transmission start signal was correctly detected and error detection in each codeword The result is notified to the CPU 308 by interrupting it.

The CPU 308 outputs the above-mentioned synchronization signal 3 read from the memory 309 and the information received from the decoder 307 to the encoder 310 in a predetermined bit unit. In the encoder 310, similarly to the current transmission in the receiver 102, The information from the decoder 307 is divided into L bits, redundant bits of a bit length are added to each, and converted into error correction codes in codeword units,
The data of these N codewords (if the data is less than the N codewords, the remaining codewords are filled with a predetermined termination signal) is subjected to the above-mentioned interleaving processing, and these bit strings are converted into the synchronization signal 3 Then, the signal is serially output to the transmission unit 312, modulated in the above-described manner, and the modulated signal is transmitted from the transmission antenna 313 to the partner receiver.

Subsequently, the receiver 102 receives the transmission signal from the partner device as described above, and the decoder 10
7, the sync signal 3 is detected while allowing the predetermined number of bits to be inconsistent. When the sync signal 3 is detected, the deinterleaving process described above is performed on the subsequent N codeword data. , Error detection and correction are performed for each codeword, and then the CPU 108 is interrupted to pass the error detection result and the corrected data.

When the CPU 108 analyzes the data received from the decoder 107 and determines that accurate data can be obtained by this transmission method, it controls the encoder 110 and relates to the received message read from the memory 109. Error code conversion and interleaving processing are performed on the remaining data, and these bit strings are serially output to the transmission unit 112 following the synchronization signal 3. Transmitter 11
In 2, the serial data is modulated as described above, and the modulated signal is transmitted from the transmitting antenna 113 to the partner device.

When the CPU 108 determines that accurate data transmission cannot be performed by this transmission method, or when the decoder 107 does not detect the synchronization signal 3 from the partner device even after a predetermined time has passed, Subsequent transmission processing to the partner device is a unit for performing interleaving processing when the encoder 110 performs interleaving processing after error correction code conversion on data related to the transmission start signal and the reception data read from the memory 109. While increasing the number N of code words forming one code block at any time (until it is judged by the response from the partner device that accurate data transmission can be performed), the bit string after this interleave processing is serialized following a predetermined synchronization signal. It is done so as to output to.

As described above, in the receiver 102, the first-stage communication with the partner device 302 is a simple one in which only the necessary information bits are transmitted without adding a redundant bit after the synchronization signal. If it is determined that normal data transmission is not possible in this first stage communication, then as the second stage communication, following the synchronization signal, an error correction code in which redundant bits are added to the necessary information bits is added. To be transmitted. Furthermore, if it is determined that normal data transmission is not possible even in this second-stage communication, then as the third-stage communication, the error correction code is interleaved and transmitted following the synchronization signal. .

If it is determined that the normal data transmission is not possible even by using the method of the third step, the interleave processing in the communication of the third step is performed as the communication of the fourth step and thereafter. By increasing the number of codewords that make up one code block, which is the unit to be processed, the effect of sudden noise is distributed to more codewords in the form of a small number of bit errors that can be corrected. Enables accurate data transmission.

In the communication from the first stage to the fourth stage, it is not necessary to repeat the communication at the same stage after starting the communication with the partner device 302, and the communication at each stage is dynamically switched. For example, when data is being transmitted by the second-stage communication means, it can be judged from the information on the line quality (error detection result, etc.) that is periodically returned from the partner device 302 that accurate data transmission cannot be performed as it is. For example, the information about the line quality (error detection result, etc.) which is periodically returned from the partner device 302 when the communication is switched to the third stage communication or conversely when data is transmitted by the third stage communication means. Therefore, if it is judged that the current line condition is very good, the method of switching to the second stage communication is adopted.

Separately from the communication means described so far, the encoder 102 transmits the data format used for the above-mentioned second stage or third stage communication in each of the receiver 102 and the partner device 302. The serial control unit controls the speed at which data other than the synchronization signal is serially output, and the transmission unit receives the serial data received after the predetermined synchronization signal according to the speed supplied from the CPU via the encoder. There is a communication means that modulates the signal and transmits the modulated signal from the transmitting antenna. According to this means, if it is determined that the line quality is good from the reply signal from the partner device, If data transmission is performed and conversely it is determined that the line quality is not good, data transmission at a slower speed enables more accurate data transmission.

In practice, this data transmission rate is also dynamically switched according to the information (error detection result, etc.) regarding the line quality which is periodically returned from the partner device. Further, in the communication means having a variable data transmission rate, the receiver 102 or the decoder of the partner device 302 has the type of the synchronization signal detected from the received signal (the content of the synchronization signal varies depending on the data transmission rate, but the synchronization signal itself). The transmission rate is constant), and the clock (sampling period) for cutting out the subsequent data is switched.

In the partner device 302, when the device user operates a switch to interrupt the data read from the switch section 320 to the CPU 308 via the signal line S312, the CPU 308 causes the receiver 102 to read the data. The data transmitted and stored in the memory 309 is cut out for each predetermined bit, character conversion and the like are performed, and the display unit 318 including the drive circuit is controlled by the signal line 310 to display the data.

The above embodiments have been described by taking a case of using radio waves as a means for performing wireless data communication between two devices, but as shown in FIGS. 6 and 7, each device is described. In 102A and 302A, light receiving circuits 706 and 8 including a light receiving element instead of the receiving antenna and the receiving unit.
06, if the light emitting circuits 712 and 812 including light emitting elements are used instead of the transmitting unit and the transmitting antenna, not radio waves but
Wireless data communication using infrared rays is also possible. At this time, in the light receiving circuit, the optical signal received by the light receiving element is converted into an electric signal, amplified, and output to the decoder. Further, in the light emitting circuit, the transmission electrical signal serially output from the encoder is converted into an optical signal and output from the light emitting element.

[0049]

As described above, according to the present invention, when the quality of the communication line is good, the first communication means is used only with the information bit to which the redundant bit is not added, with the partner device. By the first communication means, when the reply to the normal reception is not received from the partner device, by adopting the second communication means with the error correction code to which the redundant bit is added,
Data transmission with unnecessary redundant bits added can be avoided, and the transmission time can be shortened.

Even if the second communication means is used, a correct response is not received from the partner device, or if it is judged from the information on the line quality from the partner device, accurate communication is possible even by using the second communication means. If it is recognized that the error correction code is impossible, the third communication means for performing the interleave processing with N error correction codes as one unit and transmitting the data is adopted, and thereafter, according to the information from the partner device. , N by changing the number of redundant bits to be added, that is,
By increasing the number of redundant bits to be added, it is possible to prevent an increase in code conversion processing and an increase in transmission time, and perform transmission resistant to sudden noise.

Further, in the communication employing the second or third communication means, the data transmission time is increased by changing the communication speed according to the state of the line quality without changing the format of the handled data. By increasing the number of redundant bits to be added, it is possible to prevent an increase in code conversion processing and reduce the influence of sudden noise.

Therefore, according to the present invention, if the radio selective call receiver can prevent the increase of the transcoding process and the increase of the transmission time with respect to the other device, and can perform the accurate radio transmission of the data, the data transmission can be performed. It is possible to minimize the influence of the processing on the battery life, which is always noticed to the radio selective call receiver.

[Brief description of drawings]

FIG. 1 is a block configuration diagram of a radio selective calling receiver according to an embodiment of the present invention.

2 is a block configuration diagram showing an internal configuration of an encoder in the receiver of FIG. 1. FIG.

FIG. 3 is a block configuration diagram of a partner device that wirelessly communicates with the receiver of FIG.

FIG. 4 is a format diagram of a signal including data following a synchronization signal.

FIG. 5 is a diagram for explaining a procedure of interleave processing.

FIG. 6 is a block diagram of a radio selective calling receiver according to another embodiment of the present invention.

7 is a block configuration diagram of a partner device that performs data communication with the receiver of FIG.

FIG. 8 is a signal format diagram for explaining a conventional method of adding redundant bits.

[Explanation of symbols]

 101 wireless base station 102,702 receiver 302,802 partner device 104,106,306 receiver 107,307 decoder 108,308 CPU 109,116,309 memory 110,310 encoder 112,312 transmitter 706,806 light receiving circuit 712 , 812 Light emitting circuit

Claims (7)

[Claims] 1. A base station receives a signal transmitted to itself by a predetermined method from a base station, stores the received signal, and wirelessly communicates data related to the stored received signal with another device. In a radio selective call receiver having a function of transmitting by means of the first means for communicating with other devices only with necessary information bits without adding redundant bits, and communication by the first means , If the normal reception signal from the partner device for the predetermined communication start signal does not return, the bit length M for the information bit of the bit length L.
And a second means for performing communication by adding an additional redundant bit to the error correction code having a bit length L + M and performing communication. 2. The radio selective calling receiver according to claim 1, further comprising means for detecting the number of error bits in said error correction code and correcting if the number of error bits is correctable. 3. In the communication by the second means, interleaving processing in which N error correction codes of bit length L + M are set as one unit in accordance with the presence / absence of a normally received signal from a partner device and the number of error bits The radio selective calling receiver according to claim 2, further comprising a third means for performing communication by performing the communication. 4. The presence or absence of the normal reception signal from the partner device in the communication by the second means or the third means,
4. The radio selective calling receiver according to claim 3, further comprising a fourth means capable of changing a communication speed with the partner device in accordance with information regarding the number of error bits. 5. The radio selective call receiver according to claim 1, wherein infrared rays are used as means for performing radio communication with the partner device. 6. A base station receives a signal transmitted to itself by a predetermined method from a base station, stores the received signal, and wirelessly communicates data related to the stored received signal with another device. If the quality of the communication line between the receiver and the transfer partner device is good in the wireless data transmission method for transmitting by using the If the communication device does not respond to the normal reception from the partner device, the second communication is performed using the error correction code with the redundant bit added, and even if the second communication device is used, the partner device can respond to the normal reception. When it does not come or when it is judged from the information on the line quality from the partner device that accurate communication is impossible even by this second communication, N (N ≧ 2) error correction codes As one unit Performing a third communication in which interleave processing is performed and performing transmission, and thereafter, performing a third communication without changing the number of redundant bits to be added by making N variable according to information from the partner device. A wireless data transmission method characterized by. 7. The wireless data transmission system according to claim 6, wherein the communication speed is changed according to the state of the line quality without changing the amount of data to be handled in the second or third communication.