JPH08167760A - Collective printed wiring board and its manufacture - Google Patents

Collective printed wiring board and its manufacture

Info

Publication number
JPH08167760A
JPH08167760A JP31180094A JP31180094A JPH08167760A JP H08167760 A JPH08167760 A JP H08167760A JP 31180094 A JP31180094 A JP 31180094A JP 31180094 A JP31180094 A JP 31180094A JP H08167760 A JPH08167760 A JP H08167760A
Authority
JP
Japan
Prior art keywords
circuit pattern
printed wiring
wiring board
board
same
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP31180094A
Other languages
Japanese (ja)
Inventor
Kinjiro Takayama
金次郎 高山
Yukiko Ishikawa
由木子 石川
Kazumi Sato
一巳 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP31180094A priority Critical patent/JPH08167760A/en
Publication of JPH08167760A publication Critical patent/JPH08167760A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0005Apparatus or processes for manufacturing printed circuits for designing circuits by computer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0097Processing two or more printed circuits simultaneously, e.g. made from a common substrate, or temporarily stacked circuit boards

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

PURPOSE: To enhance precision of circuit pattern formation, to raise the manufacturing yield, to reduce the manufacturing cost, and to raise the productivity by making a circuit pattern on the front of a collective printed wiring board the same as a circuit pattern on the rear. CONSTITUTION: A front-side circuit pattern 12a of a child board is formed in an approximately half-region 11 for a collective printed wiring board to be formed on a CAD picture screen, and a rear side circuit pattern 12b under 18 reversion of the rear-side circuit pattern when the child board is looked at from the rear side is formed in the remaining approximately half region, and the circuit patterns of the collective printed wiring board are designed. Namely, the front and rear circuit patterns of a board are obtained not by arranging exactly the same circuit patterns side by side, but by arranging the front and rear circuit patterns of the child board side by side. Consequently, it becomes possible to lessen misregistration, to enhance the precision of circuit pattern formation, and to raise the manufacturing yield and the productivity.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、少なくとも1種類の子
基板が複数組み込まれている集合プリント配線板及びそ
の製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a collective printed wiring board in which a plurality of at least one kind of sub boards are incorporated and a method for manufacturing the same.

【0002】[0002]

【従来の技術】通常、プリント配線板を製造する際に
は、大きな基板に子基板と称されるプリント配線板が複
数組み込まれた集合プリント配線板を形成し、これを子
基板毎に分割して最終的な製品であるプリント配線板を
得る。
2. Description of the Related Art Generally, when manufacturing a printed wiring board, a collective printed wiring board in which a plurality of printed wiring boards called sub-boards are incorporated into a large board is formed and divided into sub-boards. To obtain the final product, a printed wiring board.

【0003】そして、上記集合プリント配線板として
は、外形形状及び回路パターンの同一な1種類の子基板
が複数組み込まれた同種集合プリント配線板及び外形形
状及び回路パターンの異なる1種類以上の子基板が組み
込まれた異種集合プリント配線板が挙げられる。
As the collective printed wiring board, the same kind of collective printed wiring board in which a plurality of one kind of sub-boards having the same outer shape and circuit pattern are incorporated, and one or more kinds of sub-boards having different outer shape and circuit pattern. An example is a heterogeneous set printed wiring board in which is embedded.

【0004】上記のような集合プリント配線板を製造す
る具体的な方法としては以下のような方法が挙げられ
る。
The following method can be given as a specific method for manufacturing the above-mentioned aggregated printed wiring board.

【0005】例えば、上記同種集合プリント配線板にお
いては例えば図9(a)に示すように集合プリント配線
板となる幅広の基板101の表面101aに同種の子基
板102,103の表側の回路パターン102a,10
3aが集合状態で形成され、図9(b)に示すように裏
面101bにはこれら子基板102,103の裏側の回
路パターン102b,103bが集合状態で形成される
こととなる。なお、図9においては、図9(a)中の貫
通孔107と図9(b)中の貫通孔107が同一の孔部
を示している。
For example, in the above-mentioned same type aggregate printed wiring board, for example, as shown in FIG. 9A, the front side circuit pattern 102a of the same type of sub-boards 102 and 103 is formed on the front surface 101a of the wide substrate 101 to be the aggregate printed wiring board. , 10
3a are formed in a collective state, and as shown in FIG. 9B, the circuit patterns 102b and 103b on the back side of these child boards 102 and 103 are formed in a collective state on the back surface 101b. 9A and 9B, the through hole 107 in FIG. 9A and the through hole 107 in FIG. 9B show the same hole portion.

【0006】従って、先ず、表面101aの集合状態の
回路パターンに合わせた回路パターンの設計と裏面10
1bの集合状態の回路パターンに合わせた回路パターン
の設計をCAD(Computer Aided De
sign)等により行う。
Therefore, first, the circuit pattern design and the back surface 10 which match the circuit pattern in the aggregated state of the front surface 101a.
The design of the circuit pattern according to the circuit pattern in the collective state of 1b is performed by CAD (Computer Aided De).
sign) or the like.

【0007】そして、上記表面101aと裏面101b
の回路パターンの設計データによりそれぞれの回路パタ
ーンを形成するためのスクリーン或いはネガ(ポジ)フ
ィルムをCAM(Computer Aided Ma
nufacturing)等により形成する。
The front surface 101a and the back surface 101b
Of a screen or a negative (positive) film for forming each circuit pattern according to the design data of the circuit pattern of CAM (Computer Aided Ma)
nufacturing) or the like.

【0008】次に、上記スクリーン或いはネガ(ポジ)
フィルムを用いて基板の表面,裏面にそれぞれの回路パ
ターンを例えばエッチング等の手法により形成する。な
お、上記回路パターン形成工程においては、回路パター
ンの微細さによってスクリーンとネガ(ポジ)フィルム
を使い分けており、回路パターンが比較的微細ではない
場合にはスクリーンを使用し、回路パターンが比較的微
細な場合にはネガ(ポジ)フィルムを使用するようにし
ている。
Next, the screen or negative (positive)
Circuit patterns are formed on the front surface and the back surface of the substrate by using a film, for example, by a method such as etching. In the circuit pattern forming step, a screen and a negative (positive) film are used depending on the fineness of the circuit pattern. If the circuit pattern is not relatively fine, the screen is used and the circuit pattern is relatively fine. In such a case, a negative (positive) film is used.

【0009】続いて、上記表面101aと裏面101b
の回路パターンの設計データを基に、はんだ付け用ペー
ストを塗布するためのスクリーンをCAM等により形成
し、これを用いて表面101a及び裏面101bの回路
パターン上にはんだ付け用ペーストをそれぞれスクリー
ン印刷し、はんだ付け用ペースト層を形成する。
Subsequently, the front surface 101a and the back surface 101b
On the basis of the design data of the circuit pattern, the screen for applying the soldering paste is formed by CAM or the like, and using this, the soldering paste is screen-printed on the circuit patterns on the front surface 101a and the back surface 101b, respectively. , Forming a soldering paste layer.

【0010】次に、上記表面101aと裏面101bの
回路パターンの設計データを基に、部品を表面101a
及び裏面101bの回路パターン上にCAM等により実
装して同種集合プリント配線板を製造する。
Next, based on the design data of the circuit patterns on the front surface 101a and the back surface 101b, parts are mounted on the front surface 101a.
Then, the same kind of printed wiring board is manufactured by mounting the circuit pattern on the back surface 101b by CAM or the like.

【0011】一方、異種集合プリント配線板を製造する
場合も同様である。上記異種集合プリント配線板におい
ては例えば図10(a)に示すように基板104の表面
104aに外形形状及び回路パターンの異なる異種の子
基板105,106の表側の回路パターン105a,1
06aが集合状態で形成され、図10(b)に示すよう
に裏面104bには子基板105,106の裏側の回路
パターン105b,106bが集合状態で形成されるこ
ととなる。なお、図10においては、図10(a)中の
貫通孔109と図10(b)中の貫通孔109が同一の
孔部を示し、図10(a)中の貫通孔110と図10
(b)中の貫通孔110が同一の孔部を示す。
On the other hand, the same applies to the case of manufacturing a heterogeneous set printed wiring board. In the heterogeneous set printed wiring board described above, for example, as shown in FIG. 10A, the front side circuit patterns 105a, 1 of the heterogeneous sub-boards 105, 106 having different outer shapes and circuit patterns are formed on the surface 104a of the substrate 104.
06a is formed in a collective state, and as shown in FIG. 10B, the circuit patterns 105b and 106b on the back sides of the child substrates 105 and 106 are formed in a collective state on the back surface 104b. Note that, in FIG. 10, the through hole 109 in FIG. 10A and the through hole 109 in FIG. 10B show the same hole portion, and the through hole 110 in FIG.
The through holes 110 in (b) show the same hole portion.

【0012】従って、先ず、表面104aの集合状態の
回路パターンに合わせた回路パターンの設計と裏面10
4bの集合状態の回路パターンに合わせた回路パターン
の設計をCAD等により行い、後は同種集合プリント配
線板と同様の工程を経て異種集合プリント配線板を製造
する。
Therefore, first, the circuit pattern design and the back surface 10 that match the circuit pattern in the aggregated state of the front surface 104a are performed.
A circuit pattern is designed by CAD or the like in accordance with the circuit pattern in the assembled state of 4b, and thereafter, a heterogeneous assembled printed wiring board is manufactured through the same steps as those for the homogeneous assembly printed wiring board.

【0013】[0013]

【発明が解決しようとする課題】しかしながら、上記の
ような製造方法により各種集合プリント配線板を製造す
ると以下のような不都合が生じる。
However, when various kinds of aggregate printed wiring boards are manufactured by the above manufacturing method, the following inconveniences occur.

【0014】すなわち、基板の表面と裏面で集合状態の
回路パターンが異なることから回路パターンを形成する
ためのスクリーン或いはネガ(ポジ)フィルムを2種類
形成するが、これらの精度には多少のずれがあり、これ
らを用いて基板の表面及び裏面に回路パターンを形成す
ると、表面と裏面で回路パターン形成位置にずれが生じ
る可能性が高く、回路パターン形成精度の低下を招き、
製造歩留りの低下を引き起こし、生産性の低下を招く。
That is, since the circuit patterns in the assembled state are different on the front surface and the back surface of the substrate, two kinds of screens or negative (positive) films for forming the circuit patterns are formed. Therefore, if a circuit pattern is formed on the front surface and the back surface of the substrate using these, there is a high possibility that the circuit pattern formation position on the front surface and the back surface will be displaced, which leads to a decrease in the circuit pattern formation accuracy.
This causes a decrease in manufacturing yield and a decrease in productivity.

【0015】また、基板の表面と裏面で回路パターンが
異なることから回路パターン形成用のスクリーン或いは
ネガ(ポジ)フィルム及びはんだ付け用ペースト塗布用
のスクリーンを2種類ずつ用意する必要があり、製造コ
ストが高価なものとなり、製造コストを低減して生産性
を向上させることは難しい。
Further, since the circuit patterns on the front surface and the back surface of the substrate are different, it is necessary to prepare two kinds of screens for forming a circuit pattern or a negative (positive) film and a screen for applying a soldering paste. Becomes expensive, and it is difficult to reduce the manufacturing cost and improve the productivity.

【0016】そこで本発明は、従来の実情に鑑みて提案
されたものであり、回路パターン形成精度が高く、製造
歩留りが向上し、製造コストが低減されて、生産性が向
上される集合プリント配線板及びその製造方法を提供す
ることを目的とする。
Therefore, the present invention has been proposed in view of the conventional circumstances, and has high circuit pattern forming accuracy, improved manufacturing yield, reduced manufacturing cost, and improved productivity. It is an object to provide a plate and a method for manufacturing the plate.

【0017】[0017]

【課題を解決するための手段】上記課題を解決するため
に本発明者等が鋭意検討した結果、集合プリント配線板
の表面と裏面の集合状態の回路パターンを同一とすれ
ば、表面と裏面の回路パターンを同一のスクリーン或い
はネガ(ポジ)フィルムにより形成できるため、回路パ
ターン形成精度が高まり、製造歩留りが向上することを
見い出した。また、このようにすれば、各種スクリーン
やフィルムを1種類しか用意しなくても良く、製造コス
トが低減されることも見いだした。
Means for Solving the Problems As a result of intensive studies made by the present inventors in order to solve the above problems, if the circuit patterns in the assembled state on the front surface and the back surface of the assembled printed wiring board are the same, It has been found that since the circuit pattern can be formed by the same screen or a negative (positive) film, the accuracy of forming the circuit pattern is increased and the manufacturing yield is improved. Further, it was also found that in this way, it is not necessary to prepare only one kind of various screens and films, and the manufacturing cost is reduced.

【0018】すなわち、本発明は、少なくとも1種類の
子基板が複数組み込まれている集合プリント配線板にお
いて、集合プリント配線板の表面に配置される集合状態
の回路パターンと裏面に配置される集合状態の回路パタ
ーンが同一であることを特徴とするものである。
That is, according to the present invention, in a collective printed wiring board in which a plurality of at least one kind of sub-boards are incorporated, a circuit pattern in a collective state arranged on the front surface of the collective printed wiring board and a collective state arranged on the back surface thereof. The circuit patterns are the same.

【0019】ところで、集合プリント配線板を製造する
場合、基板の表面の回路パターンを形成した後に裏面の
回路パターンを形成した時に、所定の子基板の表側の回
路パターン形成位置の裏側にその子基板の裏側の回路パ
ターンが形成される必要がある。
When manufacturing a collective printed wiring board, when the circuit pattern on the back surface is formed after the circuit pattern on the front surface of the board is formed, the child board is placed on the back side of the circuit pattern forming position on the front side of a predetermined child board. The back side circuit pattern needs to be formed.

【0020】従って、本発明のプリント配線板のように
表面と裏面の集合状態の回路パターンが同一な場合、子
基板形成部分の中心線に対して対称な位置に所定の子基
板の表側及び裏側の回路パターンが配されるものとし、
基板の表面の回路パターンを形成した後に裏面の回路パ
ターンを形成した時に、所定の子基板の表側の回路パタ
ーン形成位置の裏側にその子基板の裏側の回路パターン
が形成されるようにする必要がある。
Therefore, when the printed circuit board of the present invention has the same circuit pattern on the front surface and the back surface, the front side and the back side of the predetermined sub-board are symmetrically positioned with respect to the center line of the sub-board forming portion. The circuit pattern of
When the circuit pattern on the back side is formed after the circuit pattern on the front side of the board is formed, the circuit pattern on the back side of the child board needs to be formed on the back side of the circuit pattern forming position on the front side of the predetermined child board. .

【0021】また、本発明のプリント配線板のように表
面と裏面の集合状態の回路パターンが同一な場合、所定
の子基板の表側の回路パターンに対して裏面の回路パタ
ーンは、上記子基板を裏側から見たときの裏側の回路パ
ターンを180゜反転させた回路パターンとされる必要
がある。
When the printed circuit board of the present invention has the same circuit pattern on the front surface and the back surface, the circuit pattern on the front side of the predetermined sub-board is the same as the circuit board on the back side. The circuit pattern on the back side when viewed from the back side needs to be inverted by 180 °.

【0022】すなわち、本発明の集合プリント配線板を
製造する製造方法としては、画面上で集合プリント配線
板の回路パターンを形成するべき部分の略半分の領域に
子基板の表側の回路パターンが形成され、残りの略半分
の領域に上記子基板を裏側から見たときの裏側の回路パ
ターンを180゜反転させた回路パターンが形成される
ように集合プリント配線板の回路パターンの設計をCA
Dにより行う工程と、基板の表面と裏面にCADにより
設計した同一データにより同一の回路パターンを形成す
る工程と、基板の表面と裏面の回路パターン上にCAD
により設計した同一データによりはんだ付け用ペースト
層を同一パターンで形成する工程と、基板の表面と裏面
の回路パターンにCADにより設計した同一データによ
り同様に部品を実装する工程を有するものが挙げられ
る。
That is, as the manufacturing method for manufacturing the collective printed wiring board of the present invention, the circuit pattern on the front side of the sub-board is formed on the screen in approximately half the area where the circuit pattern of the collective printed wiring board is to be formed. The circuit pattern of the collective printed wiring board is designed so that a circuit pattern obtained by inverting the circuit pattern on the back side when the above-mentioned sub-board is viewed from the back side by 180 ° is formed in the remaining approximately half area.
The step performed by D, the step of forming the same circuit pattern by the same data designed by CAD on the front surface and the back surface of the substrate, and the CAD on the circuit pattern on the front surface and the back surface of the substrate.
There is a step of forming a soldering paste layer in the same pattern with the same data designed by, and a step of similarly mounting a component with the same data designed by CAD on the circuit patterns on the front surface and the back surface of the board.

【0023】[0023]

【作用】本発明の集合プリント配線板においては、集合
プリント配線板の表面に配置される集合状態の回路パタ
ーンと裏面に配置される集合状態の回路パターンが同一
であるため、表面と裏面の回路パターンを同一のスクリ
ーン或いはネガ(ポジ)フィルムを用いて形成でき、位
置ずれが少なく、回路パターン形成精度が高まる。さら
に、各種スクリーン或いはネガ(ポジ)フィルムを1種
類しか用意しなくても良いことから、製造コストが低減
される。
In the collective printed wiring board of the present invention, the circuit patterns in the collective state arranged on the front surface and the circuit pattern in the collective state arranged on the rear surface of the collective printed wiring board are the same, and therefore the circuit on the front surface and the circuit surface on the back surface are the same. The pattern can be formed using the same screen or a negative (positive) film, the positional deviation is small, and the circuit pattern forming accuracy is improved. Further, since it is only necessary to prepare one kind of various screens or negative (positive) films, the manufacturing cost is reduced.

【0024】また、本発明の集合プリント配線板の製造
方法においては、画面上で集合プリント配線板の回路パ
ターンを形成するべき部分の略半分の領域に子基板の表
側の回路パターンが形成され、残りの略半分の領域に上
記子基板を裏側から見たときの裏側の回路パターンを1
80゜反転させた回路パターンが形成されるように集合
プリント配線板の回路パターンの設計をCADにより行
い、上記CADにより設計した同一データを基に、基板
の表面と裏面に同一の回路パターンを形成し、基板の表
面と裏面の回路パターン上にはんだ付け用ペースト層を
同一パターンで形成し、基板の表面と裏面の回路パター
ンに同様に部品を実装するため、同一の設計データを全
ての工程に流用しており、製造工程が簡略化される。
Further, in the method for manufacturing a collective printed wiring board according to the present invention, the circuit pattern on the front side of the sub-board is formed in a substantially half area of the portion on the screen where the circuit pattern of the collective printed wiring board is to be formed, In the other half of the area, the circuit pattern on the back side when the above-mentioned sub-board is viewed from the back side is set to 1
The circuit pattern of the collective printed wiring board is designed by CAD so that a circuit pattern inverted by 80 ° is formed, and the same circuit pattern is formed on the front surface and the back surface of the substrate based on the same data designed by the CAD. Then, the soldering paste layer is formed in the same pattern on the circuit patterns on the front and back of the board, and the same components are mounted on the circuit patterns on the front and back of the board, so the same design data is used for all processes. It is diverted and the manufacturing process is simplified.

【0025】[0025]

【実施例】以下、本発明を適用した実施例について図面
を参照しながら詳細に説明する。
Embodiments to which the present invention is applied will be described below in detail with reference to the drawings.

【0026】実施例1 本実施例においては、本発明を同種集合プリント配線板
に適用した例について述べる。本実施例の集合プリント
配線板は、図1(a)に示すように、外形形状及び回路
パターンが同一の同種の第1の子基板2及び第2の子基
板3が集合プリント配線板となる幅広の基板1に配され
るものである。
Example 1 In this example, an example in which the present invention is applied to a homogeneous printed wiring board will be described. In the collective printed wiring board of the present embodiment, as shown in FIG. 1A, a first subsidiary board 2 and a second subsidiary board 3 of the same type having the same outer shape and circuit pattern serve as the collective printed wiring board. It is arranged on the wide substrate 1.

【0027】そして、上記基板1の表面1aに図中左か
ら第1の子基板2の表側の回路パターン2aと第2の子
基板3の裏側の回路パターン3bが順次形成され、図1
(b)に示すように基板1の裏面1bに図中左から第1
の子基板2の裏側の回路パターン2bと第2の子基板3
の表側の回路パターン3aが順次形成されている。ま
た、図1においては、図1(a)中の貫通孔4と図1
(b)中の貫通孔4が同一のものを示し、図1(a)中
の貫通孔5と図1(b)中の貫通孔5が同一のものを示
す。
A circuit pattern 2a on the front side of the first sub-board 2 and a circuit pattern 3b on the back side of the second sub-board 3 are sequentially formed on the front surface 1a of the board 1 from the left in the figure,
As shown in (b), the back surface 1b of the substrate 1 is
The second sub-board 3 and the circuit pattern 2b on the back side of the sub-board 2 of
The circuit pattern 3a on the front side is sequentially formed. In addition, in FIG. 1, the through hole 4 in FIG.
1B shows the same through hole 4, and FIG. 1A shows the same through hole 5 and FIG. 1B shows the same through hole 5.

【0028】従って、集合状態の回路パターンとしてみ
れば、表面と裏面に同一の回路パターンが形成されてい
ることとなる。なお、上記図1に示す本実施例の集合プ
リント配線板においては、図示しない部品が所定の位置
に実装されているものとする。
Therefore, when viewed as a circuit pattern in an aggregated state, the same circuit pattern is formed on the front surface and the back surface. In the assembled printed wiring board of the present embodiment shown in FIG. 1, it is assumed that components not shown are mounted at predetermined positions.

【0029】上記本実施例の集合プリント配線板を製造
するには、先ずCADにより表面と裏面において共通な
回路パターンの設計を行う。すなわち、図2に示すよう
に、CAD画面上の集合プリント配線板の回路パターン
を形成すべき集合プリント配線板形成部分11の略半分
の領域に上記子基板2,3の表側の回路パターン2a,
3aとなる表側の回路パターン12aを形成する。次
に、図3に示すようにCAD画面上の集合プリント配線
板形成部分11の残りの略半分の領域に上記子基板2,
3の裏側の回路パターン2b,3bとなる裏側の回路パ
ターン12bを形成する。
In order to manufacture the collective printed wiring board of the present embodiment, first, a common circuit pattern is designed on the front surface and the back surface by CAD. That is, as shown in FIG. 2, the circuit patterns 2a on the front side of the sub-boards 2 and 3 are formed in the substantially half area of the aggregate printed wiring board forming portion 11 on which the circuit pattern of the aggregate printed wiring board on the CAD screen is to be formed.
A circuit pattern 12a on the front side to be 3a is formed. Next, as shown in FIG. 3, the sub-boards 2, 2 are formed in the remaining approximately half area of the aggregate printed wiring board forming portion 11 on the CAD screen.
The back side circuit pattern 12b to be the back side circuit patterns 2b and 3b is formed.

【0030】続いて、図2及び図3に示したCAD画面
を併せて図4に示すように、CAD画面上の集合プリン
ト配線板形成部分11の略半分の領域に子基板の表側の
回路パターン12aが形成され、残りの略半分の領域に
上記子基板を裏側から見たときの裏側の回路パターンを
180゜反転させた状態の裏側の回路パターン12bが
形成された集合プリント配線板の回路パターンを設計す
る。すなわち、本実施例においては、基板の表面或いは
裏面の回路パターンを、従来のように全く同じ回路パタ
ーンを並べるのではなく、子基板の表側の回路パターン
と裏側の回路パターンを並べたものとする。
Subsequently, as shown in FIG. 4 together with the CAD screens shown in FIGS. 2 and 3, the circuit pattern on the front side of the child board is formed in an area approximately half of the aggregate printed wiring board forming portion 11 on the CAD screen. 12a is formed, and the circuit pattern of the rear printed circuit board 12b is formed in the remaining approximately half area in which the back side circuit pattern when the back side of the child board is viewed from the back side is inverted by 180 ° is formed. To design. That is, in this embodiment, the circuit patterns on the front surface or the back surface of the board are not the same circuit patterns as in the conventional case, but the circuit patterns on the front side and the back side of the child board are arranged side by side. .

【0031】次に、上記CADにより設計されたデータ
により回路パターンを形成するためのスクリーン或いは
ネガ(ポジ)フィルムをCAM等を用いて形成する。そ
して、スクリーン或いはネガ(ポジ)フィルムを用い
て、基板の表面にエッチングにより回路パターンを形成
し、同一のスクリーン或いはネガ(ポジ)フィルムを用
いて該基板の裏面にもエッチングにより回路パターンを
形成する。この結果、基板の表面と裏面に同一の回路パ
ターンが形成される。
Next, a screen or a negative (positive) film for forming a circuit pattern is formed using CAM or the like by the data designed by the above CAD. Then, a circuit pattern is formed on the surface of the substrate by etching using a screen or a negative (positive) film, and a circuit pattern is also formed on the back surface of the substrate by etching using the same screen or a negative (positive) film. . As a result, the same circuit pattern is formed on the front surface and the back surface of the substrate.

【0032】このとき、本実施例においては、表面と裏
面の回路パターンが同一のスクリーン或いはネガ(ポ
ジ)フィルムにより形成されていることから、位置ずれ
が少なく、回路パターン形成精度が高まり、製造歩留り
が向上し、生産性が向上する。
At this time, in this embodiment, since the circuit patterns on the front surface and the back surface are formed by the same screen or negative (positive) film, the positional deviation is small, the circuit pattern forming accuracy is increased, and the manufacturing yield is high. And productivity is improved.

【0033】さらに、本実施例においてはスクリーン或
いはネガ(ポジ)フィルムを1種類しか用意しなくても
良く、製造コストが低減され、生産性が向上する。
Furthermore, in the present embodiment, only one type of screen or negative (positive) film may be prepared, the manufacturing cost is reduced and the productivity is improved.

【0034】次に、基板の表面と裏面の回路パターンに
はんだ付け用ペーストを塗布するためのスクリーンをC
ADにより設計した同一のデータを基にCAM等を用い
て形成する。そして、上記スクリーンを使用して基板の
表面と裏面の回路パターン上にはんだ付け用ペーストを
同一パターンでスクリーン印刷し、はんだ付け用ペース
ト層を形成する。
Next, a screen C for applying the soldering paste to the circuit patterns on the front surface and the back surface of the substrate is used.
It is formed using CAM or the like based on the same data designed by AD. Then, using the screen, a soldering paste is screen-printed on the circuit patterns on the front surface and the back surface of the substrate in the same pattern to form a soldering paste layer.

【0035】このとき、本実施例においてはスクリーン
を1種類しか用意しなくても良く、製造コストが低減さ
れ、生産性が向上する。
At this time, in the present embodiment, only one type of screen need be prepared, the manufacturing cost is reduced and the productivity is improved.

【0036】次に、基板の表面と裏面の回路パターンに
電子部品の如き部品をCADにより設計した同一データ
を基にCAM等を用いて実装し、本実施例の集合プリン
ト配線板を完成する。このとき、基板の表面と裏面には
同一の回路パターンが形成されているため、表面に部品
を実装するのに用いたデータをそのまま裏面にも使用し
て同様に部品を実装すれば良い。
Next, components such as electronic components are mounted on the circuit patterns on the front surface and the back surface of the substrate using CAM or the like based on the same data designed by CAD, and the collective printed wiring board of this embodiment is completed. At this time, since the same circuit pattern is formed on the front surface and the back surface of the substrate, the data used for mounting the component on the front surface can be used as it is on the back surface and the component can be similarly mounted.

【0037】従って、本実施例においては、同一の設計
データを全ての工程に流用しており、CADやCAMを
用いているため自動化が促進されて製造工程が簡略化さ
れ、生産性が向上する。また、このように製造工程を簡
略化すれば、作業ミス等による製造歩留りの低下も防止
される。
Therefore, in this embodiment, the same design data is used for all the processes, and since CAD and CAM are used, automation is promoted, the manufacturing process is simplified, and the productivity is improved. . Further, by simplifying the manufacturing process in this way, it is possible to prevent a decrease in manufacturing yield due to a work mistake or the like.

【0038】実施例2 本実施例においては、本発明を異種集合プリント配線板
に適用した例について述べる。本実施例の集合プリント
配線板は、図5(a)に示すように、外形形状及び回路
パターンが異なる第1の子基板22,24と第2の子基
板23,25が、集合プリント配線板となる幅広の基板
21の中央を境として左側と右側にそれぞれ外形形状が
大きい第1の子基板22,24とそれよりも外形形状の
小さな第2の子基板23,25が一組となるように配置
されてなるものである。また、図5においては、図5
(a)中の貫通孔26と図5(b)中の貫通孔26が同
一のものを示し、図5(a)中の貫通孔27と図5
(b)中の貫通孔27が同一のものを示す。
Example 2 In this example, an example in which the present invention is applied to a heterogeneous set printed wiring board will be described. In the collective printed wiring board of the present embodiment, as shown in FIG. 5A, the first subsidiary boards 22 and 24 and the second subsidiary boards 23 and 25 having different outer shapes and circuit patterns are assembled printed wiring boards. The first sub-boards 22 and 24 having a large outer shape and the second sub-boards 23 and 25 having a smaller outer shape are formed on each of the left and right sides with the center of the wide board 21 as a boundary. It is arranged in. In addition, in FIG.
The through holes 26 in FIG. 5A and the through holes 26 in FIG. 5B are the same, and the through holes 27 in FIG.
The same through holes 27 are shown in (b).

【0039】そして、図5(a)に示すように、上記基
板21の表面21aに図中左から第1の子基板22の表
側の回路パターン22a,第2の子基板23の表側の回
路パターン23a,第2の子基板25の裏側の回路パタ
ーン25b,第1の子基板24の裏側の回路パターン2
4bが順次形成されている。
Then, as shown in FIG. 5A, a circuit pattern 22a on the front side of the first child board 22 and a circuit pattern on the front side of the second child board 23 are arranged on the front surface 21a of the board 21 from the left in the figure. 23a, the circuit pattern 25b on the back side of the second child board 25, the circuit pattern 2 on the back side of the first child board 24
4b are sequentially formed.

【0040】また、図5(b)に示すように基板21の
裏面21bには、図中左から第1の子基板22の裏側の
回路パターン22b,第2の子基板23の裏側の回路パ
ターン23b,第2の子基板25の表側の回路パターン
25a,第1の子基板24の表側の回路パターン24a
が順次形成されている。
As shown in FIG. 5B, on the back surface 21b of the substrate 21, the circuit pattern 22b on the back side of the first child board 22 and the circuit pattern on the back side of the second child board 23 from the left in the figure. 23b, the circuit pattern 25a on the front side of the second child board 25, and the circuit pattern 24a on the front side of the first child board 24.
Are sequentially formed.

【0041】従って、本実施例の集合プリント配線板に
おいても、実施例1で述べた集合プリント配線板と同様
に、集合状態の回路パターンとしてみれば表面と裏面に
同一の回路パターンが形成されていることとなる。な
お、上記図5に示す本実施例の集合プリント配線板にお
いても図示しない部品が所定の位置に実装されているも
のとする。
Therefore, also in the collective printed wiring board of the present embodiment, similar to the collective printed wiring board described in the first embodiment, when viewed as a circuit pattern in a collective state, the same circuit pattern is formed on the front surface and the back surface. Will be there. In the aggregated printed wiring board of this embodiment shown in FIG. 5 as well, it is assumed that components not shown are mounted at predetermined positions.

【0042】上記本実施例の集合プリント配線板を製造
するには、先ず、CADにより表面と裏面において共通
な回路パターンの設計を行う。すなわち、図6に示すよ
うに、CAD画面上の集合プリント配線板の回路パター
ンを形成すべき集合プリント配線板形成部分31の略半
分の領域に上記第1の子基板22,24の表側の回路パ
ターンとなる第1の表側の回路パターン32aと上記第
2の子基板23,25の表側の回路パターンとなる第2
の表側の回路パターン33aを組み合わせて形成する。
In order to manufacture the collective printed wiring board of this embodiment, first, a common circuit pattern is designed on the front surface and the back surface by CAD. That is, as shown in FIG. 6, a circuit on the front side of the first sub-boards 22 and 24 is formed in an approximately half region of the collective printed wiring board forming portion 31 on which the circuit pattern of the collective printed wiring board on the CAD screen is to be formed. A first front side circuit pattern 32a to be a pattern and a second front side circuit pattern of the second child boards 23 and 25.
The front side circuit pattern 33a is formed in combination.

【0043】次に、図7に示すようにCAD画面上の集
合プリント配線板形成部分31の残りの略半分の領域に
上記第1の子基板22,24の裏側の回路パターンとな
る第1の裏側の回路パターン32bと上記第2の子基板
23,25の裏側の回路パターンとなる第2の裏側の回
路パターン33bを組み合わせて形成する。
Next, as shown in FIG. 7, in the remaining approximately half of the aggregate printed wiring board forming portion 31 on the CAD screen, the first circuit board on the back side of the first sub boards 22 and 24 is formed. The circuit pattern 32b on the back side and the circuit pattern 33b on the second back side which is the circuit pattern on the back side of the second child boards 23, 25 are formed in combination.

【0044】続いて、図6及び図7に示したCAD画面
を併せて図8に示すように、CAD画面上の集合プリン
ト配線板形成部分31の略半分の領域に各子基板の表側
の回路パターン32a,33aが形成され、残りの略半
分の領域に上記各子基板を裏面から見たときの裏側の回
路パターンを180゜反転させた状態の裏側の回路パタ
ーン32b,33bが形成された集合プリント配線板の
回路パターンを設計する。
Subsequently, as shown in FIG. 8 together with the CAD screens shown in FIGS. 6 and 7, the circuit on the front side of each sub-board is provided in an approximately half region of the collective printed wiring board forming portion 31 on the CAD screen. A set in which the patterns 32a and 33a are formed, and the circuit patterns 32b and 33b on the back side are formed in the remaining approximately half area in a state where the circuit patterns on the back side when the above-mentioned respective sub-boards are viewed from the back side are inverted by 180 °. Design the circuit pattern of the printed wiring board.

【0045】この後、実施例1で述べた集合プリント配
線板の製造方法と同様の工程を経て本実施例の集合プリ
ント配線板を製造する。
Thereafter, the collective printed wiring board of this embodiment is manufactured through the same steps as the manufacturing method of the collective printed wiring board described in the first embodiment.

【0046】なお、本実施例においても、表面と裏面の
回路パターンが同一のスクリーン或いはネガ(ポジ)フ
ィルムにより形成されており、回路パターン形成精度が
高まり、製造歩留りが向上し、生産性が向上する。
Also in this embodiment, the circuit patterns on the front surface and the back surface are formed by the same screen or a negative (positive) film, so that the circuit pattern forming accuracy is improved, the manufacturing yield is improved, and the productivity is improved. To do.

【0047】また、本実施例においてもスクリーン或い
はネガ(ポジ)フィルムを1種類しか用意しなくても良
く、製造コストが低減され、生産性が向上する。
Also in the present embodiment, only one type of screen or negative (positive) film may be prepared, the manufacturing cost is reduced and the productivity is improved.

【0048】さらに、本実施例においても、同一の設計
データを全ての工程に流用しており、CADやCAMを
用いているため自動化が促進されて製造工程が簡略化さ
れ、生産性が向上する。また、このように製造工程を簡
略化すれば、作業ミス等による製造歩留りの低下も防止
される。
Further, also in this embodiment, the same design data is used for all the processes, and since CAD and CAM are used, automation is promoted, the manufacturing process is simplified, and the productivity is improved. . Further, by simplifying the manufacturing process in this way, it is possible to prevent a decrease in manufacturing yield due to a work mistake or the like.

【0049】[0049]

【発明の効果】以上の説明から明らかなように、本発明
の集合プリント配線板においては、集合プリント配線板
の表面に配置される集合状態の回路パターンと裏面に配
置される集合状態の回路パターンが同一であるため、表
面と裏面の回路パターンを同一のスクリーン或いはネガ
(ポジ)フィルムを用いて形成でき、位置ずれが少な
く、回路パターン形成精度が高まり、製造歩留りが向上
し、生産性も向上する。さらに、各種スクリーン或いは
ネガ(ポジ)フィルムを1種類しか用意しなくても良い
ことから、製造コストが低減され、生産性が向上する。
As is apparent from the above description, in the collective printed wiring board of the present invention, the circuit pattern in the collective state arranged on the front surface and the circuit pattern in the collective state arranged on the back surface of the collective printed wiring board. Since the same pattern is used, the front and back circuit patterns can be formed using the same screen or negative (positive) film, there is little misalignment, circuit pattern formation accuracy is increased, manufacturing yield is improved, and productivity is also improved. To do. Further, since only one kind of various screens or negative (positive) films need be prepared, the manufacturing cost is reduced and the productivity is improved.

【0050】また、本発明の集合プリント配線板の製造
方法においては、画面上で集合プリント配線板の回路パ
ターンを形成するべき部分の略半分の領域に子基板の表
側の回路パターンが形成され、残りの略半分の領域に上
記子基板を裏側から見たときの裏側の回路パターンを1
80゜反転させた回路パターンが形成されるように集合
プリント配線板の回路パターンの設計をCADにより行
い、上記CADにより設計した同一データを基に、基板
の表面と裏面に同一の回路パターンを形成し、基板の表
面と裏面の回路パターン上にはんだ付け用ペースト層を
同一パターンで形成し、基板の表面と裏面の回路パター
ンに同様に部品を実装するため、同一の設計データを全
ての工程に流用しており、製造工程が簡略化され、生産
性が向上する。
Further, in the method of manufacturing the collective printed wiring board of the present invention, the circuit pattern on the front side of the sub-board is formed on the screen in a substantially half region of the portion where the circuit pattern of the collective printed wiring board is to be formed, In the other half of the area, the circuit pattern on the back side when the above-mentioned sub-board is viewed from the back side is set to 1
The circuit pattern of the collective printed wiring board is designed by CAD so that a circuit pattern inverted by 80 ° is formed, and the same circuit pattern is formed on the front surface and the back surface of the substrate based on the same data designed by the CAD. Then, the soldering paste layer is formed in the same pattern on the circuit patterns on the front and back of the board, and the same components are mounted on the circuit patterns on the front and back of the board, so the same design data is used for all processes. It is diverted, the manufacturing process is simplified, and the productivity is improved.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明を適用した集合プリント配線板の一例を
示す平面図である。
FIG. 1 is a plan view showing an example of an assembled printed wiring board to which the present invention is applied.

【図2】本発明を適用した集合プリント配線板の製造方
法の一例を工程順に示すものであり、CAD画面上の集
合プリント配線板形成部分の略半分の領域に表側の回路
パターンを形成する工程を示す模式図である。
FIG. 2 is a view showing an example of a method of manufacturing an aggregate printed wiring board to which the present invention is applied in the order of steps, in which a circuit pattern on the front side is formed in a substantially half region of a portion where the aggregate printed wiring board is formed on a CAD screen. It is a schematic diagram which shows.

【図3】本発明を適用した集合プリント配線板の製造方
法の一例を工程順に示すものであり、CAD画面上の集
合プリント配線板形成部分の残りの略半分の領域に裏側
の回路パターンを形成する工程を示す模式図である。
FIG. 3 is a view showing an example of a method of manufacturing an aggregate printed wiring board to which the present invention is applied in the order of steps, in which a circuit pattern on the back side is formed in the remaining half of the aggregate printed wiring board forming portion on the CAD screen. It is a schematic diagram which shows the process to do.

【図4】本発明を適用した集合プリント配線板の製造方
法の一例を工程順に示すものであり、CAD画面上で集
合プリント配線板の回路パターンを設計する工程を示す
模式図である。
FIG. 4 shows an example of a method of manufacturing an aggregated printed wiring board to which the present invention is applied in the order of steps, and is a schematic view showing a step of designing a circuit pattern of the aggregated printed wiring board on a CAD screen.

【図5】本発明を適用した集合プリント配線板の他の例
を示す平面図である。
FIG. 5 is a plan view showing another example of an assembled printed wiring board to which the present invention has been applied.

【図6】本発明を適用した集合プリント配線板の製造方
法の他の例を工程順に示すものであり、CAD画面上の
集合プリント配線板形成部分の略半分の領域に表側の回
路パターンを形成する工程を示す模式図である。
FIG. 6 shows another example of a method of manufacturing an aggregate printed wiring board to which the present invention is applied, in the order of steps, in which a circuit pattern on the front side is formed in a substantially half region of the aggregate printed wiring board forming portion on the CAD screen. It is a schematic diagram which shows the process to do.

【図7】本発明を適用した集合プリント配線板の製造方
法の他の例を工程順に示すものであり、CAD画面上の
集合プリント配線板形成部分の残りの略半分の領域に裏
側の回路パターンを形成する工程を示す模式図である。
FIG. 7 shows another example of a method of manufacturing an aggregate printed wiring board to which the present invention is applied, in the order of steps, in which a circuit pattern on the back side is formed in the remaining half of the aggregate printed wiring board forming portion on the CAD screen. It is a schematic diagram which shows the process of forming.

【図8】本発明を適用した集合プリント配線板の製造方
法の他の例を工程順に示すものであり、CAD画面上で
集合プリント配線板の回路パターンを設計する工程を示
す模式図である。
FIG. 8 shows another example of the method of manufacturing an aggregated printed wiring board to which the present invention is applied in the order of steps, and is a schematic view showing a step of designing a circuit pattern of the aggregated printed wiring board on a CAD screen.

【図9】従来の集合プリント配線板の一例を示す平面図
である。
FIG. 9 is a plan view showing an example of a conventional aggregated printed wiring board.

【図10】従来の集合プリント配線板の他の例を示す平
面図である。
FIG. 10 is a plan view showing another example of a conventional assembled printed wiring board.

【符号の説明】[Explanation of symbols]

1,21・・・基板 1a,21a・・・表面 1b,21b・・・裏面 2,3・・・子基板 2a,3a,12a,22a,23a,24a,25a
・・・表側の回路パターン 2b,3b,12b,22b,23b,24b,25b
・・・裏側の回路パターン 11,31・・・集合プリント配線板形成部分 22,24・・・第1の子基板 23,25・・・第2の子基板 32a・・・第1の表側の回路パターン 32b・・・第1の裏側の回路パターン 33a・・・第2の表側の回路パターン 33b・・・第2の裏側の回路パターン
1, 21 ... Substrate 1a, 21a ... Front surface 1b, 21b ... Back surface 2, 3 ... Sub-board 2a, 3a, 12a, 22a, 23a, 24a, 25a
... Circuit patterns on the front side 2b, 3b, 12b, 22b, 23b, 24b, 25b
... Circuit pattern on the back side 11, 31 ... Assembly printed wiring board forming portion 22, 24 ... First child board 23, 25 ... Second child board 32a ... First front side Circuit pattern 32b ... Circuit pattern on first back side 33a ... Circuit pattern on second front side 33b ... Circuit pattern on second back side

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 少なくとも1種類の子基板が複数組み込
まれている集合プリント配線板において、 集合プリント配線板の表面に配置される集合状態の回路
パターンと裏面に配置される集合状態の回路パターンが
同一であることを特徴とする集合プリント配線板。
1. A collective printed wiring board in which a plurality of at least one kind of sub-boards are incorporated, wherein a circuit pattern in a collective state arranged on a front surface and a circuit pattern in a collective state arranged on a rear surface of the collective printed wiring board are provided. A collective printed wiring board characterized by being the same.
【請求項2】 画面上で集合プリント配線板の回路パタ
ーンを形成するべき部分の略半分の領域に子基板の表側
の回路パターンが形成され、残りの略半分の領域に上記
子基板を裏側から見たときの裏側の回路パターンを18
0゜反転させた回路パターンが形成されるように集合プ
リント配線板の回路パターンの設計をCADにより行う
工程と、 基板の表面と裏面にCADにより設計した同一データに
より同一の回路パターンを形成する工程と、 基板の表面と裏面の回路パターン上にCADにより設計
した同一データによりはんだ付け用ペースト層を同一パ
ターンで形成する工程と、 基板の表面と裏面の回路パターンにCADにより設計し
た同一データにより同様に部品を実装する工程を有する
集合プリント配線板の製造方法。
2. A circuit pattern on the front side of the child board is formed in a region of approximately half of a portion where a circuit pattern of the collective printed wiring board is to be formed on the screen, and the child board is arranged in the remaining approximately half region from the back side. The circuit pattern on the back side when viewed is 18
The step of designing the circuit pattern of the collective printed wiring board by CAD so that the circuit pattern inverted by 0 ° is formed, and the step of forming the same circuit pattern by the same data designed by CAD on the front surface and the back surface of the board. And the step of forming the soldering paste layer in the same pattern on the circuit patterns on the front and back of the board with the same data designed by CAD, and the same data designed by CAD on the circuit patterns on the front and back of the board A method for manufacturing an assembled printed wiring board, the method including the step of mounting a component on a substrate.
JP31180094A 1994-12-15 1994-12-15 Collective printed wiring board and its manufacture Pending JPH08167760A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP31180094A JPH08167760A (en) 1994-12-15 1994-12-15 Collective printed wiring board and its manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP31180094A JPH08167760A (en) 1994-12-15 1994-12-15 Collective printed wiring board and its manufacture

Publications (1)

Publication Number Publication Date
JPH08167760A true JPH08167760A (en) 1996-06-25

Family

ID=18021593

Family Applications (1)

Application Number Title Priority Date Filing Date
JP31180094A Pending JPH08167760A (en) 1994-12-15 1994-12-15 Collective printed wiring board and its manufacture

Country Status (1)

Country Link
JP (1) JPH08167760A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010171410A (en) * 2008-12-24 2010-08-05 Panasonic Corp Printed circuit board and method for mounting electronic components
JP2014003214A (en) * 2012-06-20 2014-01-09 Nec Corp Pattern printing method, multilayer printed circuit board manufacturing method and multilayer printed circuit board

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010171410A (en) * 2008-12-24 2010-08-05 Panasonic Corp Printed circuit board and method for mounting electronic components
JP2014003214A (en) * 2012-06-20 2014-01-09 Nec Corp Pattern printing method, multilayer printed circuit board manufacturing method and multilayer printed circuit board

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