JPH0738110A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH0738110A JPH0738110A JP17950293A JP17950293A JPH0738110A JP H0738110 A JPH0738110 A JP H0738110A JP 17950293 A JP17950293 A JP 17950293A JP 17950293 A JP17950293 A JP 17950293A JP H0738110 A JPH0738110 A JP H0738110A
- Authority
- JP
- Japan
- Prior art keywords
- amorphous silicon
- film
- tft
- polycrystalline silicon
- silicon film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Liquid Crystal (AREA)
- Shift Register Type Memory (AREA)
- Thin Film Transistor (AREA)
- Recrystallisation Techniques (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、薄膜トランジスタを用
いた半導体装置の製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device using a thin film transistor.
【0002】[0002]
【従来の技術】近年、画素スイッチング用TFTと同一
基板上に駆動回路をTFTで形成した駆動回路一体型T
FT−LCDが注目されている。駆動回路一体型TFT
−LCDの駆動回路用のTFTには、移動度の高い多結
晶シリコンTFTが用いられる。しかし、画素スイッチ
ング用TFT及び駆動回路を多結晶シリコンTFTで形
成すると、画素スイッチング用TFTのリーク電流が大
きく、画素保持特性が不十分であるという問題がある。
そこで、画素スイッチング用TFTにはリーク電流の小
さい非晶質シリコンTFTを用い、駆動回路部には高移
動度の多結晶シリコンTFTを用いる方式が提案されて
いる。2. Description of the Related Art In recent years, a drive circuit integrated type T in which a drive circuit is formed by a TFT on the same substrate as a pixel switching TFT
FT-LCDs are receiving attention. Drive circuit integrated TFT
-A high-mobility polycrystalline silicon TFT is used for the TFT for the LCD drive circuit. However, when the pixel switching TFT and the drive circuit are formed of polycrystalline silicon TFTs, there is a problem that the pixel switching TFT has a large leak current and the pixel holding characteristic is insufficient.
Therefore, a method has been proposed in which an amorphous silicon TFT having a small leak current is used for the pixel switching TFT, and a high mobility polycrystalline silicon TFT is used for the drive circuit section.
【0003】従来、同一基板上に非晶質シリコンTFT
と多結晶シリコンTFTを作製するには、非晶質シリコ
ン膜を堆積させて駆動回路部のみビームアニールを行
い、多結晶シリコン膜を形成する方法がある。図4に、
従来の製造方法を示す。Conventionally, an amorphous silicon TFT is formed on the same substrate.
In order to fabricate a polycrystalline silicon TFT, there is a method of depositing an amorphous silicon film and performing beam annealing only on the drive circuit portion to form a polycrystalline silicon film. In Figure 4,
The conventional manufacturing method is shown.
【0004】先ず、絶縁基板上1に導電膜7を堆積して
ゲート電極形状にパターニングした後に、ゲート絶縁膜
3/非晶質シリコン膜20から成る積層膜を形成する。
(図4(a))。First, a conductive film 7 is deposited on an insulating substrate 1 and patterned into a gate electrode shape, and then a laminated film composed of a gate insulating film 3 / amorphous silicon film 20 is formed.
(FIG. 4 (a)).
【0005】次に、図4(b)に示すように、上記積層
膜を基板上で分離した後、駆動回路部の非晶質シリコン
膜20をビームアニールして多結晶シリコン膜21を形
成する。Next, as shown in FIG. 4B, after separating the laminated film on the substrate, the amorphous silicon film 20 in the drive circuit portion is beam annealed to form a polycrystalline silicon film 21. .
【0006】最後に、窒化膜8/n+ Si膜9/金属膜1
0を図4(c)の様に形成して、同一基板上に非晶質シ
リコンTFT(A)と多結晶シリコンTFT(B)を完
成する。Finally, the nitride film 8 / n + Si film 9 / metal film 1
0 is formed as shown in FIG. 4C, and an amorphous silicon TFT (A) and a polycrystalline silicon TFT (B) are completed on the same substrate.
【0007】ところで、画素スイッチング用TFT
(A)のリーク電流を小さくするため、非晶質シリコン
膜20中のダングリングボンドを少なくする必要がある
ので、非晶質シリコン膜20は通常12at. %前後の多
量の水素を含んでいる。しかし、このような多量に水素
を含んだ非晶質シリコン膜20をビームアニールする
と、マイクロボイドが発生したり、膜が溶発するため、
ビームアニールが良好にできないことが分かった。従っ
て、結晶性の良い多結晶シリコン膜21が得られないた
め、多結晶シリコンTFT(B)の移動度は駆動回路に
用いるには不十分である。非晶質シリコン膜と多結晶シ
リコン膜をそれぞれ別の工程で堆積させれば上記の様な
問題は解決するが、一方の膜を形成した後、この膜にマ
スクして他方の膜の堆積を行う必要があり、マスク形成
工程や膜堆積の工程増加を招いてしまう。このように従
来の方法では、同一基板上にリーク電流の小さい非晶質
シリコンTFTと高移動度の多結晶シリコンTFTを製
造工程を煩雑にすること無く提供することができなかっ
た。By the way, a pixel switching TFT
Since it is necessary to reduce the dangling bonds in the amorphous silicon film 20 in order to reduce the leakage current of (A), the amorphous silicon film 20 usually contains a large amount of hydrogen of about 12 at. . However, when such a large amount of hydrogen-containing amorphous silicon film 20 is beam-annealed, microvoids are generated or the film is ablated.
It was found that the beam annealing could not be performed well. Therefore, since the polycrystalline silicon film 21 having good crystallinity cannot be obtained, the mobility of the polycrystalline silicon TFT (B) is insufficient for use in a drive circuit. The above problems can be solved by depositing the amorphous silicon film and the polycrystalline silicon film in separate steps, but after forming one film, mask this film to deposit the other film. It is necessary to perform the process, which causes an increase in the mask formation process and the film deposition process. As described above, the conventional method cannot provide an amorphous silicon TFT having a small leak current and a polycrystalline silicon TFT having a high mobility on the same substrate without complicating the manufacturing process.
【0008】[0008]
【発明が解決しようとする課題】従来の液晶表示装置
は、駆動回路一体型TFT−LCDにおいて、駆動回路
部のみ多結晶シリコンTFTを用いる場合、画素スイッ
チング用TFTに用いられている非晶質シリコン膜をビ
ームアニールすると、マイクロボイドが発生したり、膜
が溶発するので、高移動度の多結晶シリコンTFTは得
られないという問題点があった。In a conventional liquid crystal display device, in a driving circuit integrated TFT-LCD, when a polycrystalline silicon TFT is used only in the driving circuit portion, an amorphous silicon used in a pixel switching TFT is used. When the film is beam annealed, microvoids are generated or the film is ablated, so that there is a problem that a polycrystalline silicon TFT having a high mobility cannot be obtained.
【0009】本発明は、上記問題点に鑑みなされたもの
で、リーク電流の小さい非晶質シリコンTFTと高移動
度の多結晶シリコンTFTを同一基板上に簡単に作製す
る半導体装置の製造方法を提供することを目的とする。The present invention has been made in view of the above problems, and provides a method of manufacturing a semiconductor device in which an amorphous silicon TFT having a small leak current and a polycrystalline silicon TFT having a high mobility are easily manufactured on the same substrate. The purpose is to provide.
【0010】[0010]
【課題を解決するための手段】本発明は、同一基板上に
形成される非晶質シリコン薄膜から活性層が夫々形成さ
れる非晶質シリコン薄膜トランジスタと多結晶シリコン
薄膜トランジスタを混在して成る半導体装置の製造方法
において、水素濃度5×1020atoms/cm3 以下の非晶質
シリコン膜を前記基板上に堆積して前記非晶質シリコン
薄膜トランジスタの活性層を形成する工程と、その後前
記非晶質シリコン膜のうち前記非晶質シリコン薄膜トラ
ンジスタの活性層とは異なる非晶質シリコン膜にビーム
アニールを行って多結晶シリコンに変え前記多結晶シリ
コン薄膜トランジスタの活性層を形成する工程と、前記
非晶質シリコン薄膜トランジスタの活性層を水素化する
工程とを具備することを特徴とする半導体装置の製造方
法を提供するものである。SUMMARY OF THE INVENTION The present invention is a semiconductor device in which an amorphous silicon thin film transistor in which an active layer is formed from an amorphous silicon thin film formed on the same substrate and a polycrystalline silicon thin film transistor are mixed. In the manufacturing method of step 1, a step of depositing an amorphous silicon film having a hydrogen concentration of 5 × 10 20 atoms / cm 3 or less on the substrate to form an active layer of the amorphous silicon thin film transistor, Forming an active layer of the polycrystalline silicon thin film transistor by beam annealing an amorphous silicon film different from the active layer of the amorphous silicon thin film transistor in the silicon film to convert it into polycrystalline silicon; And a step of hydrogenating an active layer of a silicon thin film transistor. It
【0011】特に、非晶質シリコン膜の水素化と多結晶
シリコン膜の水素化を同一工程で行うことが好ましい。
ここでの水素濃度は、二次イオン質量分析法によって知
ることができる。In particular, it is preferable to perform hydrogenation of the amorphous silicon film and hydrogenation of the polycrystalline silicon film in the same step.
The hydrogen concentration here can be known by secondary ion mass spectrometry.
【0012】[0012]
【作用】本発明の半導体装置の製造方法によれば、膜中
水素量の少ない非晶質シリコン膜を用いており、高いエ
ネルギーのビームを照射してもマイクロボイドの発生や
膜の溶発がなく、膜厚方向に非晶質シリコン膜全体を結
晶化させることができるので、高移動度の多結晶シリコ
ンTFTを得ることができる。一方、レーザアニールさ
れない非晶質シリコン膜については水素化を行いダング
リングボンドを水素でターミネートさせるので、リーク
電流の少ない非晶質シリコンTFTを作製することがで
きる。この様に膜形成も一度で済み、工程増加も後から
の水素化のみで済むため製造工程を煩雑にしない。According to the method of manufacturing a semiconductor device of the present invention, an amorphous silicon film having a small amount of hydrogen in the film is used, so that microvoids and film ablation are not generated even when a high energy beam is irradiated. Since the entire amorphous silicon film can be crystallized in the film thickness direction, a high mobility polycrystalline silicon TFT can be obtained. On the other hand, since the amorphous silicon film that is not laser-annealed is hydrogenated and the dangling bonds are terminated with hydrogen, an amorphous silicon TFT with a small leak current can be manufactured. In this way, the film formation only needs to be done once, and the number of steps can be increased only by hydrogenation afterward, so that the manufacturing steps are not complicated.
【0013】[0013]
【実施例】以下に本発明を実施例に沿って説明する。 (実施例1)図1に、本発明によるTFTを用いた液晶
表示装置の製造方法を工程順に示す。EXAMPLES The present invention will be described below with reference to examples. (Embodiment 1) FIG. 1 shows a method of manufacturing a liquid crystal display device using a TFT according to the present invention in the order of steps.
【0014】はじめに、図1(a)に示す如く無アルカ
リガラスや石英等の絶縁基板1上に、膜中水素濃度3×
1020atoms/cm3 の非晶質シリコン膜2を形成する。非
晶質シリコン膜2の堆積は、形成条件として、原料ガス
SiH4 ,H2 を用いて、基板温度を450℃〜600
℃の高温でプラズマCVD法によって行う。また、LP
CVD法やスパッタ法等の方法を用いて同様の低水素濃
度の非晶質シリコン2を堆積しても良い。非晶質シリコ
ン膜2の膜厚を500A程度にすることにより、膜厚方
向に膜全体を結晶化することができるので、結晶性の良
い多結晶シリコン膜が得られる。First, as shown in FIG. 1A, the hydrogen concentration in the film is 3 × on an insulating substrate 1 such as non-alkali glass or quartz.
An amorphous silicon film 2 of 10 20 atoms / cm 3 is formed. The deposition of the amorphous silicon film 2 is performed by using the source gases SiH4 and H2 as the forming conditions, and the substrate temperature is 450 ° C. to 600 ° C.
The plasma CVD method is performed at a high temperature of ° C. Also, LP
A similar low hydrogen concentration amorphous silicon 2 may be deposited by using a method such as a CVD method or a sputtering method. By setting the film thickness of the amorphous silicon film 2 to about 500 A, the entire film can be crystallized in the film thickness direction, so that a polycrystalline silicon film with good crystallinity can be obtained.
【0015】次に、図1(b)に示す如く駆動回路部の
非晶質シリコン膜2のみビームアニールを行い、多結晶
シリコン膜21を得る。ビームアニールには、エキシマ
レーザやArレーザ等のレーザビームの他、電子ビームが
用いられ、シリコン膜を溶融固化できるエネルギービー
ムであれば良い。この際、非晶質シリコン2の膜中水素
量が少ないため、マイクロボイドが発生せず、膜の溶発
もなく、高いエネルギーを照射することができる。Next, as shown in FIG. 1B, beam annealing is performed only on the amorphous silicon film 2 in the drive circuit portion to obtain a polycrystalline silicon film 21. For beam annealing, an electron beam is used in addition to a laser beam such as an excimer laser or an Ar laser, and any energy beam that can melt and solidify a silicon film may be used. At this time, since the amount of hydrogen in the film of the amorphous silicon 2 is small, microvoids are not generated, the film is not ablated, and high energy can be irradiated.
【0016】次に、図1(c)に示す如く画素スイッチ
ング用TFTの非晶質シリコン膜2に水素化を行う。水
素化には水素を含む雰囲気中でプラズマ処理する方法を
用いる。この際の水素化の条件は、RFパワー1.45
kW,温度300℃,処理時間60分,ガス圧1.5T
oor である。また、プラズマ以外にマイクロ波を用いて
水素ラジカルを生成させる方法やタングステンフィラメ
ントを用いて原子状水素を生成する方法を用いて水素化
を行なっても良い。このような処理により非晶質シリコ
ン22中のダングリングボンドを水素でターミネートさ
せて、リーク電流を減少させる。また、画素スイッチン
グ用TFTだけではなく、ビームアニールして得られた
駆動回路部の多結晶シリコン21も同時に水素化を行っ
ても良い。多結晶シリコン膜の結晶粒界のダングリング
ボンドを水素でターミネートさせることで、さらに高移
動度でしきい値電圧が低い多結晶シリコンTFTが得ら
れる。この際のシリコン膜の水素化は、3×1020atom
s/cm3 〜6×1020atoms/cm3であることが画素スイッ
チング用TFTの要求特性であるリーク電流を10-12
A以下を満足する点から好ましい。Next, as shown in FIG. 1C, the amorphous silicon film 2 of the pixel switching TFT is hydrogenated. For hydrogenation, a method of performing plasma treatment in an atmosphere containing hydrogen is used. The hydrogenation condition at this time is RF power 1.45.
kW, temperature 300 ° C, processing time 60 minutes, gas pressure 1.5T
oor. Further, hydrogenation may be performed by using a method of generating hydrogen radicals by using microwaves other than plasma or a method of generating atomic hydrogen by using a tungsten filament. By such a treatment, the dangling bond in the amorphous silicon 22 is terminated with hydrogen to reduce the leak current. Further, not only the pixel switching TFT but also the polycrystalline silicon 21 of the drive circuit portion obtained by beam annealing may be hydrogenated at the same time. By terminating the dangling bonds at the crystal grain boundaries of the polycrystalline silicon film with hydrogen, a polycrystalline silicon TFT having higher mobility and lower threshold voltage can be obtained. The hydrogenation of the silicon film at this time is 3 × 10 20 atom
The leak current, which is a required characteristic of the pixel switching TFT, is 10 -12 s / cm 3 to 6 × 10 20 atoms / cm 3.
It is preferable because it satisfies A or less.
【0017】このように非晶質シリコンTFTと多結晶
シリコンTFTの活性層となるべき層を形成した後、非
晶質シリコン22及び多結晶シリコン21をパターニン
グし、この上にゲート絶縁膜3/ゲート電極4を堆積さ
せ、さらにこの非晶質シリコン22及び多結晶シリコン
21のうちチャネルとなる領域の両側にP型ソースをド
ーズ量1×10-15 cm-2、加速電圧80keVにてイオ
ン注入を行いソース23・ドレイン24領域を形成す
る。ゲート絶縁膜3にはSiO2,SiNx 等が用いられ、ゲー
ト電極にはn+ poly-Si 膜を用いる。最後に、層間絶縁
膜5、配線となる金属膜6を堆積、加工して、図1
(d)に示したTFTが完成する。層間絶縁膜5にはSi
O2,SiNx 等が用いられ、配線用の金属膜6にはMo,Al,T
a,Cr 等の高融点金属やそのシリサイドが用いられる。After the layers to be the active layers of the amorphous silicon TFT and the polycrystalline silicon TFT are formed in this way, the amorphous silicon 22 and the polycrystalline silicon 21 are patterned, and the gate insulating film 3 / A gate electrode 4 is deposited, and a P-type source is ion-implanted at a dose amount of 1 × 10 −15 cm −2 and an accelerating voltage of 80 keV on both sides of the channel region of the amorphous silicon 22 and the polycrystalline silicon 21. Then, the source 23 and drain 24 regions are formed. SiO2, SiNx or the like is used for the gate insulating film 3, and an n + poly-Si film is used for the gate electrode. Finally, the interlayer insulating film 5 and the metal film 6 to be the wiring are deposited and processed, and
The TFT shown in (d) is completed. Si is used for the interlayer insulating film 5.
O2, SiNx, etc. are used, and Mo, Al, T are used for the metal film 6 for wiring.
Refractory metals such as a and Cr and their silicides are used.
【0018】図2は、電界効果移動度とビームアニール
前の膜中水素量の関係を示している。ここで、移動度は
非晶質シリコン膜が溶発しない照射エネルギーの範囲で
ビームアニールして結晶化させた場合に得られた最大値
である。非晶質シリコンの膜中水素濃度が5×1020at
oms/cm3 以下であれば、10インチ型TFT−LCDの
駆動回路の仕様条件を満足する高移動度の多結晶シリコ
ンTFTが得られることがわかる。以上のように、本実
施例の製造方法では、低リーク電流の非晶質シリコンT
FTと高移動度の多結晶シリコンTFTを同一基板上に
簡単に形成することができる。FIG. 2 shows the relationship between the field effect mobility and the amount of hydrogen in the film before beam annealing. Here, the mobility is the maximum value obtained when the film is crystallized by beam annealing in a range of irradiation energy that does not ablate the amorphous silicon film. Hydrogen concentration in the amorphous silicon film is 5 × 10 20 at
It can be seen that if it is oms / cm 3 or less, a high mobility polycrystalline silicon TFT satisfying the specification conditions of the drive circuit of the 10-inch TFT-LCD can be obtained. As described above, according to the manufacturing method of this embodiment, the amorphous silicon T having a low leakage current is used.
The FT and the high mobility polycrystalline silicon TFT can be easily formed on the same substrate.
【0019】以上のような製造方法によって10インチ
型TFT−LCDを形成することによって、駆動回路の
TFTと画素用のTFTの活性層を別々に形成した従来
の場合と比べて、従来行っていた駆動回路用TFTの活
性層を形成した後、この膜にマスクを形成し、またマス
ク形成に必要な露光工程、さらには画素用TFTの活性
層形成工程等の工程が全て不必要となり、本実施例では
水素処理工程が増えるにしても大幅な工程削減ができ
る。しかも、一枚のガラス基板上に駆動用のTFTと画
素用のTFTを同時に形成できるという基本的な利益も
同時に達成できる。 (実施例2)図3には本発明の実施例2を示す。以下、
実施例1と同一部分は、同一番号を付し、詳細は省略す
る。By forming the 10-inch type TFT-LCD by the above-described manufacturing method, the conventional method is used as compared with the conventional case in which the active layers of the driving circuit TFT and the pixel TFT are separately formed. After the active layer of the driving circuit TFT is formed, a mask is formed on this film, and the exposure process required for the mask formation and the process of forming the active layer of the pixel TFT are all unnecessary. In the example, even if the number of hydrogen treatment steps is increased, the number of steps can be significantly reduced. Moreover, the basic advantage that the driving TFT and the pixel TFT can be simultaneously formed on one glass substrate can be achieved at the same time. (Second Embodiment) FIG. 3 shows a second embodiment of the present invention. Less than,
The same parts as those in the first embodiment are designated by the same reference numerals, and the details are omitted.
【0020】はじめに、絶縁基板上1に導電膜7を堆積
してゲート電極形状にエッチングによってパターニング
した後に、ゲート絶縁膜3/非晶質シリコン膜2から成
る積層膜を形成する。導電膜7にはTFTのゲート電極
材料として使用できるMo,Ta,Cr等の高融点金属やそのシ
リサイドが用いられ、ゲート絶縁膜3にはSiO2,SiNx等
が用いられる。場合によってはゲート電極7の表面を陽
極酸化しても良い。非晶質シリコン膜2は、膜中水素濃
度3×1020atoms/cm3 の非晶質シリコン膜2を用いる
(図3(a))。First, a conductive film 7 is deposited on an insulating substrate 1 and patterned by etching into a gate electrode shape, and then a laminated film of a gate insulating film 3 / amorphous silicon film 2 is formed. A refractory metal such as Mo, Ta, or Cr that can be used as a gate electrode material of a TFT or its silicide is used for the conductive film 7, and SiO2, SiNx or the like is used for the gate insulating film 3. In some cases, the surface of the gate electrode 7 may be anodized. As the amorphous silicon film 2, the amorphous silicon film 2 having a hydrogen concentration in the film of 3 × 10 20 atoms / cm 3 is used (FIG. 3A).
【0021】次に、駆動回路部の非晶質シリコン膜2の
みビームアニールを行い、結晶化させ、多結晶シリコン
膜21を得る。この際の条件は、実施例1と同様に行な
う(図3(b))。Next, only the amorphous silicon film 2 in the drive circuit portion is beam-annealed and crystallized to obtain a polycrystalline silicon film 21. The conditions at this time are the same as in Example 1 (FIG. 3B).
【0022】さらに、画素スイッチング用TFTの非晶
質シリコン膜2に水素化を行う。水素化の条件は、実施
例1と同様に行なう。このような処理により非晶質シリ
コン22中のダングリングボンドを水素でターミネート
させて、リーク電流を減少させる。また、画素スイッチ
ング用TFTだけではなく、ビームアニールして得られ
た駆動回路部の多結晶シリコン21も同時に水素化を行
っても良い(図3(c))。Further, the amorphous silicon film 2 of the pixel switching TFT is hydrogenated. The hydrogenation conditions are the same as in Example 1. By such a treatment, the dangling bond in the amorphous silicon 22 is terminated with hydrogen to reduce the leak current. Further, not only the pixel switching TFT but also the polycrystalline silicon 21 of the drive circuit portion obtained by beam annealing may be hydrogenated at the same time (FIG. 3C).
【0023】次に、チャネル部21、22のエッチング
を防止するためのSiNx等の窒化膜8をCVD法により堆
積させその後パターニングする(図3(d))。最後
に、n+ 膜9/金属膜6を図3(e)のように形成し
て、ソース・ドレインとする。n+ 膜9にはn+ a-Si膜
や多結晶n+ Si膜が用いられる。Next, a nitride film 8 of SiNx or the like for preventing the etching of the channel portions 21 and 22 is deposited by the CVD method and then patterned (FIG. 3D). Finally, the n + film 9 / metal film 6 is formed as shown in FIG. As the n + film 9, an n + a-Si film or a polycrystalline n + Si film is used.
【0024】以上のようにして10インチ型TFT−L
CDを形成した場合、実施例1と同様の効果を奏するこ
とができる。本発明は上記実施例に限られるものではな
く、その趣旨を逸脱しない範囲で以下のように種々変形
することができる。 (1)上記2つの実施例ではnチャネルTFTを例に述
べたが、ソース・ドレイン領域の導電型を逆にすること
によりpチャネルも同様に製造できる。 (2)本発明は液晶表示装置だけでなく、同一基板上に
多結晶シリコンTFTと非晶質シリコンTFTを形成す
る他の半導体装置例えば、イメージセンサー、プリンタ
ーヘッド等にも適用することができる。As described above, the 10-inch TFT-L
When the CD is formed, the same effect as that of the first embodiment can be obtained. The present invention is not limited to the above embodiments, but can be variously modified as follows without departing from the gist thereof. (1) In the above two embodiments, the n-channel TFT has been described as an example, but the p-channel can be similarly manufactured by reversing the conductivity type of the source / drain regions. (2) The present invention can be applied not only to the liquid crystal display device but also to other semiconductor devices such as an image sensor and a printer head which form a polycrystalline silicon TFT and an amorphous silicon TFT on the same substrate.
【0025】[0025]
【発明の効果】以上のように、本発明によればリーク電
流の小さい非晶質シリコンTFTと高移動度の多結晶シ
リコンTFTを同一基板上に簡単に作製する半導体装置
の製造方法を提供することができる。As described above, according to the present invention, there is provided a method for manufacturing a semiconductor device in which an amorphous silicon TFT having a small leak current and a polycrystalline silicon TFT having a high mobility are easily manufactured on the same substrate. be able to.
【図1】本発明の実施例1の工程順の断面図1A to 1C are cross-sectional views in order of steps of a first embodiment of the present invention.
【図2】本発明の実施例1を説明する図FIG. 2 is a diagram for explaining the first embodiment of the present invention.
【図3】本発明の実施例2の工程順の断面図3A to 3C are cross-sectional views in order of steps of Embodiment 2 of the present invention.
【図4】従来例の工程順の断面図4A to 4C are cross-sectional views in the order of steps of a conventional example.
1…絶縁基板 2…低水素濃度の非晶質シリコン膜 3…ゲート絶縁膜 4…ゲート電極 5…層間絶縁膜 6…金属膜 7…導電膜 8…窒化膜 9…n+ Si膜 20…12at. %の水素を含む非晶質シリコン膜 21…多結晶シリコン膜 22…水素化された非晶質シリコン膜 23…ソース領域 24…ドレイン領域DESCRIPTION OF SYMBOLS 1 ... Insulating substrate 2 ... Amorphous silicon film of low hydrogen concentration 3 ... Gate insulating film 4 ... Gate electrode 5 ... Interlayer insulating film 6 ... Metal film 7 ... Conductive film 8 ... Nitride film 9 ... N + Si film 20 ... 12at Amorphous silicon film containing.% Hydrogen 21 ... Polycrystalline silicon film 22 ... Hydrogenated amorphous silicon film 23 ... Source region 24 ... Drain region
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 H01L 21/336 ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 6 Identification code Office reference number FI technical display location H01L 21/336
Claims (1)
薄膜から活性層が夫々形成される非晶質シリコン薄膜ト
ランジスタと多結晶シリコン薄膜トランジスタを混在し
て成る半導体装置の製造方法において、水素濃度5×1
020atoms/cm3 以下の非晶質シリコン膜を前記基板上に
堆積して前記非晶質シリコン薄膜トランジスタの活性層
を形成する工程と、その後前記非晶質シリコン膜のうち
前記非晶質シリコン薄膜トランジスタの活性層とは異な
る非晶質シリコン膜にビームアニールを行って多結晶シ
リコンに変え前記多結晶シリコン薄膜トランジスタの活
性層を形成する工程と、その後前記非晶質シリコン薄膜
トランジスタの活性層を水素化する工程とを具備するこ
とを特徴とする半導体装置の製造方法。1. A method of manufacturing a semiconductor device comprising a mixture of an amorphous silicon thin film transistor in which an active layer is formed from an amorphous silicon thin film formed on the same substrate and a polycrystalline silicon thin film transistor in a mixed manner. × 1
A step of depositing an amorphous silicon film of 0 20 atoms / cm 3 or less on the substrate to form an active layer of the amorphous silicon thin film transistor, and thereafter, the amorphous silicon of the amorphous silicon film. A step of performing beam annealing on an amorphous silicon film different from the active layer of the thin film transistor to convert it into polycrystalline silicon to form the active layer of the polycrystalline silicon thin film transistor, and then hydrogenating the active layer of the amorphous silicon thin film transistor. A method of manufacturing a semiconductor device, comprising:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17950293A JPH0738110A (en) | 1993-07-21 | 1993-07-21 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17950293A JPH0738110A (en) | 1993-07-21 | 1993-07-21 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0738110A true JPH0738110A (en) | 1995-02-07 |
Family
ID=16066941
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17950293A Pending JPH0738110A (en) | 1993-07-21 | 1993-07-21 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0738110A (en) |
Cited By (11)
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---|---|---|---|---|
JPH07270818A (en) * | 1994-03-28 | 1995-10-20 | Sharp Corp | Production for semiconductor substrate and production device therefor |
JP2000299470A (en) * | 1999-02-12 | 2000-10-24 | Semiconductor Energy Lab Co Ltd | Semiconductor device and manufacture thereof |
US6821343B2 (en) | 2000-08-25 | 2004-11-23 | Fujitsu Limited | Semiconductor device, manufacturing method therefor, and semiconductor manufacturing apparatus |
JP2005039173A (en) * | 2003-07-02 | 2005-02-10 | Sony Corp | Thin film transistor and method for manufacturing the same, and display unit and method for manufacturing the same |
JP2005136253A (en) * | 2003-10-31 | 2005-05-26 | Sony Corp | Thin film transistor and its manufacturing method, and display device and its manufacturing method |
US6977192B2 (en) | 1996-03-10 | 2005-12-20 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing thin film semiconductor device |
JP2008288266A (en) * | 2007-05-15 | 2008-11-27 | Advanced Lcd Technologies Development Center Co Ltd | Method of crystallizing semiconductor film, and substrate with the semiconductor film |
JP2008311545A (en) * | 2007-06-18 | 2008-12-25 | Hitachi Displays Ltd | Display device |
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-
1993
- 1993-07-21 JP JP17950293A patent/JPH0738110A/en active Pending
Cited By (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07270818A (en) * | 1994-03-28 | 1995-10-20 | Sharp Corp | Production for semiconductor substrate and production device therefor |
US6977192B2 (en) | 1996-03-10 | 2005-12-20 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing thin film semiconductor device |
US7763503B2 (en) | 1996-03-10 | 2010-07-27 | Semiconductor Energy Laboratory Co., Ltd. | Thin film semiconductor device and method of manufacturing the same |
JP2000299470A (en) * | 1999-02-12 | 2000-10-24 | Semiconductor Energy Lab Co Ltd | Semiconductor device and manufacture thereof |
US9097953B2 (en) | 1999-02-12 | 2015-08-04 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, and method of forming the same |
JP4731655B2 (en) * | 1999-02-12 | 2011-07-27 | 株式会社半導体エネルギー研究所 | Method for manufacturing semiconductor device |
US6861328B2 (en) | 2000-08-25 | 2005-03-01 | Fujitsu Limited | Semiconductor device, manufacturing method therefor, and semiconductor manufacturing apparatus |
US6821343B2 (en) | 2000-08-25 | 2004-11-23 | Fujitsu Limited | Semiconductor device, manufacturing method therefor, and semiconductor manufacturing apparatus |
JP2005039173A (en) * | 2003-07-02 | 2005-02-10 | Sony Corp | Thin film transistor and method for manufacturing the same, and display unit and method for manufacturing the same |
JP2005136253A (en) * | 2003-10-31 | 2005-05-26 | Sony Corp | Thin film transistor and its manufacturing method, and display device and its manufacturing method |
JP4573091B2 (en) * | 2003-10-31 | 2010-11-04 | ソニー株式会社 | THIN FILM TRANSISTOR AND ITS MANUFACTURING METHOD, DISPLAY DEVICE AND ITS MANUFACTURING METHOD |
US7863602B2 (en) | 2005-11-25 | 2011-01-04 | Samsung Electronics Co., Ltd. | Organic light emitting diode display and method for manufacturing the same |
JP2008288266A (en) * | 2007-05-15 | 2008-11-27 | Advanced Lcd Technologies Development Center Co Ltd | Method of crystallizing semiconductor film, and substrate with the semiconductor film |
JP2008311545A (en) * | 2007-06-18 | 2008-12-25 | Hitachi Displays Ltd | Display device |
WO2017042941A1 (en) * | 2015-09-10 | 2017-03-16 | 堺ディスプレイプロダクト株式会社 | Display device and display device manufacturing method |
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JPWO2017042941A1 (en) * | 2015-09-10 | 2018-08-16 | 堺ディスプレイプロダクト株式会社 | Display device and manufacturing method of display device |
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