JPH07114193B2 - Method of forming fine pattern - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Outline] A method of forming a fine pattern such as a contact hole provided in an interlayer insulating film, which is used for forming a fine pattern in the interlayer insulating film by an ion milling method using argon (Ar) gas. Then, a first metal film having a low etching rate and a second metal film having a high etching rate are formed on the interlayer insulating film by a vacuum deposition method or a sputtering method, and then a photoresist film having an opening is formed, Using this photoresist film as a mask, the second metal film underneath is ion-milled,
Using the etched metal film as a mask, the second metal film and the insulating film thereunder are subjected to reactive dry etching.

By controlling the thickness of the second metal film, the size of the opening of the fine pattern opened in the insulating film is controlled.

[Industrial application field]

The present invention relates to a method of forming a fine pattern in manufacturing a semiconductor device.

In the manufacture of a semiconductor device, a contact hole provided in an interlayer insulating film formed on a substrate, or a gate electrode having a fine size, a pattern having a fine size, a highly integrated semiconductor device formed, It is required to satisfy the demands for speeding up.

Gallium arsenide (GaAs) used especially for satellite communication
A field effect transistor for low noise using a compound semiconductor substrate such as is desired to have a high gain and a low noise in a high frequency operation region, and therefore a device having a high cutoff frequency is required.

The cutoff frequency of such a field effect transistor is proportional to the mobility of carriers traveling in the semiconductor device and inversely proportional to the square of the channel length of the device.

Therefore, GaAs, which has a high electron mobility, is one of the semiconductor materials.
, And the channel length, that is, the gate length,
Those of 0.5 μm or less are required.

[Conventional technology]

A conventional method of manufacturing a field effect transistor having such a gate electrode having a fine pattern using GaAs as a substrate will be described with reference to FIGS. 7 (a) to 7 (h).

First, as shown in FIG. 7 (a), a photoresist film 2 having a predetermined pattern is formed on a region where a gate electrode is to be formed on a substrate 1 in which an epitaxial layer has been grown on a semi-insulating GaAs substrate in advance.
Are formed by using the photolithography method.

Next, as shown in FIG. 7B, the substrate 1 is etched into a mesa shape by using the photoresist film 2 as a mask in order to avoid influence on other elements.

Further, as shown in FIG. 7C, after removing the photoresist film 2 described above, photoresist films 3A, 3B, 3C are newly formed in regions other than the regions where the source and drain electrodes are to be formed by photolithography. .

Further, as shown in FIG. 7 (d), a metal film 4 made of a gold-germanium / gold alloy for a source electrode and a drain electrode, which will be formed in a later step, is deposited on the substrate 1 by vapor deposition. To do.

Further, as shown in FIG. 7 (e), the source electrode 5 and the drain electrode 6 are formed by a so-called lift-off method in which the photoresist films 3A, 3B, 3C described above are removed and the metal film thereon is also removed.

Next, as shown in FIG. 7 (f), a photoresist film 7 is formed again on the substrate, and an electron beam exposure method or an ion beam exposure method is used to open a gate electrode formation planned region in a predetermined pattern. The opening 8 is formed.

Then, as shown in FIG. 7 (g), gold for the gate electrode
A metal film 9 made of an aluminum alloy is deposited on the substrate by vapor deposition.

Further, as shown in FIG. 7H, the gate electrode 10 was formed on the substrate by removing the photoresist film 7 and the metal film 9 thereon.

By the way, when the photoresist film 7 shown in FIG. 7 (f) is exposed by the electron beam exposure method or the ion beam exposure method, a long time is required for the exposure,
It has a drawback that the process is too long and the cost is high.

Therefore, using the deep ultraviolet exposure method, the gate length is 0.25 μm.
A conventional method for obtaining the pattern is shown.

First, as shown in FIG. 8A, a first silicon dioxide (SiO ₂ ) film 12 is formed on a GaAs substrate 11 by chemical vapor deposition (CVD).
It is formed using the method.

Next, as shown in FIG. 8B, after forming a photoresist film 13 on the substrate, a first opening 14 having a width of 0.5 μm is formed on the gate electrode formation planned region by using a photolithography method.

Next, as shown in FIG. 8 (c), the lower SiO ₂ film 12 is covered with carbon tetrafluoride gas (C) by using the photoresist film 13 as a mask.
Etching is performed using the reactive ion etching (RIE) method using F ₄ ) as a reaction gas.

Then, as shown in FIG. 8D, after the photoresist film 13 is removed, the second SiO ₂ film 14 is replaced with the first SiO ₂ film.
Re-deposit and form on 12 by CVD method.

Then, as shown in FIG. 8 (e), the second SiO ₂ film 12A is etched to form the above-mentioned first opening portion in the first SiO ₂ film 12.
Second opening 15 narrower than 14 and having a dimension of 0.25 μm
To form.

The first SiO ₂ film having the first opening 14 thus formed
After forming 12 the second opening 15 is further formed
A _second SiO ₂ film 12A is formed and has this second opening 15.
By etching the SiO ₂ film 12A without using a mask, fine openings are formed in the second SiO ₂ film 12A.

Next, as shown in FIG. 8 (f), the first and second SiO ₂ films 1 having openings 15 formed with fine dimensions of 0.25 μm.
A metal film 16 for forming a gate electrode is formed on 2, 12A by vapor deposition.

Further, as shown in FIG. 8G, a photoresist film 17 having a predetermined pattern is formed on the metal film 16.

Then, as shown in FIG. 8 (h), the photoresist film 17
After the metal film 16 is etched into a predetermined pattern by a dry etching method using carbon tetrachloride (CCl ₄ ) gas as a reaction gas with using as a mask, or an ion milling method using Ar gas, a photoresist film 17 on the metal film 16 is etched. Is removed to form a gate electrode 18 in which the upper portion of the fine pattern spreads in a T shape.

By doing so, the width dimension l of the gate electrode 18 becomes 0.25 μm.
A gate electrode having a fine pattern of m can be obtained.

[Problems to be solved by the invention]

However, the methods using the ion beam exposure method and the electron beam exposure method described above have the drawback that the exposure takes too much time and the working efficiency is poor.

In the method of forming the above-mentioned insulating film twice by using the far-ultraviolet exposure method to form the opening, the first SiO ₂ film 12 is etched by using the photoresist film 13 of FIG. 8B as a mask. And the second SiO ₂ film shown in FIG. 8 (d)
In the process of etching 12A, only the gate portion of the GaAs substrate 11 is etched twice. This portion is a region where the epitaxial layer of AlGaAs is formed in the hetero structure, and the semiconductor formed by this etching. There is a problem that the threshold value of the gate voltage of the device deviates from the designed value.

Therefore, using this photoresist film 13 as a mask,
When the SiO ₂ film was dry-etched, a low voltage was applied between the electrode of this dry-etching device and the substrate so that the surface of the substrate was not damaged during etching.

However, this method requires a long time for etching, so that the opening of the photoresist film is too wide and the opening of the SiO ₂ film cannot be accurately formed in a desired pattern.

Therefore, a method of applying a high voltage between the electrode of the dry etching apparatus and the substrate to etch the SiO ₂ film in a short time, and then heat treating the substrate surface damaged by the etching has been adopted. However, this method is not preferable because the two-dimensional electron gas layer of AlGaAs formed in the heterostructure is damaged.

The present invention eliminates the above-mentioned drawbacks and requires only one etching, and even when a low voltage is applied between the substrate and the electrode of the dry etching apparatus for a long time etching, the opening of the resist pattern does not widen and is fine. The present invention provides a method for forming a fine pattern that enables formation of various patterns.

[Means for solving problems]

As shown in the principle diagram of FIG. 1, the method of forming a fine pattern of the present invention comprises: a first metal film 23 having a low etching rate by Ar milling on an interlayer insulating film 22 formed on a substrate 21;
After laminating the second metal film 24 having a high etching rate, laminating a photoresist film 26 having an opening 25,
By etching the lower second metal film 24 using the photoresist film 26 having the opening 25 as a mask to control the thickness of the second metal film 24, the interlayer insulating film 22 and the first metal film 24 are formed. The size of the holes opened in the membrane 23 should be controlled.

[Action]

According to the present invention, a first metal film made of titanium having a slow argon ion beam etching rate and a second metal film made of gold having a high etching rate are stacked on the interlayer insulating film, and a photoresist film having an opening is formed thereon. Form. When the argon ion beam is irradiated from above with the photoresist film as a mask, the second metal film is etched, and the etching product is formed on the side wall of the opening of the photoresist film and the second metal film.
Adhere to the side wall of the metal film.

The reason for this is that the side wall of the opening is not sufficiently irradiated with the beam from the center of the opening, so that etching products remain, and if etching is performed using the photoresist film on which the etching products remain as a mask, the second metal is removed. The film is etched in a taper shape.

Then, the first metal film and the interlayer insulating film are sequentially subjected to ion beam etching with argon gas using the photoresist film and the taper-etched second metal film as a mask.

Then, in order to prevent the substrate surface from being damaged, the voltage applied between the electrode of the etching apparatus and the substrate is set to a low voltage, and the substrate is not damaged even when the etching is performed for a long time.
An opening having a size smaller than the size of the opening of the photoresist film is formed in the interlayer insulating film, and a fine pattern can be surely obtained.

〔Example〕

An embodiment of the present invention will be described in detail below with reference to the drawings.

As shown in FIG. 2, a 3,000 Å-thick Si layer is formed as an interlayer insulating film on the GaAs substrate 31 on which the AlGaAs epitaxial layer is formed.
The O ₂ film 32 is formed by the CVD method.

Next, a titanium (Ti) film 33 as a first metal film is formed by vapor deposition to have a thickness of 500Å.

Then, a gold (Au) film 34 having a thickness of 4000 Å is formed thereon by vapor deposition as a second metal film having an etching rate higher than that of the first metal film by ion milling using Ar gas.

Further, a photoresist film 35 is applied and formed thereon to a thickness of 6000Å, and then an opening 36 having a size of 0.5 μm is formed by using a photolithography method.

Here, the etching rate of the ion etching using Ar gas is 150 Å / min for the first metal film 3,
When the second metal film 34 has a rate of 500 Å / min, the etching rate of the first metal film is rA, and the etching rate of the second metal film is rB, the equation (1) holds.

rA << rB (1) FIG. 3 shows the etching amount of the second metal film 34, the size of the opening 36 of the photoresist film 35, the bottom of the second metal film 34, and the insulating film 32. It is a relationship diagram with the pattern formed in.

As shown in FIG. 2, when the ion milling is performed using Ar gas with the photoresist film 35 having the opening 36 as a mask, the etched metal ions are exposed to the opening.
Redeposition 36 on the sidewalls, whereby the etched dimension d ₁ of the metal film 34 decreases as the metal film 34 is etched, as shown by curve 41 in FIG.

The vertical axis 42 in FIG. 3 represents the distance or length dimension such as the dimension d ₁ and the dimension d ₀ of the opening 36 of the photoresist film, and the horizontal axis 43 represents the etching amount of the metal film 34 ( t), and the vertical axis 44 indicates the taper angle θ at which the metal film 34 is etched.

A curve 45 shows a state in which the opening size d ₀ of the opening 36 of the photoresist film 35 shown in FIG. 2 expands with etching, and a curve 46 shows a state in which the thickness t ₁ of the photoresist film 35 decreases with the etching time. Shows.

A curve 47 shows a state in which the taper angle in the opening 36 of the photoresist film 35 decreases with the etching time.

Here, if the dimension of d ₁ (that is, corresponding to the dimension Lg of the gate length of the gate electrode to be formed in a later step) is 0.3 μm, the thickness of the metal film 34 can be calculated from the curve 41. 3500
Å thickness is required, and d ₁ or gate electrode dimension Lg is 0.25μ
In order to obtain a pattern of m, the metal film 34 needs to have a thickness of 4200Å from the curve 41.
If the thickness of the gate electrode is determined, the dimension of d ₁ , that is, the dimension Lg of the gate electrode can be determined accordingly.

Here, the thickness of the metal film 34 is 4200Å and the dimension of Lg is 0.25 μm.
Fig. 4 shows an electron micrograph of the case of forming the above.

In the figure, 31 is a GaAs substrate, 32 is an insulating film made of a SiO ₂ film, 33
Is a first metal film made of Ti, 34 is a second metal film made of Au, 35 is a resist film, and the gate length dimension Lg is 0.25 μm.
Becomes

Further, FIG. 5 shows an electron micrograph showing a state in which the insulating film 32 made of the SiO ₂ film is etched.

As shown in the figure, the size of Lg has spread to 0.35 μm, but since it is 0.5 μm or less, it is fully practical.

Such a method of the present invention will be described when it is actually applied to a field effect FET using GaAs as a substrate.

First, as shown in FIG. 6 (a), the thickness is set on the GaAs substrate 31.
A 3000 Å SiO ₂ film 32 is formed, on which a 500 Å thick Ti film 3 is formed.
3 and 4000 Å thick Au film 34 is formed and then 0.5 μm
A photoresist film 35 having an opening 36 is formed.

Then, as shown in FIG. 6 (b), the resist film 35 is used as a mask and the Au film 34 and the Ti film 33 thereunder are replaced with Ar.
Etching is performed by an ion milling method using a gas as a reaction gas. In this case, as described above, metal ions milled by Ar ions adhere to the side walls of the opening 36 of the resist film 33 and the side walls of the Au film 34, and the opening 36 becomes the bottom. , The dimension l of the opening is narrowed.

The Ti film is hardly attacked by the ion milling method using Ar gas.

Then, as shown in FIG. 6C, the Au film is not attacked by using the Au film 34 thus etched as a mask, but the Ti film is attacked by using a mixed gas of CF ₄ gas and oxygen gas. The lower Ti film 33 and the lower SiO ₂ film are etched.

Then, the Au film 34 having the narrowed opening is used as a mask, and the SiO ₂ film 32 is formed with the finely-sized opening.
Are etched.

Then, as shown in FIG. 6 (d), the Au film 34 and the Ti film are not etched, but the Au film 34 and the Ti film 33 are etched by using an etching solution mainly containing hydrofluoric acid for etching the Au film 34 and the Ti film 33. Etch 33.

Then, as shown in FIG. 6 (e), a metal film 51 of gold-platinum-titanium alloy for the gate electrode is formed by vapor deposition or sputtering.

Next, as shown in FIG. 6F, a photoresist film 52 having a predetermined pattern is formed on the metal film 51 by using a photolithography method.

Next, as shown in FIG. 6G, the metal film 51 is etched into a predetermined pattern by ion milling using Ar gas using the resist film 52 as a mask to form a gate electrode.

After that, the SiO ₂ film 32 is removed to form a T-shaped gate electrode, and the Schottky junction is performed on the substrate to form the gate electrode.

By doing so, a semiconductor device having a gate length Lg of 0.1 μm can be easily obtained with high accuracy.

〔The invention's effect〕

As described above, according to the method of the present invention, the width dimension of the gate electrode formed by the thickness of the metal film can be controlled. Further, the number of etchings can be reduced to once compared with the conventional two times, and the substrate is less likely to be damaged.

[Brief description of drawings]

FIG. 1 is a principle diagram showing the method of the present invention, FIG. 2 is an explanatory diagram of the method of the present invention, FIG. 3 is a relational diagram between a metal film formed by the method of the present invention and a pattern dimension of an insulating film, 4 and 5 are electron micrographs showing the crystal structure of the semiconductor substrate including the pattern of the insulating film formed by the method of the present invention. 6 (a) to 6 (g) are sectional views showing steps of forming a field effect transistor using the method of the present invention, and FIGS. 7 (a) to 7 (h). 8A to 8H are sectional views showing the conventional method in pure steps. In the figure, 21 is a substrate, 22 is an interlayer insulating film, 23 is a first metal film, 24 is a second metal film, 25 and 36 are openings, 26 and 35 are photoresist films,
31 is a GaAs substrate, 32 is a SiO ₂ film, 33 is a Ti film, 34 is an Au film, 35, 5
2 is a photoresist film, 41 is a relational curve between the etching amount and the gate length, 42 and 44 are vertical axes, 43 is a horizontal axis indicating the etching amount, 45 is a relational curve between the opening and the etching amount, and 46 is a resist film. Relationship curve between thickness and etching amount, 47 relationship curve between taper angle and etching amount, 51 metal film, d ₁ , l ′
Is the opening size of the metal film, d ₀ is the opening size of the photoresist film, t is the etching size of the metal film, t ₁ is the thickness of the photoresist film, θ is the taper angle of the metal film, and Lg is the gate length. Show.

Claims (4)

[Claims] 1. A first metal film having a slow etching rate by argon ion beam etching and a second metal film having a fast etching rate are sequentially laminated on an interlayer insulating film formed on a substrate, and then the first metal film is formed. A photoresist film having an opening is laminated on the second metal film, and the product to be etched of the second metal film is formed on the sidewall of the opening of the photoresist film and the photoresist film having the opening by using the photoresist film having the opening as a mask. The second metal film is etched in a taper shape while being reattached to the side wall of the opening of the second metal film, and the photoresist film,
A method for forming a fine pattern, which comprises etching the first metal film and the interlayer insulating film using the second metal film as a mask. 2. An interlayer insulating film formed on a semiconductor substrate,
After sequentially laminating a first metal film having a low etching rate by ion beam etching and a second metal film having a high etching rate, a photoresist film having an opening is laminated to form a photoresist film having the opening. The second metal film is etched in a taper shape while reattaching the product to be etched of the second metal film as a mask to the sidewall of the opening of the photoresist film and the sidewall of the opening of the second metal film. Then, the first metal film and the interlayer insulating film are etched by using the photoresist film and the second metal film as a mask, and then the second metal film and the first metal film are removed, and then a gate electrode is formed on the substrate. A method for forming a fine pattern, which comprises depositing a metal film for use on a substrate and forming the metal film in a predetermined pattern. 3. The size of a hole opened in the first metal film and the interlayer insulating film is controlled by controlling the thickness of the second metal film. 1. The method for forming a fine pattern as described in 1 or 2 above. 4. The first metal film having a low etching rate is titanium, and the second metal film having a high etching rate is gold. The method for forming a fine pattern according to item.