JPH07105507B2 - Photovoltaic device - Google Patents

Description

The present invention relates to a semiconductor device. More particularly, it relates to improved photovoltaic devices.

Hydrogenated amorphous silicon thin film (hereinafter a-
Si: H) is applied to semiconductor devices and has been manufactured by various techniques. Journal of Electrochemical Society (Jour
nal of the Electrochemical Society, Vol. 116, No. 1 (January 1969), pages 77-81, entitled "Manufacturing and Properties of Amorphous Silicon," in Chittick, A.
Lexander and Sterling are able to dope both donor and acceptor impurities by inductively coupled RF glow discharge in silane (SiH ₄ ) gas, which results in a wide range of conductivity of a-Si: H. It has been reported that a low conductivity a-Si: H having a variable rate was produced. Recently, a-Si: H has been produced by vapor deposition of silicon in a H ₂ + Ar atmosphere. This thin film exhibits semiconductor properties similar to a-Si: H made from silane in glow discharge.

Originally, a-Si: H was synthesized by glow discharge in SiF ₄ and H ₂ . This method was developed under the guidance of the inventor and is described in British Patent No. 933,545 (issued August 8, 1963). The excellent dielectric properties and high resistance of a-Si: H are tabulated on page 4 of the above patent specification.
The high resistance a-Si: H is particularly suitable as a component of the connections described herein.

U.S. Pat. No. 4,064,521 describes a photovoltaic junction consisting of P-type, N-type and intrinsic a-Si: H deposited by glow discharge. In the patent, Chittick
The gaseous dopants, diboron and phosphine, mixed with silane, shown in the above-mentioned papers, have a volume ratio of 1/2 to
5% used.

Similarly, British Patent No. 2,018,446 (issued October 17, 1979) describes various image-forming devices having a joint consisting of two a-Si: H layers of different conductivity types. There is. Protective and blocking layers for a-Si: H are also described.

Also, in a paper entitled "Photoconductive Images Using Amorphous Silicon Thin Films" in Applied Physics Letters, Volume 35, 4 (August 15, 1979), pages 349-351, Y.
A vidicon imaging device made of sputtered a-Si: H by Imamura et al. Is described.

Finally, in the field of semiconductors, it is well established to implant highly accelerated boron ions in silicon wafers as dopants. The dopant ions are implanted in the crystal-silicon by a corona discharge. This method is described by Wichner and Charlson's J.
5 of ournal of Electronic Materials Volume 5 (197
6 years), pp. 513-529, entitled "Silicon Solar Cells Made by Corona Discharge".
What is important here is that, as described on page 518, the discharge must be kept in a corona state so that the voltage between the electrodes can be maintained at several kilovolts. Moreover, in order to obtain a sufficient implantation depth (range), a plurality of charged ionic species of high energy are required. Glow discharge is therefore specifically excluded because the voltage and therefore the energy of the ions are too low for the voltage and boron ion energy to obtain a useful implant depth.

That is, the photovoltaic device according to the present invention is a photovoltaic device having a structure in which a semiconductor region is provided between a pair of electrodes, and light is incident on the semiconductor region from the transparent electrode side of the pair of electrodes, The semiconductor region is provided on the I-type semiconductor layer made of hydrogenated amorphous silicon, the N-type semiconductor layer provided on one surface side of the I-type semiconductor layer, and the other surface side of the I-type semiconductor layer. And a layer of
The photovoltaic device is characterized in that the layer provided on the other surface side of the type semiconductor layer is formed of hydrogenated amorphous boron.

Hereinafter, the present invention will be described in detail with reference to the drawings.

FIG. 1 is a schematic diagram of a glow discharge device for producing a coating of intrinsic semiconductor (I), P-type and N-type a-Si: H on a metal surface M. A typical PIN / M photovoltaic device made using the device of FIG. 1 is shown in FIG. Substrate 1 is 0.01 inch thick stainless steel 11 having a 3 inch by 4 inch square surface supported by electrodes 2. The resistance heater 3 is embedded in a ceramic block 3a for supporting and heating the electrode 2 and the substrate 11. The substrate 11 is mounted in a concave counter electrode 4 having a 4 inch by 5 inch square cross section defined by sidewalls 8 and top 9. The top 9 is located approximately 4 1/2 inches above the top surface of the substrate 11. The electrode bodies 1 and 4 are
It is installed inside an enclosure 6 sealed to a pedestal 12 by a gasket to form a gas seal. A vacuum pump 20 is connected to the pedestal 12 by a valve and nipple 13 to bring the enclosure 6 to a vacuum. Tanks 17a-17e
The gas G from 1 is directed to the enclosure 6 via the pedestal 12 by the control needle valves 16a-16e, the manifold 15 and the connector 14. Here, the gas G is guided by the insulator tube 5 and the diffuser 7 inside the electrode 4 . Side wall 8
A gap 118 of, for example, 1/4 inch between the electrode 2 and the electrode 2 becomes an outlet of the gas G after passing through the glow discharge plasma P. The meter VG measures the G of the gas in the enclosure 6, but is preferably a commercially available capacitance-manometer type because it uses a corrosive and compressible gas in the range of 0.001-10 torr. The signal from meter VG automatically adjusts valve 16 by a servo mechanism to maintain the desired pressure. The voltage V is applied to conductors 21, 22 connected via insulated electrical bushings 18, 19 embedded in the pedestal 12.
By means of a power supply 24 between the electrodes 2 and 4 . The protective resistor 23 prevents damage due to spark current.
Voltage V and current I are measured as shown. Resistance heater 3
Is connected to a control power supply (not shown) via a conductor 45 and an insulating bushing 45 '.

In operation, the enclosure 6 is pumped down to a pressure below 0.02 torr and the heater 3 moves the substrate 11 to 18
Hold at 0-400 ° C. Then, by opening the valve 16a, the tank is filled with silane (SiH ₄ ).
The valve 16a is adjusted to maintain the desired pressure in the enclosure 6 (eg 0.5 torr). Then tank 1
The mixture of helium containing 1% of phosphine (PH ₃ ) from 7b enters the silane-mixed manifold 15 and raises the pressure PG of the device to about 1-2 torr and through the insulator tube 5 and the diffuser 7. Flowing. The electrodes 2 and 4 are the cathode and the anode, the potential difference V between the electrodes 2 and 4 is adjusted to about 200-500 volts which initiates the glow discharge, and the current I is the glow discharge on the substrate 11. Adjusted to about 5 mA to provide plasma P position. Substrate 11
A uniform, heavily doped N ohmic layer 32 is created on top. (Fig. 2) After maintaining the discharge for about 2 minutes, the valve 16b is closed to stop the flow of PH ₃ and helium, leaving only silane.

Since the uniformity and the impurity concentration of the N-type ohmic layer 32 are not as important as the uniformity and the impurity concentration of the intrinsic semiconductor (I) a-Si: H layer 10, the ohmic layer 32 is heated without glow discharge. It may be deposited by a physical treatment. For example, to deposit a chemical vapor deposition (CVD) device filled with PH ₃ / SiH ₄ in a conventional helium carrier gas to deposit an N-type layer 32 before loading the substrate into the device of FIG. You can use it. However, it is important to keep the CVD temperature low so that the polycrystals are formed on a macro scale and, due to their surface roughness, do not damage the subsequently deposited a-Si: H layer.

Subsequently, the temperature of the substrate 11 is kept at 180 to 410 ° C. by the heater 3 in order to form the I-type a-Si: H layer 10 on the top surface of the N layer. And the pressure PG of only silane is 0.1 to 0.4 torr
Is adjusted to. If helium is used as the carrier gas, the pressure PG will be adjusted to about 2 torr. Voltage V is P
Depending on G, regulated to 500-1500 volts. Further, the current I is adjusted to about 5 mA, discharge is started in the strong electric field region Es of the gap G ′ between the electrodes 2 and 4, and the diffusion plasma P is generated in the weak electric field region Ew close to the substrate 11. Be placed, thereby minimizing the potential for sparking on substrate 11. The discharge is continued for about 40 minutes, producing an a-Si: H layer 10 of about 1 micron. Longer discharge times, higher currents or the use of disilane can increase the thickness of layer 10. When layer 10 is at the desired thickness, voltage V is removed, valve 16a is closed, and residual gas is pumped 20.
Eliminate with.

A P-type layer 30 of hydrogenated amorphous boron (aB: H) is then deposited on the top surface of the I-type a-Si: H layer 10 in order to complete the formation of the M / NIP junction. B ₂ H ₆ ) and helium are introduced into the plasma P. First, the valve 16c is opened, B ₂ H ₆ / He gas is introduced until the pressure PG reaches 1-2 torr, and the temperature of the substrate 11 is maintained at 180-410 ° C as in the formation of the layers 10 and 30. To be done. The voltage V is adjusted to 200-500 volts in order to place the glow discharge plasma P in the weak electric field Ew on the substrate 11. The current is maintained at about 5 mA for 2 minutes so that the thickness of the aB: H layer is 100Å. The temperature of the substrate 11 is maintained at 180 to 410 ° C., which is the same as the temperature at which the a-Si: H layer was deposited. Then, valve 16
c is closed and valve 16d is opened and nitrogen gas is introduced to remove residual diborane from enclosure 6. The current to the heater 3 is cut off, and after cooling for 1 hour, the enclosure 6 is returned to atmospheric pressure, and the substrate 11 is taken out.

To complete the formation of the M / NIP photovoltaic device, a semi-transparent metal layer 34, for example 100 liters of Pb, Cr-Cu or Ni-Cr alloy, is thermally deposited on the a-B: H layer. Metallic fingers 35 are thermally vacuum deposited onto the semi-transparent layer 34 for electrical contact. Ti for use as a photodiode or solar cell
Anti-reflection (AR) coating like O ₂ or SnO ₂ ,
A conductive metal oxide (CMO) such as indium and tin oxide (ITO) or zinc oxide is deposited on the metal layer 34.

After the deposition process described above was performed, the electrical properties of the M / NIP cell were tested with various light sources, and the short circuit current Isc of a typical cell was measured by irradiation of AMI sun rays.
It was / cm ² . The open circuit voltage Voc was 0.45 V using the Cr / Ni alloy semi-transparent electrode 34. This electrode transmitted only about 30% of the incident light photon flux, so if sufficient AM
If I-irradiation was used without loss due to electrode absorption and reflection, the calculated value would be 4 / 0.3, or 13.3 mA / cm ² .

This current value is about the same as the best value reported in the literature if a similar correction was made for the loss of the electrode. Also, the measured Voc is equivalent to the value when the same low work function electrode is used.

A second M / NIP battery was then made in the same process using the apparatus of Figure 1 as described above. However, heater 3
Is a-B: H at a temperature lower than the deposition temperature of the a-Si: H layer 10.
After depositing the Type I a-Si: H layer 10 to deposit layer 30, it was turned off. The temperature of the electrode 11 and consequently the a-Si: H layer 10 decreases from 200-300 ° C to about 100 ° C in about 1 hour. Thereafter, the aB: H layer 30 is deposited on the layer 10 by glow discharge for about 2 minutes under the same conditions as the manufacturing conditions of the first battery described above except that the temperature is low. After removing the diborane gas, the substrate 11 is taken out of the enclosure 6 without further cooling and the photovoltaic properties after adding the semitransparent electrode 34 are tested.

Further, in order to form a photovoltaic solar cell, the semi-transparent metal coating 34 and the contact finger 35 are thermally treated on the aB: H layer 30 by the same vacuum deposition system as the first M / NIP cell. Vapor deposition. A second completed M / NIP cell was then tested under solar radiation both with and without the AR coating 36. Using AMI solar energy flux, A
In the test without R coating 36, Voc was 0.65 V and current was 4 mA / cm ² . Therefore, when the a-B: H layer 34 is deposited at a low temperature, Voc does not decrease the temperature of the substrate 11
An increase of about 0.2 volt compared to the first M / NIP cell with -B: H deposited.

The increase in the open circuit voltage Voc obtained by the present invention cannot be theoretically explained at this point, but since the temperature of the substrate 11 is low,
It seems that the damage due to the impact when the a-B: H layer 30 is deposited on the surface of the mold a-Si: H layer 10 is slight. The aB: H layer 30 appears to be a P-type semiconductor when deposited on a low temperature substrate. A P-N heterojunction is then formed for the undoped I-type a-Si: H layer 10, which is slightly N-type as deposited. I-type a-Si: H layer 10 and a-B: H layer 30
The top surface of the a-Si: H layer 10 is most important because a depletion region is formed from the boundary surface of the a-Si: H layer 10 toward the I-type a-Si: H layer 10.

To investigate the diffusion amount of boron in the first M / NIP battery,
The composition was analyzed by mass spectrometry.

FIG. 4 shows the commonly used second ion mass spectrometric analysis of the boron / silicon ratio at the interface between the a-B: H layer 30 and the a-Si: H layer 10 deposited by glow discharge at 300 ° C. The result of the analysis by the instrument is shown. As is clear from the figure, B
^{The 11} / Si ²⁸ isotope ratio drops sharply at about 100Å, then
It gradually decreases up to 500Å, and finally becomes background noise. However, this diffusion is greater than would be expected from previously published boron diffusion data in the absence of glow discharge. Some implantation of boron-containing ions in the glow discharge will also occur, and SiB ₆ alloys may also form.

However, the a-B: H layer 30 is deposited at low temperature and the a-Si: H
When the diffusion of boron into layer 10 is suppressed, Voc is expected from the results of PN junction pairs formed by conventional semiconductor technology, that is, the diffusion of boron dopant by thermal treatment into crystalline silicon. Is inconsistent with. a-B: H thin film 10 180
When deposited by thermal treatment below glow discharge without glow discharge,
Since the aB: H thin film peels from the surface of single crystal Si, there seems to be no data on the semiconductor properties of ab: H thin films deposited at low temperatures.

In FIG. 3, an a-B: H layer 40 is first deposited on a 0.010 inch stainless steel substrate 11 and then an I-type a-S.
A M / PIN photovoltaic connector device made by depositing an i: H layer 43 and an N-type a-Si: H layer 42 is shown. P-type, I-type and N-type layers under the same process conditions used by the glow discharge deposition system described in connection with FIG. 1 to make M / NIP connections.
0,43,44 can be used to deposit, or the glow discharge deposition system described with respect to Figure 2 can be used with the deposition order reversed.

An electrode 44 may be added to provide electrical contact to the N-type layer 42 to form a photovoltaic device. In the M / NIP battery of FIG. 2, a 100 Å Cr / Cu or Ni-Cr gold semi-transparent layer 44 is thermally deposited on the N-type a-Si: H layer 42. Except that the electrode 44 of the battery shown in FIG. 3 is preferably made of a low work function metal such as Cr, Al or Ti in order to generate a very high Voc with respect to the N-type a-Si: H layer 42. For example, it is deposited similarly to the M / NIP battery shown in FIG. An AR coating 46, preferably of a conductive metal oxide such as tin oxide or zinc oxide, is deposited on the electrode 44 by standard techniques and a Ti-Ag contact finger is added by conventional methods. .

In the test without the AR coating 46, the Isc of the M / PIN cell was 4 mA / cm ² when the aB: H layer 40 was deposited on the stainless steel substrate 11. The light transmission of the 100 Å Cr / Ni semi-transparent top electrode is about 30%, so the internal Isc is about 13,3 mA / cm ² which is almost the same as that of the M / PIN battery shown in FIG. However, the measured Voc was 0.79 volts, and the a-B: H layer 30
Similar to the M / PIN battery in the figure, the value is large even though it was deposited at a low temperature. Solar Energy, Vol. 23, pp. 145-147 (1979), "Amorphous Silicon Single Solar Panel", reported by Hanak that the Voc of the Pt electrode in contact with P-type a-Si: H is 0.75 volts. However,
The Voc of the present invention is equal to or greater than the Voc 0.75 volt reported by Hanak. Pt is expensive and fairly inaccessible, but stainless steel is cheap and plentiful. Although expensive metals are a satisfactory material cost for small electronic devices, they are not suitable for large area solar energy converters as the cost is considerable.

The deposition conditions include raising the temperature of the substrate 11 to facilitate the deposition of the a-B: H layer 40, and then lowering the temperature to produce an I-type a-S.
The i: H layer 43 may be deposited at 180-410 ° C. For example, a
-The B: H layer 40 is deposited by a normal CVD apparatus while maintaining the temperature of the substrate at 300 to 600 ° C in the presence of B ₂ H ₆ / He, and after cooling, transferred to the glow discharge apparatus shown in Fig. 1. Good.

When the aB: H layer 40 is deposited by glow discharge, a thickness of 500 Å or more is not preferable because it adds series resistance and peels off from the stainless steel substrate 11. In production,
Deposition of the P, I and N layers 40, 43, 42 is preferably performed in-line by moving the substrate 11 through a series of deposition chambers with programmed temperature, pressure and gas composition.

In addition, the I-type a-Si: H layer 43 can be made from other silane compounds such as disilane, thermally cracks vapor phase SiH ₄ , and uses an apparatus as shown in FIG. 1 below. hand
It can also be made by other deposition techniques such as diffusing a silicon-containing material through a glow discharge in SiH ₄ or hydrogen. a-Si: For other techniques for forming the H layer 43, but the present inventor has been described in previous US application Nanba857,690, as an example, SiH ₄ or hydrogen - silicon in the presence of argon To form an a-Si: H layer 43.

The unexpectedly high Voc and Isc of the M / PIN battery described above cannot be explained based on the generally accepted theory. I-type a-Si: H layer 43 adjacent to the P-type layer 40
A small number of carriers that occur only in the depletion region (0.3 micron) are collected as useful current Isc. However, in the M / PIN battery of the present invention, the photon flux passing through the semitransparent electrode 44 is absorbed by the intervening N-type layer 42 and the non-depletion region of I-type a-Si: H. Outside the depletion region, the vacancy diffusion is 0.
Since it is well known to those skilled in the art that it is smaller than 1 micron, it is not possible to predict how much these regions contribute to the photocurrent. Unexpectedly, Isc does not decrease in the M / PIN battery of the present invention even if the thickness of the I-type a-Si: H layer 43 is increased to 2 microns. The thickness of the I-type a-Si: H layer is only 3 micron, which is only slightly reduced.

FIG. 5 shows a tandem M / PIN / NIP in which the photovoltaic devices of FIGS. 2 and 3 are connected in parallel with a common semitransparent electrode 53.
The zygote is shown. First of all, the aB: H layer 50 is made of stainless steel using an apparatus as shown in FIG.
It is deposited on a steel substrate 11 to a thickness of 200Å. A 2 micron thick intrinsic a-Si: H layer 51 and a 200Å thick N-type layer 52 are then deposited by glow discharge, resulting in a third
An M / PIN as shown is formed.

A 100Å thick Ni / Cr alloy electrode 53 is vacuum deposited on the N-type layer 52 to complete the first M / PIN stage. Instead of a Ni / Cr alloy, the semi-transparent electrode 53 may be a conductive metal oxide such as tin oxide having a thickness of 0.1 micron or more.

Using the process conditions described with reference to FIG. 2, an N-type layer 54 of about 200Å thickness and then an I-type a-Si: H of 1 micron thickness.
Layer 55 is deposited by glow discharge to form M / NIP. The a-B: H P-type layer 56 is preferably deposited after cooling the substrate 11 to about 100 ° C., as was done with the second M / NIP cell described in FIG. The aB: H layer 50 on the substrate 11 is preferably deposited at a temperature of 180 ° C. or higher, while the top a
The -B: H layer 56 is preferably deposited below 180 ° C to maximize Voc.

Then semi-transparent electrode 57, AR coating 58 and contact finger 59
On the aB: H layer 56 as before. The electrodes 11,57 are shorted to the positive electrode without adjusting the current of each battery in the series connection as required in conventional tandem device technology using a suitable contact pad (not shown),
The alloy electrode 53 can be used as the negative electrode.

Under AMI solar irradiation, the output Isc is at least 20% higher when compared to either cell alone. The photon flux that is not absorbed by the first PIN junction passes through layer 52 and produces output minor power in the depletion region of a-Si: H layer 51 at the interface with a-B: H layer 50. And efficiency will be so low that it is ignored. However, the energy as if the P-type layer was first irradiated is changed to the second M / PI.
N-connectors get. This result on the opaque electrode 11 cannot be explained if the depletion region remains 0.3 micron thick as previously reported.

[Brief description of drawings]

FIG. 1 is the first apparatus for glow discharge deposition and doping of amorphous boron, amorphous silicon and amorphous carbon. FIG. 2 is a sectional view of the M / NIP semiconductor showing the first embodiment of the present invention. Third
The figure is a cross-sectional view of an M / PIN semiconductor showing a second embodiment of the present invention. FIG. 4 is a graph showing a boron / silicon ratio in an amorphous boron / amorphous silicon connection body. FIG. 5 is a sectional view of a tandem semiconductor device showing a third embodiment of the present invention.

Claims (3)

[Claims] 1. A photovoltaic device having a structure in which a semiconductor region is provided between a pair of electrodes, and light is incident on the semiconductor region from a transparent electrode side of the pair of electrodes. An I-type semiconductor layer made of hydrogenated amorphous silicon, an N-type semiconductor layer provided on one surface side of the I-type semiconductor layer, and a layer provided on the other surface side of the I-type semiconductor layer And a layer provided on the other surface side of the I-type semiconductor layer is formed of hydrogenated amorphous boron. 2. The photovoltaic device according to claim 1, wherein one of the pair of electrodes is a conductive substrate, and the N-type semiconductor layer is provided on the surface of the conductive substrate. . 3. One of the pair of electrodes is a conductive substrate, and a layer formed of the hydrogenated amorphous boron is provided on the surface of the conductive substrate. 1. The photovoltaic device according to 1.