JPH0669296A - Testing apparatus - Google Patents

Abstract

PURPOSE:To conduct inspection for a chip or a device by a single testing apparatus. CONSTITUTION:When a chip is inspected, a semiconductor wafer 34 is directly placed on a placing surface 32a of a check top 32 as a placing base, and probe needles of a probing card are brought into pressure contact with electrode pads of the chip on the wafer. When a semiconductor device is inspected, a disklike device holder 36 is mounted, for example, by bolts 37 on the surface 32a of the tap 32, and the device 38 is disposed in a recess formed at a center on the upper surface of the holder 36. A probe 18 is replaced with a device inspecting probing card 40, and replaced with a performance board 42 corresponding to the card 40 on the side of a test head 10.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a test apparatus for inspecting electrical characteristics of chips and packaged electronic components on a semiconductor wafer.

[0002]

2. Description of the Related Art In the process of manufacturing a semiconductor integrated circuit, a large number of chips (semiconductor elements) formed on a semiconductor wafer are inspected for electrical characteristics, and good chips and defective chips are selected. A chip testing apparatus for performing such an inspection generally includes a chuck top on which a wafer is mounted, and a wafer prober for bringing probe pins into contact with electrode pads of each chip on the wafer mounted on the chuck top. , And a tester for electrically inspecting the characteristics of each chip via probe pins.

FIG. 8 shows the appearance of a typical chip test apparatus. The tester 100 generates a signal for characteristic inspection.
Stationary tester main body 102 for processing and prober 1
And a movable test head 108 for interfacing with the H.06. Tester body 102 and test head 1
06 is connected via a flat cable 110. In the prober 106, a circular opening 114 is provided on the upper surface of the housing 112, and a ring-shaped support plate 116 fixed to the peripheral portion of the opening 114 is provided with a large number of array patterns in accordance with the electrode pattern of the chip. A probe card (not shown) provided with probe pins is detachably attached. A chuck top (not shown) for mounting a wafer is provided below (inside) the opening 114. A wafer loader (not shown) for setting a wafer on the chuck top, a wafer position detector (not shown) for detecting the position of the wafer on the chuck top, and the like are also installed near the prober 106.

By the way, in the manufacturing process of a semiconductor integrated circuit, the electrical characteristics of a finished product, that is, a semiconductor device, in which a good chip as described above is enclosed in a package, is also inspected. The device test apparatus for performing such an inspection is generally a test apparatus different from the chip test apparatus,
It is called an IC handler or simply a handler.

[0005]

If the chip testing device and the device testing device as described above are respectively introduced in a semiconductor manufacturing factory, a considerable equipment cost is required. As the integration degree and operation speed of semiconductor integrated circuits have improved, the performance speed of test equipment has also improved, and the equipment price has become extremely high.

Therefore, in order to reduce the inspection cost,
A chip test apparatus is commonly used also as a device test apparatus. In this case, it is possible to deal with this by adding software for device testing in the tester. The question is how to make the electrical contact between the tester and the device.

Conventionally, in FIG. 8, a test head 10 is used.
8 with its connecting surface, that is, the inner surface 108 in contact with the prober 106, facing upwards, and the connecting surface 108
I put a socket in and plugged the device's terminal pin into the socket. This work was performed manually by the inspector. However, it is extremely difficult and troublesome to correctly insert a semiconductor device having a large number of hundreds to thousands of terminal pins into a socket, which is a heavy burden on the inspector.

Further, in a chip test apparatus for performing a high speed test at a test rate of 200 MHz or more, it is not possible to separate the test head 108 from the tester main body 102 and connect it with a long cable 110 as shown in FIG. As described above, there is no choice but to adopt a configuration in which the test head 120 is integrated with the tester main body 122 and directly connected. In such a test apparatus, the connection surface of the test head 120 is always facing downward and cannot be laid on its back. Therefore, it is virtually impossible to mount the semiconductor device.

The present invention has been made in view of the above problems, and an object of the present invention is to provide a test apparatus capable of automatically performing both chip inspection and device inspection by one unit.

[0010]

In order to achieve the above-mentioned object, the test apparatus of the present invention is such that the object to be inspected is placed on a mounting table and the contactor means electrically connected to a tester is used to inspect the object. In a test device in which the electrical characteristics of the object to be inspected are inspected by the tester through the contact means, the chip on the semiconductor wafer as the first object to be inspected is inspected. A mounting surface for directly mounting the semiconductor wafer on the mounting table is formed on the mounting table, and the electronic component is held when the packaged electronic component as the second inspection object is tested. A holding member for detachably mounting the holding member on the mounting table, and selectively connecting the first contact means corresponding to the chip on the semiconductor wafer or the second contact means corresponding to the electronic component. Contact the tester It was configured to.

[0011]

In the testing apparatus of the present invention, when the chips on the semiconductor wafer are inspected, the mounting surface of the mounting table is used as it is as the mounting surface of the object to be inspected, and the semiconductor wafer is mounted on this surface. On the other hand, contact means having a large number of contacts arranged in a pattern corresponding to the electrode pad arrangement pattern of the chip is connected to the tester. Then, the contact means and the mounting table approach each other, and each contact comes into contact with each electrode pad of the chip to be inspected, thereby forming an electrical connection between the chip to be inspected and the tester through the contact means. To be done.

When the packaged electric component is inspected, a holding member is mounted on the mounting surface of the mounting table, and an electric component to be inspected is placed at a predetermined position or a predetermined position of the holding member. Will be placed. On the other hand, contactor means having a large number of contacts corresponding to the shape and arrangement pattern of the terminal pins of this electric component is connected to the tester. Then, the contact means and the holding member come close to each other and each contact piece comes into contact with the terminal pin of the electric component, whereby an electrical connection between the electric component and the tester is formed through the contact element means. It

As described above, in the test apparatus of the present invention, the chip inspection and the device inspection are automatically performed by using the mounting table only by attaching, detaching or replacing the holding member and the contact means.

[0014]

Embodiments of the present invention will be described below with reference to FIGS. 1 to 4 are views for explaining a test apparatus according to an embodiment of the present invention, FIG. 1 is a sectional view showing a configuration of the test apparatus when inspecting a semiconductor device, and FIG. 2 is a semiconductor wafer. FIG. 3 is a cross-sectional view showing a configuration of a test apparatus when inspecting the upper chip, FIG. 3 is a perspective view showing configurations of a chuck top and a device holding member, and FIG. 4 is a block diagram showing a system configuration of the test apparatus.

First, as shown in FIG.
Basically, it has the same structure as the conventional wafer test apparatus. The test head 10 is electrically connected to a tester body (not shown). A performance board 14 is detachably attached to the connection surface 10a of the test head 10 via a plurality of columns 12. A brim-shaped screw 14 is screwed to the lower end of each column 12, and the performance board 14 is detachably carried by the screw 14. The performance board 14 has a large number of pogo pins (spring probes) for forming an electrical connection with the prober 18.
20 are provided at predetermined positions in a predetermined pattern. The terminal of each poco pin 20 is connected to the input / output terminal of the test head 10 via a cable 22.

A plurality of openings 14a for alignment are formed in the peripheral portion of the performance board 14, and the alignment pins 24a of the ring insert 24 are fitted into these openings 14a, respectively, so that the test head 10
And the prober 18 are coupled to each other, and each pogo pin 20 of the performance board 14 is brought into pressure contact with each pump 26a on the back surface (upper surface) of the probing card 26.

The prober 18 includes a ring-shaped support plate 28, a ring-shaped ring insert 24 locked to the inner peripheral edge of the support plate 28, and a wafer removably attached to the ring insert 24 by, for example, bolts 30. It comprises a probing card 26 for inspection or a probing card 40 for device inspection as shown in FIG.

Probing card 26 for chip inspection
Has a plurality of probe needles 26c mounted downward in a predetermined pattern around a window 26b provided at the center of the front surface (lower surface) thereof, and the probe needles 26c on the card front side and the card back surface through the through holes 26d. Each bump 26 on the side
and a are electrically connected in a one-to-one relationship.

At the time of chip inspection, as shown in FIG. 2, the semiconductor wafer 34 directly mounted on the mounting surface 32a of the chuck top 32 as a mounting table is brought close to the prober 18, and the wafer 34 to be inspected is inspected. Each probe needle 26c of the probing card 26 is brought into pressure contact with each electrode pad of the chip. As a result, electrical connection between the chip under test and the test head 10 is established via the probing card 26 and the performance board 14, and the test head 10
It is possible to inspect the electrical characteristics of the chip to be inspected.

Now, when inspecting, for example, a semiconductor device as a packaged electric component, the present test apparatus is changed to the configuration as shown in FIG.

That is, in the chuck top 32, a disk-shaped device holder 36 is mounted on the mounting surface 32a.
Are attached by, for example, bolts 37. The device holder 36 is made of an insulating material such as plastic or ceramic, and has a concave portion 34a for accommodating and holding a semiconductor device 38 as an object to be inspected at the center of the upper surface thereof. Since the semiconductor device 38 of this example is the QFP type in which the terminal pins 38a project from the package in all directions, the package position is regulated on the bottom surface of the recess 36a, and the horizontal base end portion of each terminal pin 38a is provided. A protrusion 36b for supporting from below is provided. Further, the mounting bolt 37 is attached to the peripheral portion of the device holder 36.
The chuck top 32 is provided with a hole 37c for passing through.
A screw hole 3 for screwing the mounting bolt 37 on the peripheral edge of the
2b is provided.

The prober 18 is replaced with a probing card 40 for device inspection. The probing card 40 is formed by penetrating a plurality of pogo pins 40a in a pattern corresponding to the pattern of the terminal pins of the device 38, and the terminals of each pogo pin 40a are connected to the bumps 40b on the back surface of the card.

On the side of the test head 10, the performance board 42 corresponding to the probing card 40 for device inspection is replaced. Similar to the performance board 14 for wafer inspection, this performance board 42 is provided with pogo pins 44 and alignment holes 42a, and the terminals of each pogo pin 44 are connected to the terminals of the test head 10 via cables 46. However,
The pogo pins 44 are arranged in a pattern corresponding to the bumps 40b of the probing card 40. For the cable 46, it is desirable to use a coaxial cable or a twisted pair wiring as a measure against high frequency or as a countermeasure against noise.

At the time of device inspection, as shown in FIG.
The semiconductor device 38 housed and held in the recess 36a of the device holder 36 is brought close to the prober 18, and each terminal pin of the device 38 is brought into pressure contact with each pogo pin 40a of the probing card 40. As a result, the electrical connection between the semiconductor device 38 and the test head 10 is established via the probing card 40 and the performance board 42, and the test head 10 can inspect the electrical characteristics of the device 38.

FIG. 3 clearly shows the mutual relationship between the chuck top 32 and the device holder 36 and their respective functions. When the chip inspection is performed, the chuck top 32
The mounting surface 32a of is used as it is as a mounting surface of the object to be inspected, and the semiconductor wafer 34 is mounted on the central portion of this surface. When the inspection is performed, the device holder 36 is mounted on the mounting surface 32a of the chuck top 32 by the bolt 37, and the semiconductor device 38 is arranged in the concave portion 36a provided in the central portion of the upper surface of the device holder 36. To be done.

As described above, in the test apparatus of this embodiment, when the chips on the semiconductor wafer are inspected, the mounting surface 32a of the chuck top 32 is used as it is to mount the semiconductor wafer 34 as the inspection object. When the semiconductor device is inspected, the prober 18 has a probing card 26 for wafer inspection attached thereto, and the test head 10 has a performance board 14 corresponding to the probing card 26 attached thereto. A device holder 3 for holding a semiconductor device 38 as a device under test on the mounting surface 32a of the chuck top 32.
6, a probing card 40 for device inspection is attached to the prober 18, and a performance board 42 corresponding to the probing card 40 is attached to the test head 10.

The test head 10 in the test apparatus of this embodiment may be either a movable type as shown in FIG. 8 or a fixed type as shown in FIG. When the test head 10 is a movable type, the prober 18 is a fixed type, and when the test head 10 is a fixed type, the prober 18 is a movable type. In this way, the test head 10 and the prober 18
At least one of them is configured to be movable so that they can be connected and separated from each other. In the test head 10, the performance boards 14 and 42 can be easily replaced by removing the screws 16 from the support columns 12. In the prober 18, the ring insert 24 is removed from the support plate 28 and the ring insert 24 is removed.
Remove the bolt 30 from the probing card 26,
40 can be easily replaced. Such replacement of the performance board and probing card will be performed manually. However,
Instead of the manual operation type, it is possible to provide a conventional automatic exchange mechanism using a robot.

In the test apparatus of this embodiment, the semiconductor wafer 34 is placed and positioned on the placement surface 32a of the chuck top 32, and the semiconductor device 38 is loaded in the recess 34a of the device holder 34. The positioning operation is performed by the inspection subject automatic loading mechanism and the chuck top drive mechanism.

With reference to FIG. 4, the structure and operation of the automatic loading mechanism for the object to be inspected and the chuck top drive mechanism in this embodiment will be schematically described. The chuck top 32 is supported by the stage 52 via an elevating mechanism 50. The stage 52 has an X-direction drive mechanism 52a for moving the chuck top 32 in the X direction and a Y-direction for the chuck top 32.
A Y-direction drive mechanism 52b for moving the chuck top 32 and a θ-direction drive mechanism 52c for rotating the chuck top 32 are provided.

The stage 52 can move to three stations of the inspection section CE, the position detection section PB and the loading section LD by self-propelled on the X rail 53 by the X-direction drive mechanism 52a.

First, in the loading section LD, the object to be inspected is loaded on the chuck top 32. When the object to be inspected is a chip on the semiconductor wafer 34, the wafer loader 54 mounts the semiconductor wafer 34 on the mounting surface 32 a of the chuck top 32. When the device under test is the semiconductor device 38, the device loader 56 sets the device 38 in the recess 36 a of the device holder 36 mounted on the chuck top 32. The semiconductor wafer 34 and the semiconductor device 38 as these inspected objects are supplied from a wafer supply unit 58 and a device supply unit 60, which are trays or stacks, respectively.

The object to be inspected (34, 38) as described above
Directly on the chuck top 32 or the device holder 3
Once loaded via 6, the stage 52 then moves to the position detector PB. In this position detector PB,
A camera 62 is arranged above the stage 52, and a predetermined mark (a predetermined pad, a predetermined terminal pin, or the like) of the inspection object (34, 38) is imaged by the camera 62. The inspected image signal output from the camera 62 is CP
It is taken in by U64, and the arrangement position of the inspected object (34, 38) is determined by the image processing in the CPU 64,
An error with respect to the reference position in each of the X, Y, Z, and θ directions, that is, a position shift amount is also calculated. A program for performing this image processing is stored in the ROM 66. Further, the RAM 68 stores the image signal taken in by the CPU 64, and also stores the arithmetic processing data of the CPU 64, the reference position data, and the like.

The CPU 64 performs control for correcting the position of the object (34, 38) to be inspected based on the calculated amount of positional deviation. For this control, the elevating mechanism 50 and the X-direction driving mechanism 5 for the stage 52 are connected via a predetermined interface.
2a, Y-direction drive mechanism 52b and θ-direction drive mechanism 52
A position correction signal for each direction is given to c. By such position correction, the stage 52 in the inspection unit CE is
Or the object to be inspected (34, 38) on the chuck top 32
Are precisely aligned with the prober 18. As a result, as shown in FIG. 1 and FIG.
38) Each terminal (pad, terminal pin) correctly contacts the corresponding contact (probe pin 26c, pogo pin 40a).

The tester main body 69 incorporates chip inspection software and device inspection software, and the inspection software can be switched according to the inspection object (34, 38). Also,
In the vicinity of the inspection section CE, the inspected object (34, 3
An unloading unit or the like (not shown) for taking out 8) from the chuck top 32 or the device holder 36 is also provided.

As described above, in the test apparatus of this embodiment,
For chip inspection or device inspection, the device holder 36 is attached or detached, and the probing card (26, 40) and the performance board (14, 4) are attached.
2) is replaced, and the chuck top 32, the stage 52, the test head 10, and the support portion (2) of the prober 18 are replaced.
4, 28) etc. are commonly used for both examinations. As a result, the device inspection is also performed automatically like the chip inspection, and it is not necessary for the inspector to manually insert the device into the socket as in the conventional case.

The preferred embodiment of the present invention has been described above, but the present invention is not limited to this embodiment, and various modifications and changes can be made within the scope of the technical idea thereof. For example, in the above-described embodiment, the pogo pin 40a is used as the contact for inspecting the semiconductor device 38, but it is also possible to use the probe pin 70 as shown in FIG. Further, as shown in FIG. 5, by providing a convex surface portion 36d on the upper surface of the device holder 36, a concave portion 36a for accommodating and holding the device 38 can be formed inside thereof. Also, the device 38
When the protrusion 36b for restricting the position of the
It is also possible to omit 6a or the convex portion 36d.
Further, as shown in FIG. 6, the device holder 36 may be configured to hold a plurality of devices 38.

Further, in the above-mentioned embodiment, as the packaged electric component, a QFP type semiconductor device in which the terminal pins are projected from all sides of the package is taken as an example.
Various semiconductor devices and other electric components can be dealt with by modifying the device holder, the probing card, and the like. For example, for a semiconductor device in which a large number of terminal pins project in a matrix from the bottom surface of the package, the configuration shown in FIG. 7 can be used. In FIG. 7, the bottom surface of the concave portion 36a of the device holder 36 is formed flat, and the semiconductor device 72 is placed in the upside thereof, that is, the terminal pins of the matrix arrangement are arranged upward. The probing card 74 for such a semiconductor device 72 is of a socket type, and is provided with a female pin 76 as a contactor, and also has an elastic member 78 for separating each female pin 76 and each terminal pin 72a after the inspection is completed. It is provided.

[0038]

As described above, according to the test apparatus of the present invention, when the chips on the semiconductor wafer are inspected, the semiconductor wafer is mounted on the mounting surface of the mounting table for chip inspection. When the electrical connection between the chip and the tester is formed through the contactor means and the packaged electric component is inspected, the holding member is detachably attached on the mounting table and the electric component is attached to the holding member. Since the electrical connection between the electric component and the tester is formed by arranging them and the contactor means for inspecting the electric component, both the chip inspection and the device inspection are automatically performed by using the mounting table with one device. It is possible to reduce the inspection cost, save the installation space of the test equipment, and the like, while eliminating the need for the manual operation of the inspector.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a configuration of a test apparatus according to an embodiment of the present invention when inspecting a semiconductor device.

FIG. 2 is a cross-sectional view showing a configuration of a test apparatus in an example when inspecting chips on a semiconductor wafer.

FIG. 3 is a perspective view showing a configuration of a chuck top and a device holding member in an example.

FIG. 4 is a block diagram showing a system configuration of a test apparatus in an example.

FIG. 5 is a schematic cross-sectional view showing a modified example of the device holding member and the probing card in the example.

FIG. 6 is a perspective view showing the structure of another modification of the device holding member according to the embodiment.

FIG. 7 is a schematic cross-sectional view showing another modified example of the device holding member and the probing card in the example.

FIG. 8 is a schematic perspective view showing a typical external configuration of a wafer test apparatus.

FIG. 9 is a schematic perspective view showing an external configuration of a high-speed wafer test apparatus.

[Explanation of symbols]

 10 Test Head 14 Performance Board 18 Prober 26 Probing Card 32 Chuck Top 34 Semiconductor Wafer 36 Device Holder 38 Semiconductor Device 40 Probing Card 42 Performance Board 72 Semiconductor Device 74 Probing Card

Claims (1)

[Claims] 1. An object to be inspected is placed on a mounting table, contact means electrically connected to a tester is brought into contact with a terminal of the object to be inspected, and the tester causes the object to be in contact via the contact means. In a test apparatus configured to inspect electrical characteristics of an inspection object, a mounting surface for mounting the semiconductor wafer when inspecting a chip on a semiconductor wafer as a first inspection object is the mounting table. And a holding member for holding the electronic component when testing the packaged electronic component as the second object to be inspected so as to be detachably attached to the mounting table. A test apparatus configured to selectively connect a first contactor unit corresponding to the upper chip or a second contactor unit corresponding to the electronic component to the tester.