JPH05316514A - Receiver for satellite broadcast - Google Patents

Abstract

PURPOSE:To eliminate the need for beat disturbance caused by the invasion of the signal of a strong electric field when the signal of a strong electric field is applied to a 2nd input terminal in the case a signal from a 1st input terminal is outputted from an output terminal via a reception circuit. CONSTITUTION:A voltage is supplied usually to the output side of 1st and 2nd switching transistors(TRs) 4, 7 from a power supply terminal 14 via resistors 15, 16 and a voltage is selectively applied to the input side of 1st and 2nd switching TRs from 1st and 2nd switching power supply terminals 17, 18 and a voltage is always applied to the output of the switching TR not selected from the power supply terminal 14 and not fed to the input side. Thus, since a reverse bias is applied between the collector and the base of the switching TR, the interruption characteristic at the time of turning the switching TR off is remarkably improved. Thus, the invasion and radiation of the signal at the non-selective side is very less and the beat disturbance is remarkably improved.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a satellite broadcast receiver having a plurality of input terminals.

[0002]

2. Description of the Related Art A conventional satellite broadcast receiver of this type is shown in FIG.
It had the structure shown in. That is, the first and second input terminals 1 and 2 to which the antennas are respectively connected are provided. The diode switches 3 and 5 and the first switching transistor 4 are connected to the first input terminal 1, and the diode switches 6 and 8 and the second switching transistor 7 are connected to the second input terminal 2. Further, the output terminal 10 was connected via the receiving circuit 9.

A voltage is constantly applied to the receiving circuit 9 from the power supply terminal 11, and the switching power supply terminals 12 and 7 are selectively supplied to the first and second switching transistors 4 and 7.
From 13, resistors for bias voltage supply 19, 20, 21,
A voltage is selectively applied via 22, 23, 24, 25 and 26 to switch between the first and second input terminals 1 and 2. At this time, the first and second diode switches 3, 5, 6, 8 are also selectively opened and closed.

[0004]

However, in the above configuration, when the signal from the first input terminal 1 is output from the output terminal 10 via the receiving circuit 9 as shown in FIG. 2, for example,
When a strong electric field signal is applied to the second input terminal 2, the strong electric field signal is not sufficiently blocked in the circuit and penetrates into the receiving circuit, which results in beat interference on the screen of the TV, for example. Was becoming.

Therefore, the present invention aims to prevent such beat interference.

[0006]

In order to achieve this object, the present invention provides a power supply terminal for constantly applying a voltage from the power supply terminal to the output side of the first and second switching transistors. The switching power supply is selectively applied to the input sides of the first and second switching transistors from the first and second switching power supply terminals.

[0007]

With this configuration, in the switching transistor on the non-selection side, the voltage is always applied to the output side from the power supply terminal and the voltage is not applied to the input side, whereby the collector of the switching transistor, By applying a reverse bias between the bases, the cutoff characteristics when the switching transistor is turned off are greatly improved, and as a result, the signal intrusion from the non-selected side input terminal to the receiving circuit is extremely small, and the beat interference is greatly reduced. It can be improved.

[0008]

FIG. 1 shows an embodiment of the present invention. In this embodiment, parts different from the conventional example shown in FIG. 2 will be described.

In FIG. 1, 14 is a power supply terminal, and this power supply terminal 14 constantly supplies power to the receiving circuit 9. In addition, resistors 15 and 16 for supplying a bias voltage are supplied from the power supply terminal 14.
The voltage is constantly applied to the collectors of the first and second switching transistors 4 and 7 via the. First and second switching transistors 4, 7
Is switched from the first and second switching power supply terminals 17, 18 to the resistors 30, 31, 27, 2 on the respective bases.
By selectively supplying power via 8, one of the supplied switching transistors 4 and 7 is turned on and the other is turned off. At this time, the first diode switches 3 and 5 and the second diode switches 6 and 8 are also opened and closed in conjunction with the ON and OFF operations of the first and second switching transistors 4 and 7. In the case of the above configuration, in the switching transistor 4 or 7 which is turned off, the difference between the base voltage of the switching transistor 4 or 7 and the collector voltage becomes extremely large, and as a result, the switching transistor is turned off. The cut-off characteristic when the signal is turned off is improved, and the intrusion of a signal from the non-selected side into the receiving circuit 9 is reduced.

[0010]

As described above, according to the present invention, a voltage is constantly applied from the power supply terminal to the output side of the first and second switching transistors, and at the input side of the first and second switching transistors. The voltage is selectively applied from the first and second switching power supply terminals.

Therefore, a voltage is always applied from the power supply terminal to the output side of the non-selected side switching transistor,
In addition, no voltage is applied to the input side, which applies a reverse bias between the collector and the base of the switching transistor, improving the cut-off characteristics when the switching transistor is OFF. As a result, Signal from the receiver to the receiving circuit is extremely small,
Beat jamming can be greatly improved.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a satellite broadcast receiver according to an embodiment of the present invention.

FIG. 2 is a circuit diagram of a conventional example.

[Explanation of symbols]

 1 1st input terminal 2 2nd input terminal 3 diode switch 4 1st switching transistor 5 diode switch 6 diode switch 7 2nd switching transistor 8 diode switch 9 receiving circuit 10 output terminal 11 power supply terminal 12 1st Power supply terminal for switching 13 second power supply terminal for switching 14 power supply terminal 15 resistance 16 resistance 17 first power supply terminal for switching 18 second power supply terminal for switching 19 resistance 20 resistance 21 resistance 22 resistance 23 resistance 24 resistance 25 resistance 26 resistance 27 resistance 28 resistance 29 resistance 30 resistance 31 resistance 32 resistance

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Internal reference number FI Technical display location H04H 1/00 H 7240-5K H04N 5/21 B 5/44 A

Claims (1)

[Claims] 1. A first antenna and a second antenna to which antennas are connected, respectively.
Input terminal, a first switching transistor connected to the first input terminal, a second switching transistor connected to the second input terminal, and the first and second switching transistors. A receiving circuit connected to the output side of the transistor and an output terminal connected to the receiving circuit are provided, and a power supply terminal that constantly applies a voltage to the output side of the first and second switching transistors is provided. A satellite broadcast receiver configured to selectively apply a switching power supply from the first and second switching power supply terminals to the input side of the first and second switching transistors.