JPH05307369A - Driving method for liquid crystal panel - Google Patents

Abstract

PURPOSE:To generate an optimum alternating signal independently of duty of an input signal. CONSTITUTION:This is a driving method for liquid crystal panel in which a liquid crystal panel of dot matrix type of scanning electrodes numbers of n lines (n=1, 2, 3...) is driven with time-sharing with duty ratio 1/m (m>n) by a segment driving circuit and a scanning driving circuit, clock frequency of the scanning driving circuit are divided by frequency dividing counters 5, 7 and a composite signal of these signals become an alternating signal M, wherein, a count pause period of L times (L=1, 2,...m-n) of a clock period is provided in the frequency dividing counter 5, 7 in common or independently every one field.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for driving a large-sized liquid crystal panel of the dot matrix type by time division driving.

[0002]

2. Description of the Related Art In recent years, large-sized liquid crystal panels have been put to practical use due to rapid progress in liquid crystal materials and liquid crystal panel manufacturing methods. A method for driving a panel has been strongly demanded.

A conventional liquid crystal panel driving method (hereinafter abbreviated as a liquid crystal driving method) will be described below. FIG. 7 is a block diagram illustrating a driving method of a conventional liquid crystal panel. In FIG. 7, 1 is a dot matrix type liquid crystal panel, 2 is a segment drive circuit, 3 is a scan drive circuit, and 4 is a control circuit which supplies data and control signals to the segment drive circuit 2 and the scan drive circuit 3. Figure 7
As shown in, the control circuit 4 causes the segment drive circuit 2 to send the data D, the data shift clock signal CLK,
The data latch signal LHS and the alternating signal M are supplied,
The liquid crystal panel 1 is driven by supplying the scan data signal LVS, the scan clock signal LHS, and the alternating signal M to the scan drive circuit 3.

FIG. 8 is a block diagram of an AC signal generating circuit in the control circuit 4 shown in FIG. In FIG. 8, 5 is a k-ary counter (k = 1, 2, ...) Using the data latch signal LHS as a clock signal. Reference numeral 6 is a flip-flop for dividing the output of the k-ary counter 5, and the output thereof becomes the alternating signal M.

Generally, when driving a large dot matrix type liquid crystal panel, the voltage waveform applied to the liquid crystal pixels is distorted due to the wiring resistance of the liquid crystal panel and the capacity of the liquid crystal. Therefore, when the frequency component of the voltage applied to each liquid crystal pixel is different due to the difference in the display pattern for each column, a difference occurs in the effective voltage and crosstalk occurs. In order to reduce this crosstalk, the AC signal is inverted in a short period of the data latch signal LHS, and the effective voltage is averaged by bringing the frequency components of the voltage applied to each liquid crystal pixel close regardless of the display pattern. (Japanese Patent Laid-Open No. Sho 60
(See Japanese Patent Application Laid-Open No. 19195/1990, Japanese Patent Laid-Open No. 60-19196). However, another factor must be taken into consideration in determining the inversion period of this alternating signal. That is,
Generally, when the alternating signal M is switched, the waveforms of the signals output from the scan drive circuit 3 and the segment drive circuit 2 are significantly distorted as compared with the case where the alternating signal M is not switched.
Therefore, when the alternating signal M is always switched in a fixed row of the liquid crystal panel 1, the voltage waveform of that row is always distorted. As a result, the effective voltage applied to the liquid crystal pixels in that row becomes low, which causes another type of display unevenness in which the brightness of that row decreases.

Further, even if the cycle of the AC signal M is set so that the AC signal M does not switch to the same row, the AC signal M switches to the qth row and the second row in the first field. If there are regular changes such as the q + 1th line in the field, the q + 2th line in the third field, and so on, the regularity will be observed as flicker. Therefore, the switching line of the alternating signal M is not fixed, and the switching cycle must be set so that the switching line of the alternating signal M varies so that it cannot be recognized by human eyes.

FIG. 9 shows an example of a display state of a liquid crystal panel in a conventional driving method. In a liquid crystal panel having 640 columns and 400 rows, only odd-numbered rows and 3 columns are turned on, and other pixels are turned off. is there.

FIG. 10 shows the counter 5 shown in FIG. 8 as a ternary counter in the display state shown in FIG.
The voltage waveform of each part of the liquid crystal panel when the liquid crystal panel 1 is driven with 9 duty is shown. (S2-C2) is the voltage waveform applied to the liquid crystal pixel in 2 rows and 2 columns, and (S3-C2) is 2
The voltage waveform applied to the liquid crystal pixel of a 3rd row is shown. In this way, the effective voltages of both are averaged.

FIG. 11 shows, for each field, the distribution of the alternating rows of the alternating signal M when the above display is performed. The horizontal axis represents the row number and the vertical axis represents the field number. In the figure, in each field, ● indicates a row in which the alternating signal M is switched, and ○ indicates a row in which the alternating signal M is not switched. In this way, the switching rows of the alternating signal M are sufficiently dispersed.

[0010]

However, in the above-mentioned conventional liquid crystal driving method using the alternating current signal generating circuit, the variation of the alternating current signal changes when the duty of the drive signal changes even if the number of scan electrodes is the same. Had a problem.

That is, FIG. 12 shows, for each field, the distribution of the alternating lines of the alternating signal when the liquid crystal panel shown in FIG. 9 is driven at 1/450 duty. Since the lines are fixed, a remarkable horizontal stripe-like uneven brightness appears. For this reason, among the switching cycles of the alternating signal in which the display unevenness does not appear due to the switching of the alternating signal, when the short cycle is examined, the alternating signal is inverted every 13 times of the data latch signal LHS.

FIG. 13 shows, for each field, the distribution of the alternating rows of the alternating signal in this case. In this way, the lines in which the alternating signals change are sufficiently dispersed.

FIG. 14 is a voltage waveform diagram applied to each part of the liquid crystal panel in the above case. (S2-C2) shows the voltage waveform applied to the liquid crystal pixel of 2 rows and 2 columns, and (S3-C2)
Shows a voltage waveform applied to the liquid crystal pixels of 2 rows and 3 columns. In this way, there is a large difference between the effective voltages of both, and this appears as crosstalk.

After all, when a panel having 400 scanning electrodes is driven at a duty of 1/450, horizontal streak-like luminance unevenness and flicker occur with an AC signal having a short cycle without crosstalk. On the other hand, since crosstalk occurs in an alternating signal with a period in which horizontal stripe-like luminance unevenness and flicker do not occur,
The display quality is significantly inferior to the case of driving at a duty of 1/449.

That is, the conventional liquid crystal driving method using the alternating signal generating circuit has a problem that a large difference in display quality occurs depending on the duty even when driving a liquid crystal panel having the same number of scanning electrodes.

The present invention is intended to solve the above-mentioned conventional problems. A liquid crystal panel capable of driving the liquid crystal panel by an optimum alternating signal regardless of the duty of the input signal and always displaying an optimum image quality. The purpose is to provide a driving method.

[0017]

In order to achieve this object, a liquid crystal panel driving method according to the present invention is an integer of the cycle of a data latch signal LHS for each field, commonly or independently to a counter that generates an alternating signal. It has a configuration in which a double counting pause period is provided.

[0018]

With this configuration, the AC signal can be set independently of the duty of the input signal, and the optimum AC signal can be used regardless of the duty of the input signal.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A liquid crystal panel driving method according to a first embodiment of the present invention will be described below with reference to the drawings.
FIG. 1 is a block diagram of an AC signal generation circuit of a liquid crystal panel driving method according to a first embodiment of the present invention. In FIG. 1, the same parts as those of the conventional alternating signal generating circuit shown in FIG. Reference numeral 7 is a p-adic counter (p = 1, 2, ...) And p = 4 in this embodiment.
48 is a flip-flop, and this output is an enable signal for the k-ary counter 5.

The operation of the alternating-current signal generating circuit configured as described above will be described below. Regarding the driving method, the liquid crystal panel is driven with a 1/450 duty in the display state shown in FIG. 9, and the k-ary counter 5 is a ternary counter (k = 3). In the conventional circuit, the switching line of the AC signal M is fixed, and a remarkable horizontal stripe-like luminance unevenness appears.

FIG. 2 is a timing chart of signals in the AC signal generating circuit of this embodiment. The 448-ary counter 7 is cleared by the inverted signal of the scan data signal LVS, and then counts the data latch signal LHS 448 times, and then outputs the ripple carry A. Since the flip-flop 8 connects the ripple carry A of the 448-ary counter 7 to the clock input and the inversion signal of the scan data signal LVS to the clear input, the inverted output B thereof rises from the rise of the ripple carry A to the rise of the scan data signal LVS. Are low level signals. During this period *
The data latch signal LHS indicated by a mark includes one pulse. By connecting the inverted signal B to the enable input of the ternary counter 5, the ternary counter 5 pauses by 1 LHS per field (450 LHS) and 449 L.
Only HS will be counted. This rest period is in a region without data, and the alternating signal M output from the flip-flop 6 is 1/449 in a region with data.
The signal is exactly the same as when driven with duty.

FIG. 3 is a diagram showing switching points of the AC signal M output from the AC signal generating circuit of FIG. This is exactly the same as the conventional example at the 1/449 duty shown in FIG. Therefore, even if the duty is 1/450, the display quality is not different from the case of the conventional 1/449 duty. In the circuit configuration of FIG. 1, if the duty of the input display signal is a signal of 1/449 or less, the same AC signal can be obtained in all areas where data is present. It is especially effective for display devices.

When the counter 5 for generating the basic AC signal shown in the conventional example of FIG. 8 is a ternary counter, the duty is 1/446, 1/443, ..., 1
Even if / 401 and the denominator change by 3, the same AC signal is generated in the data existing area. Therefore, also in this embodiment shown in FIG. 1, when displaying on the display having 400 scanning electrodes shown in FIG. 9, the p-adic counter 7 is set to 400.
It is advantageous to use a decimal counter and count 401 times per field because it can handle signals with a wide range of duty.

Further, in the present embodiment, the AC signal in the area having no data is fixed for a long time during the rest period. This is averaged over several fields, but it can be further improved by using a method of fixing the liquid crystal applied voltage in the area having no data to the common potential regardless of the alternating signal on both the segment side and the scanning side.

FIG. 4 is a block diagram of an AC signal generating circuit of a method of driving a liquid crystal panel according to the second embodiment of the present invention, and FIG. 5 shows its timing chart. Figure 4
Since the circuit of this embodiment shown in FIG. 9 has basically the same configuration as the conventional circuit shown in FIG. 8, the same portions are denoted by the same reference numerals and the description thereof will be omitted. 4, an inverter 9 inverts the scan data signal LVS, and the inverted scan data signal LVS is connected to the enable input of the k-ary counter 5.

The operation of the alternating signal generating circuit thus constructed will be described below. As with the first embodiment, the driving method is the same as in the display state shown in FIG.
It is assumed that the liquid crystal panel is driven at / 450 duty,
The k-ary counter 5 is a ternary counter (k = 3).
In the conventional circuit, the switching line of the AC signal M is fixed, and a remarkable horizontal stripe-like luminance unevenness appears.

While the inverted scan data signal LVS is low, the data latch signal LHS indicated by * in FIG.
Since one data latch signal LHS is included in one field, counting is stopped for one field. Therefore, the alternating signal M becomes the same as when driven with a 1/449 duty. However, since the scan data signal LVS is at the data latch signal LHS (clock signal) of the data in the first row, the AC signals M in the first row and the second row are equal, and the AC in the first row is AC. There is no switching of the digitized signal M. This state is shown in FIG. 6, but since this is the edge of the screen, it can be ignored in the actual display.

As described above, in the second embodiment, it is possible to realize a display quality equivalent to that when driven at 1/449 duty with an extremely simple circuit in which one inverter is added to the conventional circuit shown in FIG. You can

In the first embodiment, the k-ary counter 5 and the flip-flop 6 are provided one by one, but it is obvious that the present invention can be applied to a method in which a combination of a plurality of these is used as a composite signal. In this case, the p-adic counter 7 may be common to each k-adic counter 5 or independent.

[0030]

As described above, according to the liquid crystal panel driving method of the present invention, the counter that generates the AC signal for each field is provided with a common or independent count pause period, which is optimal regardless of the duty of the input signal. The liquid crystal panel can be driven by the AC conversion signal. Therefore, when different devices are connected for display, the optimum image quality can always be displayed regardless of the duty of the signal output from the device.

[Brief description of drawings]

FIG. 1 is a block diagram of an alternating signal generating circuit of a method for driving a liquid crystal panel according to a first embodiment of the present invention.

FIG. 2 is a timing chart of signals in the same AC signal generation circuit.

FIG. 3 is a diagram showing switching points of an alternating signal M output from the same alternating signal generating circuit.

FIG. 4 is a block diagram of an alternating signal generating circuit of a method for driving a liquid crystal panel according to a second embodiment of the present invention.

FIG. 5 is a timing chart of signals in the same AC signal generation circuit.

FIG. 6 is a diagram showing a distribution of switching points of the alternating signal M at 1/450 duty according to the second embodiment of the present invention.

FIG. 7 is a block diagram illustrating a driving method of a conventional liquid crystal panel.

FIG. 8 is a block diagram of a conventional AC signal generation circuit.

FIG. 9 is a diagram showing an example of a display state of a liquid crystal panel in a conventional driving method.

FIG. 10 is a voltage waveform diagram of each part of the liquid crystal panel when an alternating signal generating circuit using a conventional ternary counter is used.

FIG. 11 is a diagram showing the distribution of the switching points of the alternating current signal at 1/449 duty when the conventional alternating current signal generating circuit using a ternary counter is used.

FIG. 12 is a diagram showing the distribution of the switching points of the alternating current signal at 1/450 duty when the conventional alternating current signal generation circuit using a ternary counter is used.

FIG. 13 is a diagram showing the distribution of the switching points of the alternating current signal at 1/450 duty when the conventional alternating current signal generating circuit using a 13-ary counter is used.

FIG. 14 is a voltage waveform diagram of each part of the liquid crystal panel when an alternating signal generating circuit using a conventional 13-ary counter is used.

[Explanation of symbols]

 5 k-adic counter (dividing counter) 7 p-adic counter (dividing counter) M AC signal

Claims (2)

[Claims] 1. A dot matrix type liquid crystal panel having n scanning electrodes (n = 1, 2, 3 ...) With a segment driving circuit and a scanning driving circuit, a duty ratio of 1 / m.
In the method of driving a liquid crystal panel, which is time-division driven with (m> n), a clock of a scanning drive circuit is divided by a single or a plurality of division counters, and a composite signal thereof is converted into an alternating signal. In common or independently, a period of m times the clock cycle, that is, L times (L = 1, 2, ..., Mn) of the clock cycle is provided for each field. LCD panel driving method. 2. The method of driving a liquid crystal panel according to claim 1, wherein the data signal of the scanning drive circuit is used as an enable signal of a frequency dividing counter that creates an alternating signal.