JPH0527263A - Liquid crystal display device - Google Patents

Abstract

PURPOSE:To provide the liquid crystal display device which enables both a static electricity countermeasure and array tester measurement. CONSTITUTION:This liquid crystal display device is equipped with picture element electrodes 24 which are arrayed in a matrix, thin film transistors 21 provided to the respective picture element electrodes 24, plural address lines 2 for controlling the thin film transistors 21 and plural data lines 3 which cross them at right angles, an outer peripheral electric conductor for short-circuit 1 which is connected to the address lines 2 and data lines 3 through parallel- connected thin film transistors 101a and 10b and provided outside a display area, and resistance bodies 9a and 9b and capacitors 10a and 10b which are connected in parallel between the thin film transistors 10a and 10b and the gate and address lines 2.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device,
Particularly, it relates to improvement of the array substrate.

[0002]

2. Description of the Related Art A liquid crystal display device is thin and lightweight, and can be driven at a low voltage and can be easily colored. In recent years, it has been used as a display device for personal computers, word processors and the like. .. Above all, a so-called active matrix type liquid crystal display device in which a thin film transistor (TFT) is provided as a switching element for each pixel is
Even if there are many pixels, there is no deterioration in contrast, response, etc., and since halftone display is possible, it is the most suitable system as a display device for full-color television and OA.

This active matrix type liquid crystal display device has two flat glass substrates (array substrate and counter substrate).
And a liquid crystal layer sandwiched between these substrates. A color filter array corresponding to each pixel and a transparent electrode (counter electrode) are formed on one glass substrate, that is, a counter substrate.
Pixel electrodes composed of transparent electrodes arranged in a matrix and TFTs having source electrodes connected to each pixel electrode are provided. The gate electrode of the TFT is connected to the address line provided in the X direction, and the drain electrode is connected to the data line provided in the direction orthogonal to the address line.

In the liquid crystal display device constructed as described above,
By applying the address signal and the data signal to the address line and the data line, respectively, at a predetermined timing, it is possible to selectively apply the voltage corresponding to the display to each pixel electrode. The orientation of the liquid crystal layer, that is, the light transmittance can be controlled by the potential difference between the counter electrode and the pixel electrode, which enables arbitrary display. For details, see T. P. Brody et al. (I
EEE Tvanson Select. Deu. Vol
ED-20, Nov. 1973, pp. 995-10
01).

The display characteristics largely depend on the performance of the TFT used as a switching element. This performance is
Generally, it is represented by electron mobility μ _n , threshold voltage V _th, and off current I _off . Both characteristics are important factors for the display characteristics, and the desired values are maintained by controlling the manufacturing process. By the way, since TFTs are generally weak to static electricity like the MOS transistors of SiIC, a liquid crystal display device is devised to release static electricity. For example, in the TFT array substrate during the manufacturing process, as shown in FIG.
As shown in (1), the short-circuiting outer peripheral wiring 1 is provided to release static electricity.

That is, in an array substrate in which a unit pixel composed of a TFT and a pixel electrode is provided at the intersection 5 of the address line 2 and the data line 3, all the address lines 2 and the data electrode lines 3 are outside the TFT array region. And short-circuiting with the peripheral wiring 1 for short circuit, and static electricity generated during the manufacturing process is
Instantaneous discharge via the address line 2-outer peripheral short-circuit line 1-data line 3 prevents the characteristic deterioration of the TFT in the unit pixel. After the manufacturing process is completed, the peripheral short circuit lines 1 are separated from the array substrate by scribing to electrically separate the lines 1, 2 and 3 from each other.
A signal is given to the liquid crystal display device by supplying from the.

By the way, the manufacturing process of the liquid crystal display device is roughly divided into an array process of forming an array substrate, a counter substrate manufacturing process of forming a color filter layer, a cell process of assembling both substrates and injecting a liquid crystal layer, Then, it comprises a module process of providing a peripheral drive circuit.

In the active matrix type liquid crystal display device using the TFT, the yield is worse than that of the simple matrix type liquid crystal display device which does not use the TFT because each process is long and complicated. Therefore, it is extremely important to prevent defective products generated in each process from flowing to the next process in order to reduce the manufacturing cost.

However, since it is difficult to inspect defects in the array process, particularly point defect defects on a pixel-by-pixel basis after the completion of the array process, defects in the array process were detected only after the completion of the cell process. Therefore, not only the counter substrate is wasted, but also an unnecessary cell process is performed.

This problem is caused by R. Array substrate tester devised by Wisniff et al. (109 SID Digest
May, 1990, pp. 190-193). This is because the array substrate is driven by driving close to the display state and the potential of each pixel electrode is detected, so that a defect at the point defect level can also be detected.

However, since a weak signal is detected and the input impedance of the detection circuit is relatively high,
When the short-circuited outer peripheral wiring 1 for discharging static electricity as described above is used, there is a problem that the array substrate cannot be checked by this array tester.

On the other hand, when the outer peripheral wiring 1 for short circuit is not provided, the array tester can detect all the various defects generated during the array process, including the deterioration of the TFT characteristics due to static electricity, and are good products for the next cell process. It is possible to disapprove only.

However, in this case, since the short-circuiting outer peripheral wiring 1 is not provided, defects due to static electricity increase in the array process and the cell process which is the subsequent process, which causes a problem that the yield decreases.

[0014]

As described above, in the conventional liquid crystal display device, both the measures against the deterioration of the TFT characteristics due to the static electricity generated in the manufacturing process and the array tester measurement for detecting the defect of the array substrate are compatible with each other. There was a problem not to do.

The present invention has been made in consideration of the above circumstances, and an object of the present invention is to provide a liquid crystal display device capable of both countermeasures against static electricity and array tester measurement.

[0016]

The gist of the present invention resides in that the address line and the data line are connected to the short-circuiting outer peripheral wiring through a discharge circuit.

In other words, in order to achieve the above object, the liquid crystal display device of the present invention has a matrix of pixel electrodes, switching elements provided on each pixel electrode, and a plurality of switching elements for controlling the switching elements. An address line and a plurality of data lines orthogonal to the address line, and a short-circuited outer peripheral wire provided outside the display area, connected to the address line and the data line through a thin film transistor connected in parallel, and the address. A parallel-connected resistor and capacitor inserted between one of the gates of the thin film transistors connected in parallel and the address line connected to each other and between the other gate and the outer peripheral wiring for short-circuiting. Between the one gate and the data line of the thin film transistors connected in parallel connected to the data line, and the other gate and the short-circuiting outer peripheral wiring. Characterized by comprising a inserted have been connected in parallel resistor and capacitor element between.

[0018]

In the liquid crystal display device of the present invention, since the address line and the data line are connected to the short-circuiting outer peripheral wiring through the thin film transistor connected in parallel, either the positive or negative charge is charged on the address line and the data line. Also, when a voltage whose absolute value is a threshold voltage is applied to the gate of the thin film transistor,
The thin film transistor is turned on, and electric charges can be caused to flow in the short-circuiting outer peripheral wiring for discharging.

Further, by adjusting the size of the thin film transistor, for example, the channel length and the channel width, the resistance of the thin film transistor can be set to a value that does not affect the array tester measurement, and it is compatible with the prevention of the characteristics of the switching element due to static electricity. it can.

Further, since the capacitor is inserted between the gate of the thin film transistor and the address line and between the thin film transistor and the data line, the gate of the thin film transistor is divided into the gate capacitor and the capacitor of the capacitor. Voltage is applied, and the problem of dielectric breakdown of the thin film transistor does not occur even when a large voltage is applied.

Further, since the resistor is inserted between the gate of the thin film transistor and the address line and between the thin film transistor and the data line, even if the gate voltage due to the capacitance division is smaller than the threshold voltage, the address line is Alternatively, when the voltage of the data line is equal to or higher than the threshold voltage, the voltage can be applied to the gate through the resistor, and further discharge can be expected.

[0022]

Embodiments will be described below with reference to the drawings.

FIG. 1 is a schematic configuration diagram of an array substrate of a liquid crystal display device according to an embodiment of the present invention, FIG. 2 is a diagram showing a pixel circuit at an intersection 5 of the array substrate, and FIG. 3 is a discharge in the array substrate. It is a figure which shows the circuit 7.

A plurality of address lines 2 and a plurality of data lines 3 orthogonal to the address lines 2 are provided on an array substrate made of a translucent insulating material such as glass. The pixel circuit shown is provided. Further, a peripheral short-circuit wiring 1 made of aluminum is provided around the array substrate, and each address line 2 and data line 3 is connected to the short-circuit peripheral wiring via the discharge circuit 7 shown in FIG. It is connected to 1.

The pixel circuit is, as shown in FIG. 2, an n-channel TFT using amorphous silicon for the active layer.
21 and a transparent pixel electrode 24 connected to the drain of the TFT 21. The gate of the TFT 21,
The sources are connected to the address line 2 and the data line 3, respectively.

As shown in FIG. 3, the discharge circuit 7 includes discharge TFTs 10a and 10b connected in parallel and a TFT1.
0a of the gate and the address line 2 or the data line 3 are connected in parallel and the capacitor 8a and the resistor 9a.
And a parallel connected capacitor 8b and resistor 9b inserted between the gate of the TFT 10b and the short-circuiting outer peripheral wiring 1.
It consists of and.

The array substrate constitutes a liquid crystal display panel by sandwiching the twisted nematic mode liquid crystal layer 22 together with the counter substrate provided with the color filter layer facing the array substrate. The transparent counter electrode 23 is formed on the surface of the counter substrate.
Is provided, and the light transmittance of the liquid crystal layer 22 can be controlled by the potential difference between the transparent counter electrode 23 and the transparent pixel electrode 24. Since the potential of the transparent pixel electrode 24 can be controlled independently by the TFT 21 for each pixel, any display is possible.
In FIG. 1, 6 is a scribe line. Figure 4
Is provided between the short-circuiting outer peripheral wiring 1 and the data line 3,
FIG. 6 is a plan view showing a specific structure of the discharge circuit 7, and FIG. 5 is a sectional view taken along line AA ′ of FIG.

Gate electrodes 14c and 14d made of an alloy of molybdenum tantalum are provided on a transparent insulating substrate 18, and these gate electrodes 14c and 14d are covered with a gate insulating film 19 made of a silicon nitride film. .. Contact holes 11c and 11d are opened in the gate insulating film 19, and lead electrodes 17c and 17d connected to the gate electrodes 14c and 14d, respectively, are provided. The extraction electrodes 17c and 17d are connected to resistors 9c and 9d made of amorphous silicon, respectively. Active layers 15c, 1 made of amorphous silicon are formed on the gate electrodes 14c, 14d with a gate insulating film 19 interposed therebetween.
5d is provided. On the active layers 15c and 15d,
Channel protection films 16c each made of silicon nitride,
16d is provided. These gate electrodes 14c, 1
4d, gate insulating film 19, active layers 15c and 15d, channel protection films 16c and 16d, and an inverted stagger type TFT.
10c and 10d are configured. Further, the short-circuiting outer peripheral wiring 1, the gate insulating film 19 and the gate electrode 14c constitute a capacitor 8c, and the data line 3, the gate insulating film 19 and the gate electrode 14d constitute a capacitor 8d. A completely similar discharge circuit 7 is provided between the short-circuiting outer peripheral wiring 1 and the address line 2. In the array substrate configured as described above, the TFT due to static electricity is
21 is prevented from decreasing. FIG. 6 is a schematic equivalent circuit diagram of a liquid crystal display device including the array substrate.

It is assumed that the address line 2 is charged with positive static electricity 12 in the manufacturing process of the TFT array substrate. At this time, static electricity 12 is generated between the address line 2 and the data line 3.
The voltage V _c corresponding to is applied.

As described above, the address line 2 is connected to the short-circuiting outer peripheral wiring 1 through the discharging TFTs 10a and 10b, and the data line 3 is connected to the short-circuiting outer peripheral wiring 1 through the discharging TFTs 10c and 10d. because it is, the address line 2 between short outer peripheral line 1, between the data line 3 short outer peripheral line 1, the voltage V _a that satisfies the relationship of V _c = V _a + V _b, respectively, V _b is applied It The gate electrode of the TFT 10a, the voltage divided voltage V _a by the gate capacitance of the capacitor 8a and TFT 10a is applied. Similarly TFT1
The voltage is also applied to the gate electrodes of 0b, 10c, and 10d. As a result, when a voltage equal to or higher than the threshold voltage V _th is applied to the gate electrodes of the discharge TFTs 10a to 10d,
The TFTs 10a to 10d are turned on, a current flows, the static electricity 12 disappears, and the characteristic deterioration of the TFT 21 as a switching transistor can be prevented.

In the above description, it is assumed that the positive static electricity 12 is charged on the address line, but the characteristic deterioration of the TFT 21 can be prevented also in the case of the negative static electricity. Because the TFTs 10a, 10b and TF connected in parallel are
T10c and 10d are bipolar currents I as shown in FIG.
This is because the −voltage V characteristic results in that the static electricity can be discharged regardless of the polarity of the static electricity charged on the address line 2.

Further, since the current I is proportional to the square of the difference between the gate voltage V _G and the threshold voltage V _th , the larger the static electricity is, the higher the discharging capacity is, and the static electricity can be instantly discharged, and the TFT 21 is discharged. It is possible to prevent deterioration. Further, the capacitors 8a to 8d have the effect of dividing and reducing the voltage applied to the gate electrodes of the TFTs 10a to 10d, respectively, even when the voltage due to static electricity is extremely high, and therefore prevent the gate insulating film from being destroyed in the TFTs 10a to 10d. can do. In addition, the values of the capacitors 8a to 8d are set so as to have some margin with respect to the maximum static electricity amount generated during the manufacturing process, so that the TFT 10
The dielectric breakdown of a to 10d can be reliably prevented. Further, the resistor 9a is provided for directly applying the voltage of the address line 2 and the data line 3 to the gate electrode of the TFT 10a instead of the capacity division.

That is, in the initial stage of discharge, the voltage Va changes transiently, so that the resistor 9a can be ignored, and as a result, the voltage applied to the gate electrode of the TFT 10a is the capacitance of the capacitor 8a and the gate of the TFT 10a. The voltage is divided by the capacitance. At this time, when the gate voltage V _G becomes lower than the threshold voltage V _th , the TFT 10a is turned off and the discharge is completed.

However, even if the gate voltage V _G becomes lower than the threshold voltage V _{th, the} voltage of the address line 2 and the data line 3 does not become lower than the threshold voltage V _th immediately but in a steady state. Moreover, there is a period in which the voltage of the address line 2 and the data line 3 is equal to or higher than the threshold voltage V _th . At this time, the capacitor 8a can be disregarded, a voltage higher than the threshold voltage V _th can be applied to the gate electrode through the resistor 9a, and further discharge can be performed. As a result, the voltage of the address line 2 and the data line 3 can be lowered to the threshold voltage V _th , and the characteristic deterioration of the TFT 21 can be prevented. The resistors 9b to 9d are also provided for the same purpose.

In the array tester measurement, the sizes of the TFTs 10a to 10d are set so that the resistance is high enough not to affect the measurement in the range of the voltage applied to the address line 2 or the data line 3 by the array tester. It can be done by setting. In addition, since the electrostatic discharge of high voltage has a sufficiently low impedance, the discharge capacity can be sufficiently secured.

Specifically, regarding the TFTs 10c and 10d, the channel length is 12 μm and the channel width is 500 μm.
The channel resistance is set to be approximately 200 kΩ when a voltage of, for example, 20 V is applied between the short-circuiting outer peripheral wiring 1 and the data line 3. Further, the capacitance of the capacitors 8c and 8d is set to about 1.5 pF, and the TFT1
The gate electrodes of 0c and 10d are set so that about half the voltage of the static electricity generated in the data line 3 is applied.
The resistance of the resistors 9c and 9d is set to about 100 MΩ. That is, the resistance value is set higher than the resistance value of one data line 3. Further, the TFTs 10c and 10d, the capacitors 8c and 8d, and the resistors 9a and 9d are similarly set. In this case, the resistance values of the resistors 9a and 9d are one address line 2
Set higher than the resistance value of.

By setting in this way, each electrode pad 4 of the address line 2 and the data line 3 is set by the array tester.
Even if probing is performed, since the impedance of the short-circuiting outer peripheral wiring 1 seen from the probe is high, the measurement can be performed.
Further, since the maximum voltage applied from the array tester to each electrode pad 4 was 20 V, this impedance was about 200 kΩ at the minimum, and there was no problem in measurement.

It is estimated that the static electricity generated in the manufacturing process of the liquid crystal panel reaches a maximum of about 500 to 1000 V, but when 1 kV is applied, a voltage of about 500 V is momentarily applied to the gate of the TFT. Join in. However, the on-resistance is (20/500) ² × 200 = 160Ω, and static electricity is discharged in an extremely short time. The capacitor 8
When c and 8d are not provided, a potential of 1 kV is directly applied to the gate electrode of the TFT, and the TFT 10c or the TFT 1
In some cases, the 0d gate insulating film was destroyed. However, when the capacitors 8c and 8d are provided, the dielectric breakdown can be completely eliminated.

Thus, according to this embodiment, it is possible to obtain an array substrate which can surely discharge static electricity and can be measured by an array tester without any trouble.
Moreover, the discharging TFT 10 is not broken down even if a high voltage is applied to the discharging circuit 7.

The short-circuiting outer peripheral wiring 1 and the discharging circuit 7 are
The liquid crystal panel may be separated after it is completed, or it may be left as it is to realize a liquid crystal display device. In this case, the dimensions of the discharging TFT 10 may be determined so that the resistance becomes sufficiently higher than the output impedance of the peripheral driver IC connected to the electrode pad 4.

The present invention is not limited to the above embodiment. For example, in order to completely discharge the static electricity of the address line 2 and the signal line 3, as shown in FIG. 8, a discharge circuit provided with a high resistance 13 may be used. In this case, the discharge through the resistors 9 and 13 takes longer than the discharge through the TFT 10, but since the voltage of the address line 2 and the data 3 is sufficiently low, the characteristic of the TFT 21 does not deteriorate.

Further, in the above embodiment, the short-circuiting outer peripheral wiring 1
Although it is provided on the outer periphery of the array substrate, it may be provided on the outer periphery of the TFT array section. The point is that it may be outside the display area. Also,
A plurality of capacitors connected in series may be used.
Furthermore, transistors other than thin film transistors may be used. In addition, within the scope of the present invention,
Various modifications can be implemented.

[0043]

As described above in detail, according to the present invention, the address line and the data line are connected to the short-circuiting outer peripheral wiring through the discharge circuit composed of the thin film transistors connected in parallel. It is possible to achieve both the characteristic deterioration and the array tester measurement for detecting the defect of the array substrate.

[Brief description of drawings]

FIG. 1 is a schematic configuration diagram of an array substrate of a liquid crystal display device according to an embodiment of the present invention.

FIG. 2 is a diagram showing a pixel circuit of the array substrate of FIG.

FIG. 3 is a diagram showing a discharge circuit in the array substrate of FIG.

FIG. 4 is a plan view showing a specific structure of a discharge circuit.

5 is a cross-sectional view taken along the line AA ′ of the plan view of FIG.

6 is a schematic equivalent circuit diagram of a liquid crystal display device including the array substrate of FIG.

FIG. 7 is a characteristic diagram showing the relationship between the current and voltage of the TFT of the discharge circuit.

FIG. 8 is a discharge circuit provided with a high resistance body.

FIG. 9 is a diagram for explaining a conventional antistatic measure.

[Explanation of symbols]

1 ... Short-circuited peripheral wiring, 2 ... Address line, 3 ... Data line,
4 ... Electrode pad, 6 ... Scribe line, 7 ... Discharge circuit, 8a-8d ... Capacitor, 9a-9d ... Resistor, 1
0a to 10d, 11c, 11d ... Contact hole, 1
2 ... Static electricity, 13 ... High resistance material, 14c, 14d ... Gate electrode, 15c, 15d ... Active layer, 16c, 16d ... Channel protective film, 17c, 17d ... Extraction electrode, 18 ... Substrate, 19 ... Gate insulating film, 21 ... TFT, 22 ... Liquid crystal layer, 23 ... Transparent counter electrode, 24 ... Transparent pixel electrode.

Claims (1)

Claim: What is claimed is: 1. Pixel electrodes arranged in a matrix, switching elements provided on each pixel electrode, a plurality of address lines for controlling the switching elements, and a plurality of data orthogonal thereto. Line and a short-circuited peripheral wiring provided outside the display area, connected to the address line and the data line via a thin film transistor connected in parallel, and the thin film transistor connected in parallel connected to the address line. A resistor and a capacitor connected in parallel between one gate and the address line and between the other gate and the short-circuiting outer peripheral wiring; and the parallel connection connected to the data line. Resistors connected in parallel between one gate of the thin film transistor and the data line and between the other gate and the short-circuiting outer peripheral wiring. The liquid crystal display device characterized by having a capacitor body.