JPH052645A - Ordered filtering method - Google Patents

Abstract

PURPOSE:To eliminate the need of updating an order X in an order filtering method which fetches digital data in the size of a prescribed order from plural digital data. CONSTITUTION:'1' is assigned to a mask flag Mn provided at every digital data, '0' is assigned to a count sum msum and 'D' is assigned to a search digit (d). Then, the number md of d-th digit '1' in digital data whose mask flag Mn is '1' is counted, and md+msum is compared with the order X. When md+msum>=X, d-th digit of output data is decided to be '1', and '0' is assigned to the mask fla Mn as against digital data whose d-th digit is '0' in Vn. When md+msum<X, d-th digit of output data is decided to be '0', and '0' is assigned to the mask flag Mn as against digital data whose d-th digit is '1' in Vn. Then, md is added to the count sum msum. '1' is subtracted from (d), and it is repeated until (d) becomes LSB(1) from MSB(D).

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an order filtering method for retrieving and outputting data of a desired rank from a plurality of data and, for example, to a spatial filtering method for image processing, especially digital image processing.

[0002]

2. Description of the Related Art Digital image processing is currently being used brilliantly in various fields of application. It is widely used in various fields such as automation factory control, robots, security services, and toy manufacturing.

When reading these digital image data, they often contain noise. In recent years, as the resolution and resolution of image data readers have improved, the effect of noise has become non-negligible. One of the methods for removing such noise is a spatial filtering method.

In the spatial filtering method, in order to determine the value (brightness) of a certain point in an image, a set of a plurality of points including the point is defined, and the value of each point included in the set defines This is a method of determining the value of the first point. Such a set of points is generally called a kernel.

The most commonly used kernel is a 3 × 3 9 point kernel. That is, the value of a certain point is determined from the value of that point and the values of the eight points surrounding that point. FIG. 4 shows an explanatory diagram of a spatial filtering method using a 3 × 3 kernel. Figure 4 shows the kernel
It is a figure showing the relation with the whole image data. In the figure, the value of the point V ₅ is determined by the values of the points V _{1 to} V ₉ , which is the kernel. By the method of this decision,
The type of spatial filtering method is determined. A median filtering method is a particularly effective filtering method for removing spot noise. A device, a program or the like that executes the median filtering method is called a median filter.

The median filtering method is V ₁ ~
This is a method in which, when the values of points between V ₉ are arranged in descending order of magnitude, the median value (median) thereof is newly set as the value of V ₅ . As mentioned above, this filtering method
Greatly effective in removing spot noise. Further, in the median filtering method, the median value, that is, the fifth value is used. Generally, this is taken as the Xth (1 or more and an integer less than or equal to the number of points included in the kernel) th value. The filtering methods described above are collectively called an order filtering method.

The most common method for implementing this order filtering method is to sort the values of the points included in the kernel in the order of magnitude, and then take out the desired Xth value from the sorted values. is there. This method is disclosed in, for example, JP-A-2-7614.

[0008] In addition, in the C-97 page, Proceedings of the Autumn National Convention of the Institute of Electronics, Information and Communication Engineers in 1988, a method of selectively retrieving only values of a desired rank using a bit slice type parallel sorter is used. The example of the existing LSI is disclosed.
Hereinafter, this method will be described. N is the number of points included in the kernel, D is the number of digits (bit number) of the value of each point, X (1 ≦ X ≦
N) is the order of the data to be extracted. That is, there are N pieces of D-digit digital data, and among them, X (1 ≦ X ≦
It is assumed that N) th size data is extracted as output data. N digital data is V ₁ (D: 1) to V
_N (D: 1), for example V ₁ (D) represents the Dth bit of the first data, that is, MSB, and V
₁ (1) represents the first digit bit of the first data, that is, the LSB.

In this method, the number of "1" s in the same digit of each digital data is compared with the rank X, and data other than the candidate is excluded. Below is a list of the steps of this method.

Step 1 Mask flags M ₁ to M provided for each digital data
An initialization step of substituting "1" for _MN and "D" for the search digit d.

Step 2 A counting step of counting the number m _d of “1” at the d-th digit for the digital data whose mask flag M _n (1 ≦ n ≦ N) is “1”.

Step 3 A comparison step of comparing m _d with the rank X.

Step 4 If m _d ≧ X as a result of the comparison step, the d-th digit of the output data is determined to be “1” and V _n (d) =
For digital data of "0" (1≤n≤N), "0" is assigned to the mask flag M _n , and if m _d <X,
The d-th digit of the output data is determined to be "0" and V _n
(D) A digit determining step of substituting “0” into the mask flag M _n and subtracting m _d from the rank X for digital data with “1” (1 ≦ n ≦ N).

Step 5 From the counting step to the digit determining step, d is MS
An iterative step that repeats from B (ie d = D) to LSB (ie d = 1).

This method consists of the above steps. Step 1 is a step of initialization, by writing a "1" in the mask flag M ₁ ~M _N, first, all the digital data as a candidate, by writing "D" in the search digit d, treatment of a subject First, the digit that becomes is set to the MSB. Step 2 is a step of counting the number of "1" s in the same digit of the candidate digital data. Step 3 is a step of comparing the count value in the previous step with the rank X. Step 4
Determines the output data by one digit according to the comparison result in the previous step, excludes digital data that is no longer a candidate, and reduces the rank X by an amount corresponding to the decrease in the number of candidates as necessary. Exclusion is mask flags M _{1 to} M
_This is done by writing "0" to _N. The digital data in which “0” is written in the mask flag is excluded from the counting target in step 2. Step 5
Is a step in which steps 2 to 4 are repeated by the number of digits.

An example of configuring an LSI by this method is described in the above-mentioned proceedings. In this example, a parallel sorter of the bit slice type is used, in which a sorter having an adder for counting and a comparator for comparing is provided for each digit. That is, the above steps are performed by different hardware for each digit. A block diagram of this LSI is shown in FIG.

In FIG. 5, nine pieces of 4-digit digital data are input, and the Xth value of a desired rank is output from the OUT.
FIG. 3 is a block configuration diagram showing an LSI extracted as (3: 0). As described above, for example, assuming that V ₁ (D) represents the D-th digit bit of the first data, 9 pieces of 4-digit digital data are respectively V ₁ (3: 0) = V ₁ ( 3), V ₁ (2), V ₁ (1), V ₁ (0) V ₂ (3: 0) = V ₂ (3), V ₂ (2), V ₂ (1), V ₂ (0 ) :: :: V ₅ (3: 0) = V ₅ (3), V ₅ (2), V ₅ (1), V ₅ (0) :: :: V ₉ (3: 0) = V ₉ (3 ), V ₉ (2), V ₉ (1), V ₉ (0). For example, V ₁ (3) represents the MSB of the first digital data, and V ₉ (0) represents the LSB of the 9th digital data. The rank X is an integer of 1 or more and 9 or less. The output OUT (3: 0) is 4-digit digital data like the input. This LSI has a digit block corresponding to each digit. Corresponding to each digit, these are referred to as digit block # 3 to digit block # 0.

In each digit block, all nine pieces of data corresponding to the input digits are input. For example, nine values V ₁ (3), ... V ₉ (3) are input to the digit block # 3, and V ₁ (2), ... V ₉ (2) is input to the digit block # 2. 9 values are entered. Further, each digit block outputs the data of each corresponding digit of the output. For example, the digit block # 3 outputs OUT (3) and the digit block # 2
Outputs OUT (2).

The rank X is the highest digit block # 3.
Are typing in. The digit block # 3 outputs the rank X to the lower digit block # 2 after changing the rank X as it is or a smaller value as necessary as described above. Similarly, the rank X is propagated to the lowest digit block # 0. The order input to the digit block #d is called X _d, and the order output is called X _d-1 .

Further, as described above, since this method is a method of narrowing down the candidates by using the mask flag, the mask flag is also propagated from the upper digit block to the lower digit block similarly to the rank X. .. Similarly to the rank X, the mask flags are called the mask flags input to the digit block #d as M ₁ (d), ... M ₉ (d), and the output mask flags are M ₁ (d−1), ... M ₉ (d-1). In the highest-order digit block # 3, since all nine pieces of input digital data are candidates, processing is performed assuming that all mask flags are "1".

Next, FIG. 6 shows a detailed block diagram of each digit block. FIG. 6 shows the digit block 20 of the d-th digit as an example.

First, nine pieces of input digital data V
₁ (d), ... V ₉ (d) are mask flags M ₁ (d) to
Masked based on M ₉ (d). This includes 9
AND gates 22 are used. The input digital data V ₁ (d), ... V ₉ (d) are ANDed with the mask flags M ₁ (d) to M ₉ (d), respectively.
The digital data other than the candidates are excluded from the addition target described below.

The outputs of the nine AND gates 22 are output to the adder 24. The adder 24 adds nine pieces of digital data, that is, counts the number of "1" s therein. The addition output m _d of the adder 24 is output to the comparator 26.

The comparator 26 calculates, from the above-mentioned addition output m _d ,
The rank X _d from the upper digit block is subtracted. If the result is non-negative, the output OUT (d) of the comparator 26
Becomes "1", and if the result is negative, OUT (d)
Becomes “0”. The comparator 26 also outputs the subtraction result. That is, m _d −X _d is output to the absolute value circuit 28. The absolute value circuit 28 creates an absolute value of m _d −X _d ,
Output to the rank selector 30. The rank selector 30 is the comparator 2
The value of the output OUT (d) of 6 selects the value of the order X _d-1 to be transmitted to the lower digit block. Rank selector 30
When the value of OUT (d) is "1", _Xd is selected as the order _Xd-1 to be transmitted to the lower digit block and is output as it is. When the value of OUT (d) is "0", X _d-1
To select the X _d -m _d which is the output of the absolute value circuit 28 outputs as. By the way, when the value of OUT (d) is “0”, it means that m _d <X _d , so the output m _d −X _d of the comparator 26 is a negative number. This m _d −X _d passes through the absolute value circuit 28 to become a positive number X _d −m _d , which is selected by the rank selector 30.

The mask flag for the lower digit block is created by the mask flag creator 32. The mask flag is updated for each digital data. The mask flag generator 32 receives the mask flags M _n (d) and (n = 1, ... 9) from the upper digit block, the input digital data V _n (d) input to this digit block, and the comparator. 26
From the output OUT (d) of the above, the mask flag M _n (d-1) to the lower digit block is calculated. The calculation formula is as follows.

M _n (d−1) = M _n (d) .AND. (V _n (d) .EX-NOR.OUT (d)) (where n = 1, ... 9) That is, M _n ( d) = “1” and V _n (d) =
_Mn (d-1) is "1" only when OUT (d), and is "0" in all other cases.

As described above, since this LSI is provided with the digit block having the adder and the comparator for each digit,
This is superior to the method of simply sorting the data and then selecting the values in the desired order.

[0028]

However, the digit block 20 includes an adder 24, a comparator 26 and an absolute value circuit 28, which is a very complicated arithmetic circuit. In this absolute value circuit 28, since the complicated process of inverting the input data and adding "1" must be performed, the operation speed of the absolute value circuit 28 is higher than that of other circuit groups. It will be very slow. This results in L
The speed of the entire SI has also become relatively slow.

The conventional order filtering method requires an extra process of taking an absolute value as described above. Therefore, even in an LSI device to which this method is applied, a complicated absolute value circuit must be prepared, and a large circuit area is occupied in the circuit pattern of the LSI. As a result, there is a drawback that the operation speed becomes slow.

[0030]

The present invention is a method for solving the above-mentioned problems, characterized by including the following steps. However, it is assumed that the value of the X (1 ≦ X ≦ N) -th magnitude is extracted from N pieces of digital data having D digits.

Step 1 Mask flags M ₁ to M provided for each digital data
An initialization step of substituting "1" for M _N , "0" for the _sum of counts m _sum , and "D" for the search digit d.

Step 2 A counting step of counting the number m _d of “1” at the d-th digit for the digital data whose mask flag M _n (1 ≦ n ≦ N) is “1”.

Step 3 A comparison step of comparing m _d + m _sum with X.

Step 4 If m _d + m _sum ≧ X as a result of the comparison step, the d-th digit of the output data is determined to be “1”, and V
_For digital data with _n (d) = "0" (1 ≤ n ≤ N), "0" is assigned to the mask flag M _n , and m _d +
If m _sum <X, the d-th digit of the output data is determined to be “0” and the mask flag M _n is set for the digital data of V _n (d) = “1” (1 ≦ n ≦ N). , "0"
And a digit determining step of adding m _d to the _sum of counts m _sum .

Step 5 From the counting step to the digit determining step, d is MS
An iterative step that repeats from B (ie d = D) to LSB (ie d = 1).

The present invention comprises the above steps.
What is characteristic of the present invention is that in step 4,
_md is cumulatively added, and X does not change its value at all. By this, step 3 is m _d + m _sum
And X are compared.

On the other hand, conventionally, in step 4, m _d is subtracted from X, and the value of X has changed. This caused step 3 to compare m _d with the changing X.

[0038]

In the past, m _d was subtracted from the rank X as needed, but instead, m _d is cumulatively added to the count sum m _sum . Therefore, the absolute value circuit has been indispensable conventionally, but it is not necessary in the present invention. Therefore, the circuit configuration is simplified and the circuit operation can be performed at high speed.

[0039]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of an ordering filter LSI using the ordering filtering method of the present invention. 1 is similar to the LSI shown in the conventional example,
FIG. 9 is a block diagram showing an LSI in which nine pieces of 4-digit digital data are input and a desired rank Xth value is taken out as an output OUT (3: 0) from the input data.

As in the conventional example, the input is a 4-digit V ₁ (3:
0) to V ₉ (3: 0), and the Xth digital data of the output is represented as a 4-digit output OUT (3: 0) as with the input.

Similarly to the conventional example, the LSI configuration also has a digit block corresponding to each digit. These are digit block # 3 to digit block # 0. In each digit block, all nine pieces of data of the digits corresponding to the input are input. For example, nine values V ₁ (3), ... V ₉ (3) are input to the digit block # 3, and V ₁ (2), ... V ₉ (2) is input to the digit block # 2. 9 values are entered. Further, each digit block outputs the data of each corresponding digit of the output. For example, the digit block # 3 outputs OUT (3) and the digit block # 2
Outputs OUT (2).

Further, as described above, since this method is a method of narrowing down the candidates by using the mask flag,
Each digit block takes a different mask flag value.
That is, the mask flag is propagated while being updated from the upper digit block to the lower digit block. The mask flag input from the upper digit block to the digit block #d is set to M
₁ (d), ... M ₉ (d), and the mask flag output from the digit block #d to the lower digit block is M ₁ (d
-1), ... M ₉ (d-1). In the highest-order digit block # 3, all mask flags are supplied from the outside, but normally, in the highest-order digit, all nine input digital data are candidates, so "1" is shown in all mask flags. It will be input from an external circuit that has not been processed.

The rank X is input to all digit blocks, unlike the conventional example. According to the present invention, since the rank X is not changed at all, the rank X can be input with the same value in all the digit blocks in this embodiment as well.

The present invention accumulates the number of "1" s in each digit without changing the rank X as described above. Therefore, the rank X is supplied with the same value in each digit block, but the sum of counts m _SUM cumulatively added as necessary in each digit block is sequentially propagated from the upper digit block to the lower digit block. In this text, the sum of counts input to the digit block #d is called m _SUM (d), and the sum of counts output to the lower digit block # d-1 is called m _SUM (d-1).

Next, a detailed block configuration diagram of each digit block is shown in FIG. FIG. 2 shows the digit block 40 of the d-th digit as an example.

First, nine pieces of input digital data V
₁ (d), ... V ₉ (d) are mask flags M ₁ (d) to
Masked based on M ₉ (d). This includes 9
AND gates 42 are used. The input digital data V ₁ (d), ... V ₉ (d) are ANDed with the mask flags M ₁ (d) to M ₉ (d), respectively.
The output of digital data other than the candidates is forcibly set to "0". As a result, digital data other than the candidates are excluded from the subject of addition described below.

The outputs of the nine AND gates 42 are output to the first adder 44. The first adder 44 adds nine pieces of digital data, that is, counts the number of “1” in the nine pieces of digital data. First adder 4
The addition output m _{d of} 4 is output to the second adder 46.

The second adder 46 is in the upper digit block #d.
The sum of counts m _SUM (d) from +1 and the addition output m _{d of} the first adder 44 are added, and m _d + m _SUM (d) is output. The comparator 48 outputs the output m _d of the second adder 46 described above.
+ _{M SUM} (d) is compared with rank X. The comparison is
This is performed by subtracting the rank X from the output m _d + m _SUM (d) of the second adder 46 described above. If the result of this subtraction is non-negative, that is, m _d + m _SUM (d) ≧
If X, the output OUT (d) of the comparator 48 becomes "1", and if the result is negative, that is, m _d + m _SUM (d)
If <X, OUT (d) becomes “0”. Comparator 4
The output OUT (d) from 8 is also output to the counting sum selector 50 and the mask flag generator 52 described below.

The counting sum selector 50 outputs the output OU of the comparator 48.
According to the value of T (d), the value of the count sum _mSUM (d-1) transmitted to the lower digit block is selected. Counting sum selector 5
When the value of OUT (d) is “1”, 0 is m as the count sum m _SUM (d−1) transmitted to the lower digit block.
Select _SUM (d) and output as it is. Also, OUT
When the value of (d) is “0”, m _d + m _SUM (d) which is the output of the second adder 46 is selected and output as m _SUM (d−1).

That is, when the value of OUT (d) is "0", the digital data whose value at the d-th digit is "1" is not subject to inspection in the next stage. Therefore, the number of digital data that is a factor of the value of m _d is stored, added with the result of counting in the next stage, and then compared with the rank X. In other words, when the value of OUT (d) is "0", the data to be excluded is the data having the larger size, and therefore, conventionally, the rank x had to be reduced accordingly. It can be said that the present invention solves this problem by adding this to the counting result.

The mask flag for the lower digit block is created by the mask flag creator 52. The mask flag generator 52 is exactly the same as the conventional one. The mask flag is updated every 9 digital data. The mask flag generator 52 receives the mask flags M _n (d) and (n = 1, ... 9) from the upper digit block,
Input digital data V _n input to this digit block
From (d) and the output OUT (d) of the comparator 48, the mask flag M _n (d-1) for the lower digit block is calculated. The calculation formula is as follows.

M _n (d−1) = M _n (d) .AND. (V _n (d) .EX-NOR.OUT (d)) (where n = 1, ... 9) That is, M _n ( d) = “1” and V _n (d) =
Only when OUT (d), M _n (d−1) becomes “1”, and in all other cases, it becomes “0”. In other words, only digital data that has not been excluded and has digit data equal to the output OUT (d) is subject to the inspection in the next stage.

Further, this LSI is provided with a mask flag used in the digit block # 3 and a terminal for inputting the value of the count sum from the outside. In addition, digit block # 0
It also has a terminal for outputting the mask flag output from the device and the count sum value to the outside. Therefore, even if the digit number of the nine pieces of digital data increases, this LSI can be easily dealt with by cascade connection. Figure 3
2 shows a connection block diagram of an example in which two LSIs of this embodiment are used and 8-digit digital data is supported.

[0055]

As described above, according to the present invention,
In the method of sequentially narrowing down the candidates by using the mask flag, the rank is conventionally reduced accordingly, but since the count values are cumulatively added, it is possible to keep the rank X at the same value. it can.

Therefore, the absolute value circuit, which has been necessary in the past, becomes unnecessary. Also, when this method is used in an LSI, it has good properties such as a small circuit area, and
The calculation speed can be improved.

[Brief description of drawings]

FIG. 1 is a block diagram of a sequential filter LSI that is an embodiment of the present invention.

FIG. 2 is a detailed block configuration diagram of each digit block of a sequential filter LSI that is an embodiment of the present invention.

FIG. 3 is a connection diagram showing an example corresponding to a case where the sequential filter LSIs according to an embodiment of the present invention are connected in cascade and the number of digits of input digital data increases.

FIG. 4 is an explanatory diagram of a spatial filtering method using a 3 × 3 kernel.

FIG. 5 is a block diagram of a conventional sequential filter LSI.

FIG. 6 is a detailed block configuration diagram of each digit block of a conventional sequential filter LSI.

[Explanation of symbols]

 20-digit block 22 AND gate 24 Adder 26 Comparator 28 Absolute value circuit 30 Rank selector 32 Mask flag generator 40 Digit block 42 AND gate 44 First adder 46 Second adder 48 Comparator 50 Count sum selection Device 52 Mask flag generator

Claims (1)

Claims: 1. Digital data V _n having N D digits.
In the order filtering method of searching and outputting the data of the size of (n = 1, ..., N) of X (1 ≦ X ≦ N), mask flags M _{1 to MN} provided for each digital data. Is set to 1, the _sum of counts m _{sum is set} to “0”, and the search digit d is set to “D”. The mask flag M _n (1 ≦ n ≦ N) is set to “1”. A counting step for counting the number m _d of “1” at the d-th digit in the digital data, a comparing step for comparing m _d + m _sum with X, and a result of the comparing step, m _d + m _sum ≧ X If so, the d-th digit of the output data is determined to be "1", and "0" is substituted into the mask flag M _n for the digital data in which the d-th digit of V _n is "0", and m _d + M
_{If sum} <X, the d-th digit of the output data is determined to be "0", and "0" is assigned to the mask flag M _n for the digital data in which the d-th digit of V _n is "1". , A digit determining step of adding m _d to the count sum m _sum , and a repeating step of repeating the counting step to the digit determining step until d reaches MSB (that is, d = D) to LSB (that is, d = 1) An ordinal filtering method comprising: