JPH05259860A - Current switch circuit - Google Patents

Abstract

PURPOSE:To attain safe operation of the circuit even when a low power supply voltage of a 2nd power supply is adopted and an input signal is set to a low level by connecting a series circuit comprising plural enhancement field effect transistors(TRs) to ground via a diode. CONSTITUTION:A gate of a P-channel enhancement field effect TR Q2 and a gate of an N-channel enhancement field effect TR Q3 are connected together and used for an input voltage signal terminal VIN. A 2nd power supply (constant voltage power supply) VREF connects to ground via a series circuit comprising a source drain circuit of the TRQ., a source drain circuit of the TRQ3, and a diode D1. Thus, a threshold level of an input signal in terms of a logic level is set higher than a half of the 2nd power supply (constant voltage power supply) VREF by VF/2 thereby increasing a margin of the threshold level, where VF is a forward voltage drop of the diode D1.

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION The present invention relates to improvements in current switch circuits.

[0002]

2. Description of the Related Art In the present invention, a current switch circuit is a constant current of a desired value which is applied with a high level or low level input signal voltage and corresponds to the high level or low level of the input signal. Is a circuit for obtaining the output signal of.

Referring to FIG. 5, one example of a conventional current switch circuit will be described with reference to FIG. Q ₂ is a P-channel enhancement type field effect transistor, Q ₃ is an N-channel enhancement type field effect transistor, their drains are connected to each other, and the source of the P-channel enhancement type field effect transistor Q ₂ is a constant voltage power supply. (Second power supply) connected to V _REF, and the source of the N-channel enhancement type field effect transistor Q ₃ is grounded. The gates of these two field effect transistors are connected to each other and serve as an input voltage signal terminal V _IN . The back gate of the P-channel enhancement type field effect transistor Q ₂ is connected to the first power source V _CC, and the back gate of the N-channel enhancement type field effect transistor Q ₃ is grounded. The connection point between the drain of the P-channel enhancement type field effect transistor Q _{2 and} the drain of the N-channel enhancement type field effect transistor Q ₃ is connected to the base of the NPN transistor Q ₁ . The emitter of the NPN transistor Q ₁ is grounded via the first resistor R ₁ .

The first power supply V _CC is a constant current load (output load)
It is connected to the collector of the NPN transistor Q ₁ via I ₀ . When a high level input signal voltage is applied to the input voltage signal terminal V _IN , only the N-channel enhancement type field effect transistor Q ₃ is turned on, and NP
The base of the N-transistor Q ₁ goes to the ground potential, the NPN transistor Q ₁ is turned off, and no constant current flows through the constant-current output load I ₀ . On the other hand, when a low level input signal voltage is applied to the input voltage signal terminal V _IN , only the P-channel enhancement type field effect transistor Q ₂ is turned on and the base of the NPN transistor Q ₁ is the second power source V _REF.
The potential of the NPN transistor Q ₁ is turned on and the constant current flows through the constant current output load I ₀ .

Here, the source / drain power source of the series circuit of the P-channel enhancement type field effect transistor Q ₂ and the N-channel enhancement type field effect transistor Q ₃ is the second power source (constant voltage power source) V _REF.
The reason is to stabilize the base current of the NPN transistor Q ₁ and make the output load current I ₀ a constant current.

The second power source (constant voltage power source) V
_REF is a resistor and a diode (forward direction) to the first power supply V _CC
It is generally obtained by connecting and in series, grounding the cathode of the diode, and dividing the voltage from the connection point between the resistor and the diode.

Further, the value of the input signal voltage V _IN (threshold logic circuit), it is common to select the half of the second supply voltage V _{RE F.}

[0008]

According to the above-mentioned prior art
In the current switch circuit, the input signal voltage V_INValue of (theory
The threshold of the logic circuit) is the respective field effect transistor
Q of Ta₂・ Q₃Higher than the sum of the absolute values of the pinch-off voltage of
The second power supply (constant voltage power supply) because it needs to be set
V_REFIs too low, the input signal voltage V_INIs also low
The input signal voltage V_INThe value of
Each field effect transistor Q₂・ Q ₃The pincio
Voltage below the absolute value of the
Hansment type field effect transistor Q₂And N channel
Ru enhancement type field effect transistor Q₃And
Will not turn off and on, and will not operate as a current switch.
There is a drawback that

An object of the present invention is to eliminate this drawback. Even if the voltage of the second power supply (constant voltage power supply) V _REF is set low and the value of the input signal voltage V _IN is also set low,
It is to provide a current switch circuit that operates safely.

[0010]

[Means for Solving the Problems]
It is also achieved by these means. The first means is the second
Power supply (constant voltage power supply) (V_REF) Is P channel enhancement
Sement type field effect transistor (Q₂) Source
Continued, this P-channel enhancement type field effect
Transistor (Q₂) Drain is N channel enhancement
Element type field effect transistor (Q₃) Drain
Connected to this N-channel enhancement type electric field
Effect transistor (Q₃) Source is connected in the forward direction
The first diode (V₁) Is grounded through
P-channel enhancement type field effect transistor
(Q₂) Gate and N channel enhancement described above
Type field effect transistor (Q₃) With the gate
Connected to the input voltage signal terminal (V_IN), The above
P-channel enhancement type field effect transistor
(Q₂) Is the back gate of the first power source (V_CC) Connected to
The N-channel enhancement type field effect transistor
Langista (Q₃) Back gate is grounded,
P-channel enhancement type field effect transistor
(Q₂) Drain and the N-channel enhancement described above
Type field effect transistor (Q₃) With the drain
Continuation point is NPN transistor (Q₁) Connected to the base
This NPN transistor (Q₁) Is the first emitter
Resistance (R ₁) Through said first diode
(V₁) Of the first power source (V
_CC) And the NPN transistor (Q₁) Collector and
Between the constant current output load (I₀) Is connected to the current
It is a switch circuit.

The second means is the same as the first means.
Power source V _CC is grounded through a series circuit of a _second resistor R ₂ and a second diode D ₂ connected in the forward direction,
The connection point between the resistor R ₂ and the second diode D ₂ is the second power supply (constant voltage power supply) V _REF, and the second power supply (constant voltage power supply) V _REF must be prepared independently. Without
It is rational.

The third means is the same as the first means.
The anode of the power supply V _CC, connected to the series circuit of the third diode D ₃ is connected to the second resistor R ₂ and forward, the cathode of the third diode D ₃ of the first diode D ₁ The second power source (constant voltage power source) V _REF is connected to the second resistor R ₂ and the third diode D ₃ , and the operation is the same as that of the second means. , The number of diodes used can be reduced.

[0013]

In any of the above means, the second power source (constant voltage power source) V _REF is the source / drain circuit of the P-channel enhancement type field effect transistor Q _{2 and} the source of the N-channel enhancement type field effect transistor Q ₃ . .Drain circuit and first diode D ₁
Since it is grounded via a series circuit with, the threshold value V _T of the logic level input signal is V _T = (V _REF −V _F ) / 2 + V _F = (V _REF + V _F ) / 2 V _F is the forward voltage drop of the first diode D ₁ . And becomes 1 / of the second power supply (constant voltage power supply) V _REF
2 by V _F / 2, which is higher than the threshold value shown in FIG. 5 by V _F / 2, and is higher than the sum of the absolute values of the pinch-off voltages of the field effect transistors Q ₂ and Q ₃ , Since the margin of the threshold value becomes large, the operation of the current switch circuit becomes stable.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Current switch circuits according to three embodiments of the present invention will be described below with reference to the drawings.

[0015]First embodiment See Fig. 1 Q₂Is a P-channel enhancement type field effect transistor
It ’s Jista, Q₃Is N-channel enhancement type
It is a field effect transistor, and each drain has a phase
P-channel enhancement type field effect connected to each other
Fruit transistor Q₂The source of the
Source) V_REFConnected to the N channel enhancement
Type field effect transistor Q₃The source is the first Dio
Mode D₁Is connected to the anode of the
De D₁The cathode of is grounded. Two field effect g
The gates of the transistors are connected together and the
Child V _INIt is said that. In addition, P channel enhancement
Field-effect transistor Q₂Back gate is first
Power supply V_CCConnected to the N channel enhancement
Type field effect transistor Q₃The back gate of is grounded
ing. P-channel enhancement type field effect tiger
Register Q₂Drain and N-channel enhancement men
Type field effect transistor Q₃The connection point with the drain of
NPN transistor Q₁Connected to the base of. N
PN transistor Q₁The emitter of the first resistor R₁Through
And then the first diode D₁Connected to the anode of
It First power supply V_CCIs a constant current load (output load) I₀Through
Then, the NPN transistor Q₁Connected to the collector of
There is.

When a high level input signal voltage is applied to the input voltage signal terminal V _IN , only the N-channel enhancement type field effect transistor Q ₃ is turned on and the NPN
The base of transistor Q ₁ is down NPN transistor Q ₁ to the ground potential is turned off, the constant current does not flow to the constant current output load I _0. On the other hand, when a low level input signal voltage is applied to the input voltage signal terminal V _IN , only the P-channel enhancement type field effect transistor Q ₂ is turned on and the base of the NPN transistor Q ₁ is at the potential of the second power supply V _REF . Up, the NPN transistor Q ₁ is turned on, and a constant current flows through the constant current output load I ₀ .

This is the constant current load (output load) I₀Is I₀= (V_REF-(Q₂ON voltage)-(Q₁V_BE)-(D₁Forward voltage)) / R₁ However, V_BEIs the base-emitter voltage. Next to
Input voltage signal V_INLogic level threshold V_TIs V_T=
V_REF/ 2 + V _F/ 2, diode D₁Exists
V compared to the threshold when there is no_F/ 2 because it rises,
The operation of the current switch circuit becomes stable.

[0018]Second embodiment See FIG. 2. In this embodiment, the first power source V_CCThe second power source
(Constant voltage power supply) V_REFIs the one that is getting the first
Source V_CCIs the second resistance R₂And the second diode D ₂With
Grounded via a series circuit, second resistor R₂And the second die
Aether D₂The voltage at the connection point with the second power source (constant voltage
Source) V_REFIs used as. Second Daio
Forward voltage drop is the forward voltage drop of the first diode.
It is natural that it is necessary to be larger than the bottom, but the second
Diode D₂The value of the forward voltage drop of
Pressure V_REFIs held at a constant voltage. Other operations are the 1st real
Same as the example.

Third Embodiment See FIG. 3 In the present embodiment, the first point of the voltage in the _second diode D ₂ that matches the anode voltage of the first diode D ₁ is the first point.
The second diode D ₂ is connected to the anode of the diode D ₁ to reduce the cost of the second diode D ₂ . The operation is exactly the same as in the first and second embodiments.

Fourth Embodiment See FIG. 4 This embodiment is a modification of the third embodiment. Since the current switch circuit according to the present invention operates in an analog manner, a portion shown by a one-dot chain line in the figure is added for coupling with a digital circuit, except that the input voltage signal V _IN is inverted. This is the same as the third embodiment.

[0021]

As described above, in the current switch circuit according to the present invention, the source / drain circuit of the P-channel enhancement field effect transistor Q ₂ and the N-channel enhancement field effect transistor Q 2.
_Since the second power source (constant voltage power source) V _REF is applied to the series circuit of the source / drain circuit ₃ and the first diode D ₁ , the value of the input voltage signal V _IN is the second power source ( A constant voltage power supply) has a margin in comparison with 1/2 (the value of the input voltage signal V _IN in the conventional technique) of V _REF , and the operation of the current switch circuit is stabilized.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a current switch circuit according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram of a current switch circuit according to a second embodiment of the present invention.

FIG. 3 is a circuit diagram of a current switch circuit according to a third embodiment of the present invention.

FIG. 4 is a circuit diagram of a current switch circuit according to a fourth embodiment of the present invention.

FIG. 5 is a circuit diagram of a current switch circuit according to a conventional technique.

[Explanation of symbols]

V _IN Input voltage signal terminal V _CC First power supply V _REF Second power supply (constant voltage power supply) I ₀ Constant current output load Q ₁ NPN transistor Q ₂ P channel enhancement type field effect transistor Q ₃ N channel enhancement type field effect transistors Q ₄ P-channel enhancement type field effect transistor Q ₅ N-channel enhancement type field effect transistor D ₁ constituting the diode D ₃ of the first diode D ₂ second diode D ₂₁ to D ₂₃ second diode third diode D _{31 to} D ₃₂ Third diode configuration Diode

Claims (3)

[Claims] 1. A second power supply (constant-voltage power supply) (V _REF) is connected to the source of P-channel enhancement type field effect transistor (Q _2), the drain of the P-channel enhancement type field effect transistor (Q ₂₎ is connected to the drain of N-channel enhancement type field effect transistor (Q _3), the source of the N-channel enhancement type field effect transistor (Q ₃₎ is via a first diode connected in the forward direction (V ₁₎ The gate of the P-channel enhancement type field effect transistor (Q ₂ ) and the gate of the N-channel enhancement type field effect transistor (Q ₃ ) are connected to each other to form an input voltage signal terminal (V _IN ). the P-channel enhancement type field effect transistor (Q ₂ The back gate is connected to a first power supply (V _CC), the back gate of the N-channel enhancement type field effect transistor (Q ₃₎ is grounded, and the drain of the P-channel enhancement type field effect transistor (Q ₂₎ the connection point of the drain of N-channel enhancement type field effect transistor (Q ₃₎ is connected to the base of the NPN transistor (Q _1), the emitter is a first resistance of the NPN transistor (Q ₁₎ a (R ₁₎ Is connected to the anode of the first diode (V ₁ ) via the first power source (V _CC ) and the NPN transistor (Q
A current switch circuit characterized in that a constant current output load (I ₀ ) is connected between the collector of ₁ ) and the collector. 2. The first power supply (V _CC ) is grounded via a series circuit of a _second resistor (R ₂ ) and a second diode (D ₂ ) connected in the forward direction. , The connection point between the second resistor (R ₂ ) and the second diode (D ₂ ) is the second power source (constant voltage power source)
2. The current switch circuit according to claim 1, wherein the current switch circuit is (V _REF ). 3. The first power supply (V _CC ) is connected to a series circuit of a _second resistor (R ₂ ) and a third diode (D ₃ ) connected in the forward direction, The cathode of the diode (D ₃ ) is connected to the anode of the _first diode (D ₁ ), and the connection point between the second resistor (R ₂ ) and the third diode (D ₃ ) is The second power source (constant voltage power source)
(V _REF ), a current switch circuit.