JPH0521444B2 - - Google Patents

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a current mirror circuit, and particularly to a MOS
It concerns a monolithic current mirror circuit made of transistors.

[Conventional technology]

A current mirror circuit is one of the main circuits of an analog circuit, as it is used as a constant current source of an operational amplifier or as a load of a differential amplification stage. An example of a conventionally commonly used current mirror circuit is shown in FIG. In the same figure, the current flowing from output terminal 3 is I ₀
is determined by the current value of the constant current source and the shape ratio of MOS transistors Q7 and Q8, but the disadvantage is that MOS transistor Q8 is subjected to a channel length modulation effect due to voltage fluctuations at output terminal 3, and current I ₀ changes. There is. In order to eliminate this drawback, it is sufficient to prevent voltage fluctuations at the output terminal 3 from reaching the MOS transistor Q8.

FIG. 3 shows a conventional cascade current mirror circuit that improves this drawback. In Fig. 3, the voltage fluctuation at the output terminal 3 is isolated by the MOS transistor Q11, so the MOS transistor Q
The drain-source voltage of the output terminal 4 becomes constant, and the current flowing from the output terminal 4 becomes stable regardless of the terminal voltage. Similarly, in the improved Wilson current mirror circuit shown in FIG. 4, the current flowing from the output terminal 6 is stabilized without depending on the terminal voltage.

[Problem that the invention seeks to solve]

However, in the conventional cascade current mirror circuit described above, the MOS transistor on the reference current input side is diode-connected and connected in series, so the voltage at the point connected to the constant current source is more than twice V _DS sat. Analog-digital mixed LSI with microcontroller interface is required.
(e.g. A/D converter, D/A converter)
Reference input side when operation with a single 5V power supply is required.
The disadvantage is that the number of transistors that can be connected in series with the MOS transistor is at most one or two, which limits the application of the current mirror circuit. Also, in the improved Wilson current mirror circuit, the voltage at the point connected to the constant current source is
It has the disadvantage that it requires more than twice the V _DS sat and is subject to similar restrictions.

[Means for solving problems]

The current mirror circuit of the present invention includes first and second transistors whose gates are commonly connected, a third transistor whose drain and gate are connected to the drain of the first transistor, and a drain of the second transistor. a fourth transistor whose drain is connected to the fourth transistor; a fifth transistor whose gate is connected to the drain of the fourth transistor and whose source is connected to the gate of the fourth transistor; and a fifth transistor whose drain is connected to the source of the fifth transistor. connected third
a sixth transistor whose gate is connected to the gate of the transistor, the shape ratio of the first and second transistors and the shape ratio of the third and fourth transistors are set equal;
and the sixth transistor are set to have the same shape.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 shows a circuit diagram of one embodiment of the present invention. MOS transistors Q1 and Q2 (hereinafter MOS is omitted) have the same element shape (gate length L, gate width W).
It is a constant current source whose gate is biased at a constant voltage from terminal 1. The transistor Q3 is a diode-connected Nch transistor whose drain and gate are short-circuited, and generates a voltage that biases the gate of the transistor Q6 by the current flowing from the transistor Q1. Further, the transistor Q6 is composed of an Nch transistor, and is a constant current source for flowing the output current _I0 . Transistor Q4 is transistor Q2
It is composed of N-channel transistors with the same element size as , and is paired with transistor Q2 to form an inverter. Transistor Q5 is composed of an Nch transistor, and is used to isolate transistor Q6 from voltage fluctuations at output terminal 2, and is fed back by an inverter composed of transistors Q2 and Q4.

Next, the operation will be explained. The current from transistor Q1 biased by terminal 1 is converted to a voltage by transistor Q3 biasing the gate of transistor Q6. Transistor Q1
The same voltage is biased from terminal 1 to transistor Q2, which has the same element shape as transistor Q2.
The same current as 1 flows. Transistor Q4 is Q3
The gate of transistor Q4 must be biased with the same voltage as the gate of transistor Q3 in order to draw the current flowing from transistor Q2. This operation is performed by a feedback system composed of transistors Q2, Q4, and Q5. Therefore, the drain of transistor Q6 has the same voltage as the drain of transistor Q3, and if transistors Q3 and Q6 have the same element shape, the same current flows. Furthermore, since the voltage change at the output terminal 2 is isolated by the transistor Q5 which is fed back by the inverter composed of the transistors Q2 and Q4, the drain voltage of the transistor Q6 has no effect on the voltage change at the output terminal 2. The output current I ₀ becomes stable against voltage changes at the output terminal 2. Furthermore, in the conventional cassgate current mirror circuit, the transistor corresponding to transistor Q5 is only biased with a constant voltage, but in the present invention, since feedback is applied by an inverter, the impedance at the output terminal is Furthermore, since the amplification factor of the inverter is multiplied, it becomes very high. Furthermore, the configuration on the input current side has only one transistor whose drain and gate are short-circuited, and if a depletion type transistor is used as the transistor Q5, it can be operated even at a low voltage, increasing the degree of freedom in terms of application.

〔Effect of the invention〕

As explained above, the present invention is based on a current source on the mirror side.
By cascading a MOS transistor with a transistor fed back by an inverter, the impedance at the output terminal can be greatly increased, and the output current is therefore stable against voltage changes at the output terminal. Become. Furthermore, since it can operate even at low voltages, the degree of freedom in applications increases. Furthermore, it is clear that the present invention operates in the same way even if the conductivity type of each transistor is reversed and VDD and GND are switched, and a similar configuration can also be made using bipolar transistors.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram of an embodiment of the present invention, Fig. 2 is a circuit diagram of a conventional current mirror circuit, Fig. 3 is a circuit diagram of a conventional cascade current mirror circuit, and Fig. 4 is a circuit diagram of a conventional improved Wilson circuit. FIG. 3 is a circuit diagram of a current mirror circuit. Q1-Q12...MOS transistor, 1...
Bias terminal, 2, 3, 4, 5...output terminal.

Claims (1)

[Claims] 1 first and second transistors whose gates are commonly connected; a third transistor whose drain and gate are connected to the drain of the first transistor; and whose drain is connected to the drain of the second transistor. a fourth transistor, and a fifth transistor whose gate is connected to the drain of the fourth transistor and whose source is connected to the gate of the fourth transistor.
and a sixth transistor whose drain is connected to the source of the fifth transistor and whose gate is connected to the gate of the third transistor, and the shape ratio of the first and second transistors and the third A current mirror circuit characterized in that the shape ratios of the and fourth transistors are set equal, and the shapes of the fifth and sixth transistors are set equal.