JPH05102765A - Gain control circuit - Google Patents

Abstract

PURPOSE:To provide the gain control circuit in which a gain of an amplifier is controlled over a wide range even at a high frequency band. CONSTITUTION:A current control transistor(TR) 7 and an amplifier circuit load 11 are connected in series to an amplifier TR 3 whose base receives an input signal together with a bias voltage. A current control TR 6 being a bypass circuit is connected in parallel to the current control TR 7 and the amplifier circuit load 11. The gain is controlled without controlling an amplifier current flowing to the amplifier TR 3 by controlling a current flowing to the amplifier circuit load 11.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a gain control circuit for a high frequency amplifier used in a receiver such as a pager.

[0002]

2. Description of the Related Art At present, in mobile communications such as pagers, the high frequency utilization of frequencies has been promoted with the rapid increase of users, which causes problems such as interference and reception interference due to intermodulation. ing. Therefore, in the high frequency amplifier, the reception interference is avoided by suppressing the gain to a necessary minimum with a gain control circuit or the like.

As an example of such a conventional gain control circuit, a configuration as shown in FIG. 4 is known. As shown in FIG. 4, the signal from the signal source 41 is applied to the base of the first transistor 45 via the gain control impedances 43 and 44 after applying the bias voltage from the bias power supply 42, and the first By controlling the on / off of the transistor 45, the second transistor 47 and the amplifier circuit load 48, which are connected in series with the first transistor 45 and are connected to the power supply 46, are driven and controlled. .. By properly selecting the resistance values R1 and R2 of the impedances 43 and 44, the impedance ratio R2 / (R1 + R2) is changed to perform gain control.

As another example of the conventional gain control circuit, a configuration as shown in FIG. 5 is known. In this example, as is apparent from FIG. 5, a variable current power supply 49 is provided between the emitter of the first transistor 45 and the ground instead of the impedances 43 and 44 in the gain control circuit of the conventional example shown in FIG. And the bypass capacitor 50 are connected in parallel with each other, and other configurations are similar to those of the conventional example. The current variable power supply 49 controls the current of the entire amplifier that passes through the amplifier circuit load 48, the second transistor 47, and the first transistor 45 from the power supply 46, thereby performing gain control.

[0005]

However, in the former configuration shown in FIG. 4, gain control is performed based on the impedance ratio by inserting an element such as a resistor on the signal line. Even if the signal is passed without gain control, the signal will be attenuated by the resistance, etc., and therefore the amplifier gain will not be fully utilized, and especially in the high frequency band of several hundred MHz. However, there is a problem that it is difficult to obtain high damping.

On the other hand, in the latter configuration shown in FIG. 5, since the gain control is performed by controlling the current of the entire amplifier, the current flowing through the amplifying transistor is reduced by the gain control and the noise is reduced. There was a problem that the index (NF) deteriorated.

The present invention solves the problems of the conventional example as described above, and provides a gain control circuit capable of controlling the gain of an amplifier over a wide range even in a high frequency band. It is intended.

[0008]

In order to achieve the above object, the present invention provides an amplifying transistor in which an input signal is applied to a base together with a bias voltage, and a current control connected in series to the amplifying transistor. Transistor and an amplifier circuit load, and a bypass circuit connected in parallel to the current control transistor and the amplifier circuit load, and by controlling the current flowing through the amplifier circuit load, the amplifier transistor The configuration is such that gain control is performed without limiting the amplified current that flows.

[0009]

Therefore, according to the present invention, the current flowing through the amplifying transistor is the current flowing through the current controlling transistor and the amplifying circuit load plus the current flowing through the bypass circuit. Even if the current is controlled, the current flowing through the amplifying transistor can be held at a predetermined value without being affected by this current control, so that the amplified current will not be attenuated more than necessary and the Gain control can be performed. In this way, the amplifier gain can be fully utilized and the gain control can be reliably performed even in the high frequency band.

[0010]

(Embodiment 1) A first embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a circuit diagram showing a gain control circuit according to the first embodiment of the present invention. As shown in FIG. 1, the gain control circuit includes an amplifier 1 and a current controller 2. In the amplification unit 1, a signal from the signal source 4 is input to the base of the amplification transistor 3 after a bias voltage is applied by the bias power supply 5, and then the signal is input to the transistor 3
The emitter of is connected to ground. In the current controller 2, a pair of current controlling transistors 6 and 7 whose collectors and emitters are connected to each other constitutes a differential amplifier. A reference voltage is applied from the reference voltage power supply 8 to the base of the transistor 6, which is one of the bypass circuits, and a control voltage is applied from the control power supply 9 whose voltage can be adjusted, to the base of the other transistor 7. The collectors of the transistors 6 and 7 are both connected to the power supply 10, and the amplifier circuit load 11 is connected in series between the collector of the transistor 7 and the power supply 10. Therefore, the transistor 6 which is a bypass circuit is connected. It is connected in parallel to the transistor 7 and the amplifier circuit load 11. The emitters of the transistors 6 and 7 are connected to the collector of the transistor 5.

In the above configuration, the current I flowing through the amplifier circuit load 11 is within a certain range of the voltage difference δV between the reference voltage and the control voltage, as shown in the graph of FIG. In some cases, there is an inverse proportional relationship, and when it is outside this range, it takes a constant value.
That is, when the control voltage is higher than the reference voltage,
Most of the collector current of the transistor 3 flows to the amplifier circuit load 11, and the gain becomes maximum. If the control voltage is lowered from this state, the current I flowing through the amplifier circuit load 11 will gradually decrease, whereby the gain of the amplifier circuit will be reduced. Further, when the control voltage is lowered so that the control voltage becomes sufficiently lower than the reference voltage, the current I flowing through the amplifier circuit load 11 is cut, and the gain is thereby minimized. In this case, since the gain control circuit is configured as a cascode amplifier, good gain control can be performed even in the high frequency band.

(Second Embodiment) A second embodiment of the present invention will be described below with reference to the drawings.

FIG. 3 is a circuit diagram showing a gain control circuit according to the second embodiment of the present invention. In this embodiment, as shown in FIG. 3, the amplifier 1 and the current controller 2 are included, and the current controller 2 is also configured as a cascode amplifier, which is similar to the first embodiment. It is the same. The present embodiment is characterized in that the current control unit 2 includes an amplifier circuit load 11 and a voltage control transistor 12 that are connected in series to the power supply 10 and a bypass circuit that is connected in parallel with the power supply 10. It is composed of a certain voltage controlled current power supply 13, and the voltage from the power supply 10 is applied to the base of the transistor 12.

In the above configuration, the current flowing through the amplifier circuit load 11 is controlled based on the current value of the voltage controlled current power supply 13, so that the gain control can be performed as in the case of FIG. Become. In this case, as the control voltage applied to the voltage controlled current power supply 13, a voltage obtained by an automatic gain control circuit (not shown) is used.

In the embodiment described above, the current control unit 2 can be easily integrated into a circuit. In this case, for example, by using an individual element having a good noise figure as the transistor 3, In particular, it is possible to realize a high frequency amplifier having good gain control characteristics.
Further, it is obvious that the transistor 3 is not limited to an individual element and may be integrated with other circuit elements into an integrated circuit.

[0017]

As described above, according to the present invention,
The gain of the amplifier can be controlled over a wide range even in the high frequency band. Therefore, the noise figure can be improved, and when incorporated in a high frequency amplifier in a receiver for mobile communication such as a pager, interference due to interference and intermodulation can be eliminated.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a gain control circuit according to a first embodiment of the present invention.

FIG. 2 is a current control characteristic diagram of the gain control circuit.

FIG. 3 is a circuit diagram showing a gain control circuit according to a second embodiment of the present invention.

FIG. 4 is a circuit diagram showing an example of a conventional gain control circuit.

FIG. 5 is a circuit diagram showing another example of a conventional gain control circuit.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 amplification part 2 current control part 3 amplification transistor 4 signal source 5 bias power supply 6 current control transistor 7 current control transistor 8 reference power supply 9 control power supply 10 power supply 11 amplification circuit load 12 current control transistor 13 voltage control current power supply

Claims (1)

[Claims] 1. An amplifying transistor to which an input signal is applied to a base together with a bias voltage, a current controlling transistor and an amplifying circuit load connected in series to the amplifying transistor, and these current controlling transistors and A bypass circuit connected in parallel to the amplifier circuit load, and controlling the current flowing through the amplifier circuit load to perform gain control without limiting the amplified current flowing through the amplifying transistor. A gain control circuit characterized by the above.