JPH0451781A - Video signal noise reduction circuit - Google Patents

Abstract

PURPOSE:To improve the reproduction picture quality of a video device such as a VTR by allowing a synthesis circuit to cancel noise included in an original video signal with the noise whose polarity is inverted and eliminating waveform distortion caused at leading and trailing of the original video signal in the case of the synthesis. CONSTITUTION:An original video signal S1 including noise S2 is given to a high pass filter 2, from which only high frequency components S2, S3, S4, they are given to a limiter 4, the components S3, S4 corresponding to the leading and trailing of the signal S1 are subject to amplitude limit at a level L, the components S3, S4 are detected and limiter pulses S7, S8 of unipolar pulses corresponding to the components S3, S4 respectively are outputted from the limiter 4. A time constant circuit 14 expands the width of the pulses S7, S8 into pulse widths T1', T2' to output mute pulses S9, S10. A polarity inversion circuit 6 inverts the polarity of the pulses S2, S3', S4' into a pulse S5 and a mute circuit 12 outputs only the pulse S2'. The level of the pulses S2', S2 is matched identically by using a resistor 8 and the pulses are cancelled at a synthesis circuit 10 to obtain a noise elimination processing video signal S6.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a video signal noise reduction circuit in video equipment such as a video tape recorder.

(Prior Art) FIG. 3 is a circuit diagram of a conventional video signal noise reduction circuit, and FIG. 4 is a timing chart for explaining the operation of the reduction circuit. The reduction circuit shown in FIG. 3 includes a high-pass filter 2, a limiter 4, a polarity inversion circuit 6, a leveling resistor 8, and a synthesis circuit IO.

The high-pass filter 2 receives the original video signal S1 indicated by ■ in FIG. Note that, for convenience of explanation, the original video signal S1 is shown in a waveform as shown in (■) in FIG. The original video signal S1 includes noise S2. The high-pass filter 2 to which the original video signal Sl is input filters out the high frequency portions S3 . of the original video signal S1 as shown in FIG. S4 to noise S2
Extract and output along with. Here, ■ in FIG. 4 shows high frequency portions S3. Only S4 and noise S2 are illustrated, and illustration of other high frequency parts is omitted. this is,
While the processing in the high-frequency portion 53S4 of (■) in FIG. 4 at the rise and fall of the original video signal S1 is a problem to be described later in the conventional example, the other high-frequency portions are not included in the explanation of the problem. Since it is not particularly required, its illustration is omitted.

The limiter 4 has a fixed amplitude limit level L in the upper and lower directions, and the high frequency/part S from the high pass filter 2.
3, S4 is limited to an amplitude below the vibration section limit level L, and these are outputted as amplitude limit output S3' as shown in ■ in Fig. 4.
, S4'. The polarity inversion circuit 6 converts the amplitude limited output S3'S4' from the limiter 4 into a noise S2.
At the same time, the polarity is inverted, and these are outputted as a polarity inverted output S5 (collectively including S2', S3'', and S4'') as shown in (■) in FIG. The polarity inversion output S5 of the polarity inversion circuit 6 is applied to the synthesis circuit 10 in a state where the level of the noise S2' is adjusted to the level of the noise S2 shown in FIG.

The synthesizing circuit 10 synthesizes the original video signal S1 shown in FIG.

That is, in the level matching resistor 8, the polarity inversion output S5
Among S2', S3'', and S4'' that make up the signal, the level of noise 82' (polarity inversion noise) is adjusted to be equal to the level of noise S2 (polarity non-inversion noise) in the original video signal. Therefore, in the synthesis circuit 10, the non-inverted polarity noise S2 and the inverted polarity noise S2' in the original video signal cancel each other out, so that the synthesized output S6 is a noise-removed video signal S6 that does not contain the noise S2. It will be outputted from the synthesis circuit IO as.

(Problems to be Solved by the Invention) By the way, in the conventional video signal noise reduction circuit described above, the synthesis circuit 10 combines the original video signal Sl shown in ■ in FIG.
When combining the polarity inversion output S5 of ■ in the same figure, the polarity non-inversion noise S2 of the original video signal S1 and the polarity inversion noise S
2' have inverted polarities and the same level, so in this synthesis circuit 10, the non-inverted polarity noise S2 and the inverted polarity output S2' are canceled out as described above, and the problem is solved. However, the original video signal S shown in ■ in Figure 4
1, in its rising and falling parts, the rising and falling of the polarity inverted output S5, respectively,
Since the waveforms do not correspond to the S3" and S4" portions, when they are synthesized by the synthesis circuit 10, as shown in (J) in FIG. 4, the synthesized output S5 is Waveform distortion Hl, H at the rising and falling parts
2.

If the composite output S6 having such waveform distortions Hl and H2 is played back as it is on the playback screen of a video tape recorder as the noise-removed video signal S6, it will be different from the original video signal Sl even though the noise has been removed. Since the video signal S6 is reproduced with a different waveform, there is a problem that the image quality of the reproduced screen is naturally degraded.

Therefore, the present invention enables a synthesis circuit to reliably cancel out the noise contained in the original video signal with noise whose polarity is inverted, and at the same time to eliminate f-co By eliminating the above-mentioned waveform distortion, the synthesis circuit produces a synthesized output that is faithful to the waveform of the original video signal.
In other words, by making it possible to obtain a noise-removed video signal,
The purpose is to improve the image quality of the playback screen.

(Means for Solving the Problem) In order to achieve such an object, the video signal noise reduction circuit of the present invention includes a high-pass filter, a limiter, a time constant circuit, a polarity inversion circuit, a mute circuit, and a synthesis circuit. The high-pass filter inputs the original video signal and extracts and outputs the high frequency part of the original video signal corresponding to the frequency band of noise contained in the original video signal. has a certain amplitude limit level, and outputs the high frequency part from the high-pass filter from one output section with the amplitude limited to the amplitude below the amplitude limit level, while from the other output section The limit pulse is outputted at timings corresponding to the falling edge and falling edge of the original video signal, and the time constant circuit inputs the limit pulse, and
The limit pulse is extended in pulse width and output as a mute pulse, and the polarity inversion circuit inverts the polarity of the high frequency partial output from one output section of the limiter and outputs it. Yes, the mute circuit mutes the high frequency part output from the polarity inversion circuit whose polarity has been inverted in response to the input timing of the mute pulse and in accordance with the pulse width, and the synthesis circuit is a mute circuit. The present invention is characterized in that the muted high-frequency partial output is combined with the original video signal, and the combined output is output as a noise-removed video signal.

(Operation) The high-pass filter that receives the original video signal extracts the high-frequency portion of the original video signal together with the noise contained in the original video signal and outputs the extracted signal. A limiter having a certain amplitude limit level outputs the high frequency part from one output section with the amplitude limited to the amplitude below the amplitude limit level, and outputs from the other output section the rise and fall of the original video signal. A limit pulse is output at the timing corresponding to each.

The time constant circuit inputs the limit pulse, expands the pulse width of the limit pulse, and outputs it as a mute pulse. The polarity inversion circuit inverts the polarity of the high frequency partial output from one output section of the limiter and outputs it.

The mute circuit mutes the high frequency portion output from the polarity inversion circuit whose polarity has been inverted in response to the input of the mute pulse and in accordance with the pulse width.

The synthesis circuit synthesizes the high-frequency partial output muted by the mute circuit into a video signal and outputs the result.

(Example) Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a circuit diagram of a video signal noise reduction circuit according to an embodiment of the present invention, and FIG. 2 is a timing chart for explaining the operation of the reduction circuit.
Portions corresponding to those in FIGS. 3 and 4 according to the conventional example are denoted by the same reference numerals, and detailed explanations of the parts corresponding to the same reference numerals will be omitted here.

In the noise reduction circuit of this embodiment, the limiter 4 has a constant amplitude limit level L as in the conventional example, and the high frequency portion from the high pass filter 2 is outputted from one output section below the amplitude limit level L. At the same time, limiter pulses S7 and S8 are output from the other output section at timings corresponding to the rising and falling edges of the original video signal Sl, as shown in ■ in Fig. 2.
A mute circuit I2 is provided between the polarity inversion circuit 6 and the level matching resistor 8, and a time constant circuit 14 is provided between the limiter 4 and the mute circuit 12. It is characterized by the fact that it was established.

That is, the original video signal Sl containing the noise S2 as shown by ■ in FIG.
, S 3 and S 4 are extracted from the high-pass filter 2 and output.

Each high frequency part S2 of ■ in the same figure. S3 and 54 are applied to the limiter 4, so that each high frequency portion 52S3 S4
Of these, the high frequency parts S3 and S4 corresponding to the rising and falling edges of the original video signal S1 are subjected to amplitude limitation by the limiter 4 at the amplitude limiting level shown in ■ in the same figure, and the high frequency parts S3 and S4 correspond to the rising and falling edges of the original video signal S1, respectively, and are amplitude limited to the amplitude limiting level shown in ■ in the same figure. It is outputted from one output section of the limiter 4 with such a waveform.

In this embodiment, in the limiter 4, the high frequency portions S3 . Detect S4,
In accordance with the detection, limiter pulse S7. Output S8. Note that this detection uses the amplitude limiting output output from one of the output sections when the original video signal S1 is amplitude limited at the rising and falling edges of the original video signal S1 in the limiter 4, and outputs it after shaping the pulse waveform. You can get it by doing.

The time constant circuit 14 controls each limit pulse S7. S8, and each limit pulse S7. The pulse widths of S8 are extended to TV and T2' so that they are longer than the widths T 1 and T2 of the high-frequency parts S 3 and S 4 shown in ■ in Fig. 2, respectively, and then these are used as mute pulses S9. Output as SIO.

The polarity inversion circuit 6 receives each high frequency portion S2 . S3'S4'
The polarity is inverted and the polarity is inverted and output as a polarity inverted output S5 (general term for S2', S3'', and S4'') as shown in Figure 2.

The mute circuit 12 outputs a high frequency partial output S3 of the polarity and transfer signal JS5 from the polarity inversion circuit 6 whose polarity has been inverted.
, S4'' in response to the respective input timings of the mute pulses S9 and SIO and their pulse widths TI' and T2'.
Mute in response.

As a result of this muting, the output from the mute circuit 12 is
As shown by ■ in FIG. 2, the polarity inverted portions S3' and S4'' are removed, and only the polarity inverted portion S2' is output. This polarity inverted portion S2' is the noise S2 in the video signal Sl. A noise S2' whose polarity is inverted with respect to
The level of the noise S2' is adjusted to the same level as that of the noise S2 by the resistor 8, and the synthesis circuit 1
By canceling the noise S2 of the original video signal Sl with 0, the noise-removed video signal S is output from the combining output S6 from which the noise S2 has been removed from the video signal Sl or from the combining circuit 10.
It is output as 6. Here, the feature of this embodiment is that during the output of the mute circuit 12, only the polarity inverted output S2' is outputted, as shown in ■ in FIG. 2, and the polarity inverted output S3'', Since "S4" is not output, in the synthesis by the synthesis circuit 10, the original video signal S
1 is the polarity inverted output S3'' from the mute circuit I2, S
4" eliminates waveform distortion.

As a result, in this embodiment, as shown in (■) in FIG. 2, the noise S2 is removed and the synthesized output S is free from waveform distortion.
6, that is, the noise-removed video signal St can be obtained.

(Effects of the Invention) As is clear from the above explanation, according to the present invention,
In the synthesis circuit, it is possible to reliably cancel out the noise contained in the original video signal with the noise whose polarity has been inverted, and at the same time, it is possible to cancel out the noise contained in the original video signal with the noise whose polarity has been inverted by the limiter, and at the same time to cancel the rise and fall of the original video signal whose amplitude has been limited by the limiter and whose polarity has been inverted by the polarity inversion circuit. Since the corresponding high frequency parts can be removed by the mute circuit in response to the input of the mute pulse from the time constant circuit, it is possible to cancel the noise in the original video signal with the polarity inversion noise in the synthesis circuit. In addition, it is possible to eliminate waveform distortion of the original video signal caused by high-frequency parts at the rise and fall of the original video signal, and as a result, the synthesis circuit outputs noise as a composite output that is faithful to the waveform of the original video signal. Now that a removed video signal can be obtained, it has become possible to improve the image quality of the playback screen.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of a video signal noise reduction circuit according to an embodiment of the present invention, and FIG. 2 is a timing chart for explaining the operation of the embodiment. FIG. 3 is a circuit diagram of a conventional video signal noise reduction circuit, and FIG. 4 is a timing chart for explaining the operation of the conventional example. 2...High pass filter, 4...Limiter, 6...
Polarity inversion circuit, 8. Level matching resistor, IO.. synthesis circuit, 12.. mute circuit, 14. time constant circuit.

Claims (1)

[Claims] (1) High-pass filter (2), limiter (4), time constant circuit (14), polarity inversion circuit (6), mute circuit (
12) and a synthesis circuit (10), and the high-pass filter (2) receives the original video signal and filters the original video signal according to the frequency band of noise included in the original video signal. The limiter (4) has a certain amplitude limiting level, and one output section extracts and outputs the high frequency portion from the high pass filter (2). While the output is limited to an amplitude below the limit level, the other output section outputs limit pulses at timings corresponding to the rise and fall of the original video signal, and the time constant circuit (14) The polarity reversing circuit (6) receives the limit pulse from one output part of the limiter (4) and outputs it as a mute pulse by extending the pulse width of the limit pulse. The mute circuit (12) outputs the high frequency partial output with its polarity inverted, and the mute circuit (12) outputs the high frequency partial output from the polarity inverting circuit in response to the input timing of the mute pulse. The synthesis circuit (10) synthesizes the high-frequency partial output muted by the mute circuit (12) with the original video signal, and
A video signal noise reduction circuit characterized in that the synthesized output is output as a noise-removed video signal.