JPH0438892A - Chip parts mounting method and printed wiring board - Google Patents

Chip parts mounting method and printed wiring board

Info

Publication number
JPH0438892A
JPH0438892A JP14513690A JP14513690A JPH0438892A JP H0438892 A JPH0438892 A JP H0438892A JP 14513690 A JP14513690 A JP 14513690A JP 14513690 A JP14513690 A JP 14513690A JP H0438892 A JPH0438892 A JP H0438892A
Authority
JP
Japan
Prior art keywords
chip component
solder
pad
printed wiring
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14513690A
Other languages
Japanese (ja)
Inventor
Yasuyuki Nakaoka
中岡 康幸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP14513690A priority Critical patent/JPH0438892A/en
Publication of JPH0438892A publication Critical patent/JPH0438892A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

PURPOSE:To prevent the occurrence of Manhattan defects and enable visual inspection and perform highly reliable connection by connecting only the electrodes at the longitudinal side and the bottom of a chip part to the pad through solder. CONSTITUTION:Solder 5 is supplied in advance to the pad 4 formed on a printed wiring board 3, and a chip part 1 is mounted. At this time, it is desirable that the electrode 2 of the chip part 1 and the pad 4 should accord with each other as far as possible, but they can be dislocated a little. The printed wiring board 3, where this chip part 1 is mounted, is heated making use of infrared rays, hot blast, or the condensing latent heat of steam, whereby the solder 5 is fused and the electrode 2 of the chip part 1 and the pad 4 are soldered. At the time of this heating, even if time difference occurs in fusion of solder 5 between two electrodes 2, an electrode 2 does not exist at the end face of the chip part 1, so fillets are not formed at the end face. Therefore, the generative moment of Manhattan defects do not occur, and Manhattan defects do not occur.

Description

【発明の詳細な説明】 [産業上の利用分野〕 この発明は、チップ部品を印刷配線板に表面実装する際
の実装方法及び印刷配線板に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a mounting method and a printed wiring board for surface mounting chip components on a printed wiring board.

[従来の技術] 第7図は従来のチップ部品の一例を示す斜視図であり、
図において、(1)はチップ部品、(2)はチップ部品
(1)の端面(2a)及び端面に連結した上面(2b)
、下面(2C)、及び側面(2d)に形成された電極で
ある。この電極(2)は、通常はんだが濡れるAg−P
dで形成されている。また2第8図は従来のチップ部品
の他の例を示す斜視図であり、電[!(2)はチップ部
品+1+の端面(2a)及び端面に連結した上面(2b
)及び下面(2c)に形成されている。さらに、第9図
は例えば特開昭61−187204号公報に示された従
来のチップ部品の斜視図であり、電極(2)はチップ部
品+11の上面(2b)及び下面(2c)に形成されて
おり、第8図に示すチップ部品(11の端面の電極部分
(2a)を機械的に除去している。
[Prior Art] FIG. 7 is a perspective view showing an example of a conventional chip component.
In the figure, (1) is a chip component, and (2) is an end surface (2a) of the chip component (1) and an upper surface (2b) connected to the end surface.
, the lower surface (2C), and the electrodes formed on the side surface (2d). This electrode (2) is made of Ag-P, which is usually wetted by solder.
It is formed by d. FIG. 8 is a perspective view showing another example of a conventional chip component. (2) is the end surface (2a) of the chip component +1+ and the upper surface (2b) connected to the end surface.
) and the lower surface (2c). Furthermore, FIG. 9 is a perspective view of a conventional chip component disclosed in, for example, Japanese Unexamined Patent Publication No. 187204/1983, in which electrodes (2) are formed on the upper surface (2b) and lower surface (2c) of the chip component +11. The electrode portion (2a) on the end face of the chip component (11) shown in FIG. 8 was mechanically removed.

チップ部品(目は印刷配線板上に形成されたパッドとは
んだ付けにより接合される。パッド上にあらかじめはん
だを供給しておき、このはんだを加熱、溶融することに
よりはんだ付は接合する。
Chip parts (the eyes are joined to pads formed on a printed wiring board by soldering. Solder is supplied onto the pads in advance and the solder is heated and melted to perform soldering.

第10図はチップ部品fil を印刷配線板に実装する
様子を示すチップ部品(1)長手方向の断面図であり、
チップ部品(1)の端面に形成された電極端面(2a)
にはんだが濡れた際に働く力を説明している9図におい
て、(3)は印刷配線板、(4)はパッド、(5)はは
んだである。
FIG. 10 is a longitudinal sectional view of a chip component (1) showing how the chip component fil is mounted on a printed wiring board;
Electrode end face (2a) formed on the end face of the chip component (1)
In Figure 9, which explains the force that acts when solder gets wet, (3) is the printed wiring board, (4) is the pad, and (5) is the solder.

現在では、チップ部品[11などの電子部品を印刷配線
板(3)に搭載しておき、部品搭載済の印刷配線板(3
)を−括で全体加熱してはんだ付けする−括りフローは
んだ付けが、基板実装ラインの主流となっている。
Currently, electronic components such as chip components [11] are mounted on printed wiring boards (3), and electronic components such as chip components [11]
), which is soldered by heating the entire part in a bracket, is the mainstream flow soldering in board mounting lines.

次に実装方法について第1O図及び第11図に基いて説
明する。印刷配線板(3)に形成されたパッド(4)上
にあらかじめはんだ(5)を供給しておく、この後はん
だ(5) を加熱、溶融して、チップ部品(11をパッ
ド(4)に接合する。この時、はんだ(5)が溶融して
電極端面(2a)に濡れると、はんだ(5)の表面張力
によってモーメントMが発生する。このモーメントMは
、はんだ(5)の表面張力なγ1、はんだ(5)と電極
端面(2a)との接触角をθ、はんだ(5)とチップ部
品(1)の端面との接触長さをhとすると、 M=hxy、sinθ となる。
Next, a mounting method will be explained based on FIGS. 1O and 11. Solder (5) is supplied in advance onto the pad (4) formed on the printed wiring board (3). After this, the solder (5) is heated and melted to attach the chip component (11) to the pad (4). At this time, when the solder (5) melts and wets the electrode end surface (2a), a moment M is generated due to the surface tension of the solder (5).This moment M is caused by the surface tension of the solder (5). If γ1 is the contact angle between the solder (5) and the electrode end surface (2a), and θ is the contact length between the solder (5) and the end surface of the chip component (1), then M=hxy, sin θ.

2つの電!(21に対向する2つのパッド(4)上のは
んだ(5)が溶融する時間に差が生じた時、上記モーメ
ントMによりチップ部品(1)が立ち上がり、他方の電
極(2)が全く接合されず、第11図のようなマンハッ
タン不良が生じてしまう。
Two electricity! (When there is a difference in the melting time of the solder (5) on the two pads (4) facing each other, the chip component (1) rises due to the moment M, and the other electrode (2) is completely bonded. First, a Manhattan defect as shown in FIG. 11 occurs.

チップ部品(1)は印刷配線板(3)と比較して熱容置
が小さいため、−括りフローはんだ付けを行なう際にチ
ップ部品(1)の昇温速度がはんだ(5)より速くなる
。このため、パッド(4)上にあらかじめ供給しておい
たはんだ(5)は主にチップ部品(1)からの熱伝達に
より溶融することになる。従って、チップ部品(1)の
搭載時の位置ずれが生じて、2つのfly+21 にお
けるチップ部品f+1とはんだ(5)の接触面積が異な
ると、2つのパッド(4)上のはんだ(5)は溶融する
時間に差が生じてしまう、これがマンハッタン不良が生
じる主な原因と考えられる。
Since the chip component (1) has a smaller heat capacity than the printed wiring board (3), the temperature increase rate of the chip component (1) is faster than that of the solder (5) when performing negative flow soldering. Therefore, the solder (5) previously supplied onto the pad (4) will be melted mainly due to heat transfer from the chip component (1). Therefore, if the chip component (1) is misaligned when it is mounted and the contact area between the chip component f+1 and the solder (5) differs in the two fly+21, the solder (5) on the two pads (4) will melt. This is thought to be the main cause of Manhattan defects.

[発明が解決しようとする課題] 従来のチップ部品の実装方法は以上のように構成されて
おり、電子機器のコンパクト化を達成するため、チップ
部品(1)は−層小形になってきている。チップ部品(
1)が小形になると、自重が軽くなり、第7図、第8図
に示すようなチップ部品i11 はモーメントM (h
xγ+ sinθ)によって立ち上がりやすくなる。こ
のため、マンハッタン不良が多く発生すると共に、チッ
プ部品+11が小形のため不良修正も困難であるなどの
間!i、−p、があった。
[Problem to be solved by the invention] The conventional chip component mounting method is configured as described above, and in order to achieve the compactness of electronic devices, the chip component (1) is becoming smaller in size. . Chip parts (
1) becomes smaller, its own weight becomes lighter, and the chip component i11 as shown in FIGS. 7 and 8 has a moment M (h
xγ+sinθ) makes it easier to rise. For this reason, many Manhattan defects occur, and it is difficult to correct defects because the chip component +11 is small! There was i, -p.

また、第9図に示すチップ部品(1)は長手方向の端面
に電極が形成されておらず、マンハッタン不良はほとん
ど発生しないのであるが、側面と端面にフィレットがな
いため、はんだ付は後の目視検査が行ない難い、さらに
、搭載時に部品の位置がわずかにずれると5はんだ溶融
時に自己修正されるというセルファライニング効果も少
なくなるので、はんだ付は後の部品の位置ずれ不良が頻
出するなどの問題点もあった。
In addition, the chip component (1) shown in Figure 9 does not have electrodes formed on the longitudinal end faces, so Manhattan defects hardly occur, but since there are no fillets on the side and end faces, soldering is done later. Visual inspection is difficult to perform, and furthermore, the self-lining effect, in which a slight misalignment of a component during mounting is self-corrected when the solder melts, is also diminished, so soldering can lead to frequent misalignment of components later. There were also problems.

この発明は上記のような問題点を解消するためになされ
たもので、小形のチップ部品においてもマンハッタン不
良の発生を防止でき、目視検査も行なうことができ、信
顛性の高い接続ができるチップ部品の実装方法及び印刷
配線板を得ることを目的とする。
This invention was made to solve the above-mentioned problems, and it is possible to prevent the occurrence of Manhattan defects even in small chip parts, to enable visual inspection, and to create a chip that can be connected with high reliability. The purpose is to obtain a component mounting method and a printed wiring board.

[:a題を解決するための手段コ この発明の請求項1の究明に係るチップ部品の実装方法
は、チップ部品の長手方向の側面の電極と下面の電極の
みをはんだを介してパッドにF!i続したものである。
[: Means for Solving Problem A] The method for mounting a chip component according to claim 1 of the present invention is to attach only the electrodes on the longitudinal side surfaces and the electrodes on the bottom surface of the chip component to the pads via solder. ! It is a continuation of i.

また、この発明の11求項2の発明に係る印刷配線板は
、チップ部品の長手方向のパッドの長さをA、バンドの
間隔をG、チップ部品の一端面から他端面までの長さを
Lとする時、 2A+G≦L としたものである。
Further, in the printed wiring board according to the invention of claim 11 of the present invention, the length of the pad in the longitudinal direction of the chip component is A, the interval between the bands is G, and the length from one end surface to the other end surface of the chip component is When L, 2A+G≦L.

[作用] この発明の請求項1の発明におけるチップ部品の実装方
法は、チップ部品の長手方向の電極端面がパッドとの接
続に寄与せず、端面にはんだフィレットがないため、マ
ンハッタン発生の促進モーメントが生じない。
[Function] In the method for mounting a chip component according to the invention of claim 1 of the present invention, since the electrode end surface in the longitudinal direction of the chip component does not contribute to connection with the pad and there is no solder fillet on the end surface, the acceleration moment for Manhattan generation is reduced. does not occur.

この発明の請求項2の発明における印刷配線板は、はん
だの溶融時にずれにくくなり、チップ部品がパッドの外
側より内側に入り込まない、このため電極端面にはフィ
レットができず、マンハッタン発生の促進モーメントが
生じない。
The printed wiring board according to claim 2 of the present invention is difficult to shift when the solder is melted, and the chip components do not enter the pad from the outside to the inside.Therefore, no fillet is formed on the electrode end surface, and the moment that accelerates Manhattan generation does not occur.

[実施例コ 以下、この発明の一実施例について説明する。[Example code] An embodiment of the present invention will be described below.

第1図はこの発明の一実施例に係るチップ部品を示す斜
視図、第2図、第3図はこの発明の一実施例に係るチッ
プ部品を実装する様子を示し、第2図はチップ部品(1
1の長手方向の断面図、第3図はチップ部品(11の端
面方向の断面図である0図において、[+1はチップ部
品、(2)はチップ部品(1)の両端部の上面(2b)
、下面(2C)、側面(2d)の・みに形成されたtm
、(3)はチップ部品(りが搭載、接続される印刷配線
板、(4)は印刷配線板(3)上に形成されたパッド、
(5)はパッド(4)上にあらかじめ供給され、加熱し
て溶融させることによりパッド(4)と′:&極(2)
を接合するはんだである。
FIG. 1 is a perspective view showing a chip component according to an embodiment of the present invention, FIGS. 2 and 3 show how the chip component according to an embodiment of the present invention is mounted, and FIG. (1
1 is a cross-sectional view in the longitudinal direction of the chip component (11), and FIG. )
, tm formed only on the bottom surface (2C) and side surface (2d)
, (3) is a printed wiring board on which chip components (ri) are mounted and connected, (4) is a pad formed on the printed wiring board (3),
(5) is supplied on the pad (4) in advance and heated and melted to form the pad (4) and ':&pole (2).
It is a solder that joins.

次にこの実施例の動作について説明する。Next, the operation of this embodiment will be explained.

印刷配線板(3)上に形成されたパッド(4)に、あら
かじめはんだ(5)を供給しておき、チップ部品(1)
を搭載する。この時、チップ部品(+1のt掻(2)と
パッド(4)はできるだけ精度よく一致していることが
望ましいが、多少ずれていてもよい。
Solder (5) is supplied in advance to the pads (4) formed on the printed wiring board (3), and the chip component (1)
Equipped with At this time, it is desirable that the chip component (+1 tread (2) and pad (4) match as accurately as possible, but they may be slightly deviated.

このチップ部品(+1の搭載されている印刷配線板(3
)を赤外線、熱風或は蒸気の凝縮潜熱を利用して加熱し
、はんだ(5)を溶融させて、チップ部品+11の劃1
2)とパッド(4)をはんだ付は接合する。この加熱の
際、2つの電極(2)間ではんだ(5)の溶融に時間差
が生じても、チップ部品(1)の端面には電極(2)が
ないため、端面にはフィレットが形成されない、このた
め、マンハッタン不良の発生モーメントM(hxγ+ 
sinθ)が発生せず、マンハッタン不良が生じない。
This chip component (+1 printed wiring board (3)
) is heated using infrared rays, hot air, or the latent heat of condensation of steam to melt the solder (5) and form part 1 of the chip part +11.
2) and pad (4) are soldered together. During this heating, even if there is a time difference in the melting of the solder (5) between the two electrodes (2), no fillet will be formed on the end surface because there is no electrode (2) on the end surface of the chip component (1). , Therefore, the moment M(hxγ+
sin θ) does not occur, and Manhattan defects do not occur.

しかも、チップ部品fl)の下面(2C)でパッド(4
)に接続されているだけではなく、側面(2d)にはフ
ィレットが形成されてパッド(4)に接続されており、
後の目視検査が比較的容易である。
Moreover, the bottom surface (2C) of the chip component fl) is connected to the pad (4
), a fillet is formed on the side surface (2d) and is connected to the pad (4),
Subsequent visual inspection is relatively easy.

なお、上記実施例ではチップ部品(1)の電[!(2)
がチップ部品fl)の上面、側面、及び下面のみに形成
されているチップ部品(1)を示したが、チップ部品(
りの側面、下面のみに電極が形成されたチップ部品fl
+ であってもよいことは言うまでもなく、端面の下方
にわずかな電極が形成されていてもよい。
In addition, in the above embodiment, the electric power of the chip component (1) [! (2)
The chip component (1) is formed only on the top, side, and bottom surfaces of the chip component fl).
Chip parts with electrodes formed only on the side and bottom surfaces fl
Needless to say, a slight electrode may be formed below the end surface.

また、第4図に示すように、チップ部品(11の端面ば
電ti (2a)が形成されて導通されているが、端面
の表面ははんだ(5)が濡れない材料(6)で覆われる
ように形成されている。これは、例えばセラミックや、
FM脂で端面表面を被覆したものでも良く、端面の電f
fl (2alがはんだ(5)に濡れ難い金属材料であ
るT、、Cr 、AIなどで形成されていても良い。
In addition, as shown in FIG. 4, an electric current (2a) is formed on the end surface of the chip component (11) and conductive, but the surface of the end surface is covered with a material (6) that does not wet the solder (5). For example, it is made of ceramic or
The end face surface may be coated with FM fat, and the electric f of the end face may be
fl (2al) may be made of T, Cr, AI, etc., which are metal materials that are difficult to wet with the solder (5).

また、第5図はこの発明の他の実施例に係るチップ部品
(1)の実装状態を示す側面図である。第5図はチップ
部品i11の長手方向の断面図で、電極(2)の一方の
端面から他方の端面までの長さしとパッド(4)の寸法
の関係は、 2A+GSL       ・・・[+)Lニチップ部
品(1)の長手方向における電極(2)の一方の端面か
ら他方の端 面までの長さ A:パッドの長さ G:パッドの間隔 を満たしている。
Moreover, FIG. 5 is a side view showing a mounting state of a chip component (1) according to another embodiment of the present invention. FIG. 5 is a longitudinal sectional view of the chip component i11, and the relationship between the length from one end surface of the electrode (2) to the other end surface and the dimension of the pad (4) is 2A+GSL...[+] Length A from one end surface to the other end surface of the electrode (2) in the longitudinal direction of the L two-chip component (1): Pad length G: Satisfies the spacing between the pads.

チップ部品(+1をパッド(4)上に搭載し、上記と同
様の方法ではんだ(5)を加熱、溶融して接合する。こ
の実施例では1005チツプ部品(長手方向=lO■■
、端面方向: 0.5mm )を用いた場合、A=03
1−程度、  G=  0.4au+程度、  L= 
 1.Omm程度としている。第5図に示すようにはん
だ(5)の量が適正の場合はチップ部品(1)の端面の
電極(2alにはフィレットが形成されず、マンハッタ
ン発生のモーメントは生じない。また、はんだ(5)が
少し多い目に供給されてしまった場合は、端面(2a)
もはんだ(5)が濡れてしまうが、上記式(1)の関係
を満たしていれば、はとんどマンハッタン不良が生じな
い、即ち、第6図に示すように、チップ部品f11の長
手方向において、?を掻(21の端面(2a)がパッド
(4)の端より外側に出ていればほとんどマンハッタン
不良が生じない、これは上記式(1)を満たすというこ
とはチップ部品+11の端面がパッド(4)の外側端部
よりも内側へ入り込まないように構成されることであり
、実験によってもほとんどマンハッタン不良が生じない
ことを確認している。また、2A+Gの値がLの値より
も小さいほど、部品搭載時に搭載位置ずれが起こっても
マンハッタン不良を防止できる。
A chip component (+1) is mounted on the pad (4), and the solder (5) is heated and melted in the same manner as above to bond it. In this example, a 1005 chip component (longitudinal direction = lO
, end face direction: 0.5mm), A=03
About 1-, G= about 0.4au+, L=
1. It is set to about 0mm. As shown in FIG. 5, when the amount of solder (5) is appropriate, no fillet is formed on the electrode (2al) on the end surface of the chip component (1), and no moment of Manhattan generation occurs. ) is supplied to the end face (2a).
The solder (5) also gets wet, but as long as the above equation (1) is satisfied, Manhattan defects will hardly occur.In other words, as shown in FIG. In? If the end surface (2a) of the chip component +11 protrudes outside the end of the pad (4), Manhattan defects will hardly occur.This satisfies the above formula (1). 4) is configured so that it does not go inward beyond the outer edge, and it has been confirmed through experiments that Manhattan defects hardly occur.Also, the smaller the value of 2A+G is than the value of L, the more , Manhattan defects can be prevented even if the mounting position shifts when parts are mounted.

また、上記実施例では、2A+G≦Lを満たすパッド(
4)上に従来のチップ部品(1)を実装する場合につい
て示したが、第1図のようなチップ部品(1)の端面に
電極(2)が形成されていないものや、第4図のような
端面ばはんだ(5)が濡れないチップ部品(1)を用い
てもよいことは言うまでもない。
In addition, in the above embodiment, the pad (
4) The case where the conventional chip component (1) is mounted is shown above, but there are cases where the electrode (2) is not formed on the end surface of the chip component (1) as shown in FIG. It goes without saying that a chip component (1) that does not get wet with the end face solder (5) may also be used.

[発明の効果] 以上のように、この発明の請求項1の発明によれば、2
つの電極を有するチップ部品の各;僅を印刷配線板上に
形成したパッドにはんだを介して接続するチップ部品の
実装方法において5チップ部品の長手方向の側面の電極
と下面の電極のみをはんだを介してパッドに接続するこ
とにより、マンハッタン発生の促進モーメントが抑11
Jさね、はんだ付は不良率を大幅に低減でき、はんだ付
は後の検査も容易に行なえるチップ部品の実装方法が得
られる効果がある。
[Effect of the invention] As described above, according to the invention of claim 1 of this invention, 2
In a method for mounting chip components in which each chip component has two electrodes, each electrode is connected to a pad formed on a printed wiring board via solder, only the electrodes on the longitudinal sides and the electrodes on the bottom surface of the chip component are soldered. By connecting to the pad through the
J-san, soldering can significantly reduce the defective rate, and soldering has the effect of providing a mounting method for chip components that can be easily inspected later.

また、この発明の請求項2の発明によれば、2つのパッ
ドを有し、パッドのそれぞれにはんだを介して接続され
る2つの電極を有するチップ部品を載置する印刷配線板
において、チップ部品の長手方向のパッドの長さをA、
パッドの間隔をG、チップ部品の一端面から他端面まで
の長さをLとする時、 2A+G≦L としたことにより、マンハッタン金主の促進モーメント
が抑制され、はんだ付は不良率を大幅に低減でき、はん
だ付は後の検査も容易に行なえる印刷配線板が得られる
効果がある。
Further, according to the invention of claim 2 of the present invention, in a printed wiring board on which a chip component is mounted having two pads and two electrodes connected to each of the pads via solder, the chip component The length of the pad in the longitudinal direction is A,
When the spacing between pads is G and the length from one end surface of the chip component to the other end surface is L, by setting 2A+G≦L, the promotion moment of Manhattan gold is suppressed, and the soldering defect rate is significantly reduced. This has the effect of providing a printed wiring board that can be easily inspected after soldering.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の一実施例によるチップ部品の実装方
法に係るチップ部品を示す斜視図、第2図、第3図はそ
れぞれ一実施例に係るチップ部品の実装状態を示す断面
図、第4図はこの発明の他の実施例に係るチップ部品実
装状態のチップ部品の長手方向における断面図、第5図
、第6図はそれぞれこの発明のさらに他の実施例に係る
チップ部品実装状態を示す断面図5第7図〜第9図はそ
れぞれ従来のチップ部品を示′f斜視図、第10図は従
来のチップ部品の実装方法に係るチップ部品の実装状態
を示す断面図、第11図は従来のチップ部品の実装方法
に係るマンハッタン不良を示すチップ部品と印刷配線板
の断面図である。 (1)・・・チップ部品、(2)  ・・・Z h、(
3)・・・印刷配線板、(4)・・・パッド、(5)・
・・はんだ、(6)・・・セラミック。 なお、図中、同一符号は同一、または相当部分を示す。 代  理  人     大  岩  増  雄第1図 z、を柚 第2図 J:IZんた′ 第5図 第6図 第3図 第4図 第7図 a 第8図 第9図 第10図 書(自発) 2、発明の名称 チップ部品の実装方法及び印刷配線板 3、補正をする者 代表者 第11図 5、補正の対象 明細書の発明の詳細な説明の欄及び図面。 6、補正の内容 (1)明細書第4頁第14行の「はんだ(5)」を1印
刷配線板(3)」に訂正する。 (2)同第4頁第19行の「2つの電極(2)における
チップ部品(1)」を「チップ部品(1)における2つ
の電極(2)」に訂正する。 (3)同第4頁第20行の「(5)の」を「(5)との
」に訂正する。 (4)同第8頁第20行の「形成されない。このため」
を「形成されないので」に訂正する。 (5)同第9頁第19行の「良く」を「良い。また」に
訂正する。 (6)同第9頁第19行の「電極(2a)が」を「電極
(2龜)もしくは電極端面の表面が」に訂正する。 (7]同第11頁第3行の「端面」を1最終的には端面
」に訂正する。 (8)同第11頁第4行の「上記」を「それ以前に側面
(2d)にはんだ(5)が濡れてフィレットを形成すろ
ため、上記」に訂正する。 (9)図面の第10図を別紙のとおりに訂正する。 7、添付書類の目録 図面(第10図)         1通以  上 第10図
FIG. 1 is a perspective view showing a chip component according to a method for mounting a chip component according to an embodiment of the present invention, FIGS. FIG. 4 is a sectional view in the longitudinal direction of a chip component mounted in a chip component according to another embodiment of the present invention, and FIGS. 5. FIGS. 7 to 9 are perspective views of conventional chip components, FIG. 10 is a sectional view showing the mounting state of chip components according to the conventional chip component mounting method, and FIG. 1 is a cross-sectional view of a chip component and a printed wiring board showing a Manhattan defect in a conventional chip component mounting method. (1)...Chip parts, (2)...Z h, (
3)...Printed wiring board, (4)...Pad, (5)...
...Solder, (6)...Ceramic. In addition, in the figures, the same reference numerals indicate the same or equivalent parts. Agent Masuo Daiiwa Figure 1 z, Yuzu Figure 2 J:IZanta' Figure 5 Figure 6 Figure 3 Figure 4 Figure 7 a Figure 8 Figure 9 Figure 10 Books (spontaneous) ) 2. Name of the invention Chip component mounting method and printed wiring board 3. Representative of the person making the amendment Figure 5. Detailed description of the invention in the specification to be amended and drawings. 6. Contents of amendment (1) "Solder (5)" on page 4, line 14 of the specification is corrected to "1 printed wiring board (3)." (2) On page 4, line 19, "chip component (1) in two electrodes (2)" is corrected to "two electrodes (2) in chip component (1)". (3) On page 4, line 20, "(5) no" is corrected to "(5) no". (4) "Not formed. For this reason" on page 8, line 20.
should be corrected to "Because it is not formed." (5) Correct "good" on page 9, line 19 to "good. Also". (6) On page 9, line 19, "electrode (2a)" is corrected to "electrode (2 a) or the surface of the electrode end". (7) Correct “end face” in line 3 of page 11 to “1 ultimately end face”. (8) Correct “above” in line 4 of page 11 to “before then, change to side (2d)”. To prevent the solder (5) from getting wet and forming a fillet, the above is corrected. (9) Figure 10 of the drawing is corrected as shown in the attached sheet. 7. Attached document catalog drawing (Figure 10) 1 copy or more Figure 10 above

Claims (2)

【特許請求の範囲】[Claims] (1) 2つの電極を有するチップ部品の各電極を印刷
配線板上に形成したパッドにはんだを介して接続するチ
ップ部品の実装方法において、上記チップ部品の長手方
向の側面の電極と下面の電極のみをはんだを介して上記
パッドに接続したことを特徴とするチップ部品の実装方
法。
(1) In a chip component mounting method in which each electrode of a chip component having two electrodes is connected to a pad formed on a printed wiring board via solder, an electrode on a side surface in the longitudinal direction of the chip component and an electrode on the bottom surface of the chip component. A method for mounting a chip component, characterized in that the chip component is connected to the pad via solder.
(2) 2つのパッドを有し、上記パッドのそれぞれに
はんだを介して接続される2つの電極を有するチップ部
品を載置する印刷配線板において、上記チップ部品の長
手方向のパッドの長さをA、上記パッドの間隔をG、上
記チップ部品の一端面から他端面までの長さをLとする
時、 2A+G≦L としたことを特徴とする印刷配線板。
(2) In a printed wiring board on which a chip component is mounted that has two pads and has two electrodes connected to each of the pads via solder, the length of the pad in the longitudinal direction of the chip component is A. A printed wiring board characterized in that 2A+G≦L, where G is the interval between the pads, and L is the length from one end surface to the other end surface of the chip component.
JP14513690A 1990-06-01 1990-06-01 Chip parts mounting method and printed wiring board Pending JPH0438892A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14513690A JPH0438892A (en) 1990-06-01 1990-06-01 Chip parts mounting method and printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14513690A JPH0438892A (en) 1990-06-01 1990-06-01 Chip parts mounting method and printed wiring board

Publications (1)

Publication Number Publication Date
JPH0438892A true JPH0438892A (en) 1992-02-10

Family

ID=15378245

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14513690A Pending JPH0438892A (en) 1990-06-01 1990-06-01 Chip parts mounting method and printed wiring board

Country Status (1)

Country Link
JP (1) JPH0438892A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1467605A1 (en) * 2003-04-09 2004-10-13 L'Air Liquide S. A. à Directoire et Conseil de Surveillance pour l'Etude et l'Exploitation des Procédés Georges Claude Process and apparatus for reflow soldering of electronic components limiting tilting phenomena (Manhattan effect)
JP2010238841A (en) * 2009-03-31 2010-10-21 Tdk Corp Method of mounting chip component to mounting substrate
WO2010150522A1 (en) * 2009-06-22 2010-12-29 株式会社村田製作所 Method for producing module having built-in component and module having built-in component
WO2012114857A1 (en) * 2011-02-24 2012-08-30 株式会社村田製作所 Electronic-component-mounting structure
JP2012256804A (en) * 2011-06-10 2012-12-27 Dainippon Printing Co Ltd Component-built-in wiring board
JP2014187289A (en) * 2013-03-25 2014-10-02 Murata Mfg Co Ltd Multilayer ceramic capacitor
JP2020167394A (en) * 2019-03-26 2020-10-08 キヤノン株式会社 Printed circuit board and electronic device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63169793A (en) * 1987-01-07 1988-07-13 株式会社村田製作所 Structure of fitting chip parts onto printed board

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63169793A (en) * 1987-01-07 1988-07-13 株式会社村田製作所 Structure of fitting chip parts onto printed board

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1467605A1 (en) * 2003-04-09 2004-10-13 L'Air Liquide S. A. à Directoire et Conseil de Surveillance pour l'Etude et l'Exploitation des Procédés Georges Claude Process and apparatus for reflow soldering of electronic components limiting tilting phenomena (Manhattan effect)
FR2853806A1 (en) * 2003-04-09 2004-10-15 Air Liquide METHOD AND INSTALLATION FOR BRAZING ELECTRONIC COMPONENTS BY REFUSION LIMITING TILTING PHENOMENES (MANATHAN EFFECT)
JP2010238841A (en) * 2009-03-31 2010-10-21 Tdk Corp Method of mounting chip component to mounting substrate
WO2010150522A1 (en) * 2009-06-22 2010-12-29 株式会社村田製作所 Method for producing module having built-in component and module having built-in component
WO2012114857A1 (en) * 2011-02-24 2012-08-30 株式会社村田製作所 Electronic-component-mounting structure
JP5664760B2 (en) * 2011-02-24 2015-02-04 株式会社村田製作所 Electronic component mounting structure
US9184362B2 (en) 2011-02-24 2015-11-10 Murata Manufacturing Co., Ltd. Electronic-component mounting structure
JP2012256804A (en) * 2011-06-10 2012-12-27 Dainippon Printing Co Ltd Component-built-in wiring board
JP2014187289A (en) * 2013-03-25 2014-10-02 Murata Mfg Co Ltd Multilayer ceramic capacitor
JP2020167394A (en) * 2019-03-26 2020-10-08 キヤノン株式会社 Printed circuit board and electronic device

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