JPH04245132A - Base for chip fuse and chip fuse using it - Google Patents

Base for chip fuse and chip fuse using it

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Publication number
JPH04245132A
JPH04245132A JP1005991A JP1005991A JPH04245132A JP H04245132 A JPH04245132 A JP H04245132A JP 1005991 A JP1005991 A JP 1005991A JP 1005991 A JP1005991 A JP 1005991A JP H04245132 A JPH04245132 A JP H04245132A
Authority
JP
Japan
Prior art keywords
fuse
chip
chip fuse
base
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1005991A
Other languages
Japanese (ja)
Inventor
Seiji Mimori
三森 誠司
Yukihisa Hiroyama
幸久 廣山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP1005991A priority Critical patent/JPH04245132A/en
Publication of JPH04245132A publication Critical patent/JPH04245132A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To provide a base having good mass productivity of a chip fuse and the chip fuse excellent in its quick fusion by using said base. CONSTITUTION:A base for a chip fuse on the chemically cut photosensitive glass plate of which slits 12 for dividing the base into a number of chip fuses, are formed, and a chip fuse in which two electrodes 10 opposing to each other for every chip fuse and a fuse metal film 11 electrically connecting said electrodes to each other are arranged on the base 6 for said chip fuse.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は電子機器等に使用される
チップヒューズ用基板及びそれを用いたチップヒューズ
に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip fuse substrate used in electronic equipment and the like, and a chip fuse using the same.

【0002】0002

【従来の技術】従来、電子機器の誤操作、短絡等の故障
により生じた過電流による電子機器の発熱、火災や事故
等を防止するためのヒューズには、ガラス管の両端にキ
ャップ状の外部接続端子を設け、ガラス管内の端子間に
ヒューズ金属を接続した管ヒューズがあった。しかし電
子機器が小型化するにつれ前記管ヒューズの占有面積が
大きいことが問題となってきた。これを解決するために
基板に表面実装できるチップ型のヒューズが提案されて
いる(特開昭62−172624号公報、同62−17
2625号公報、同62−172629号公報等)。こ
れら公報に示された方法は図7に示すような直方体のチ
ップ形状の絶縁性のアルミナセラミック14の表面に電
極10を形成後電極間をAu,Al,Cuの金属線15
でワイヤーボンディングし、このワイヤーをヒューズ金
属とし、ワイヤーを樹脂のポッティングで保護被覆して
ヒューズを形成したものである。なお、図において5は
スルーホールである。しかしながらこの方法は、外部回
路と電気的に接続するための端子電極とヒューズ金属を
別々に形成するために製造工程が煩雑になるだけでなく
、一般のチップ抵抗、チップコンデンサ等のチップ部品
に比べ複雑な形状となるため、回路基板の表面に自動実
装するには不適なものであった。また製造する際には、
1チップ形状に予め切断した絶縁性アルミナセラミック
を使用すると、1チップが小さすぎるためハンドリング
が困難となること及び一般には量産性を上げるために複
数個のチップヒューズ要素を一括形成し、最後に個々に
分割して製品とする手法が用いられるが、アルミナセラ
ミックは一般に剛性が強く、分割にはレーザやダイヤモ
ンド粉末をつけたブレードによりダイシングする手法が
用いられる。しかし、どちらの分割法も多大の作業時間
を要するため、製造コストの上昇を招くものであった。 他方で、回路基板表面に自動実装するに適したチップヒ
ューズとして図6に示した特開昭63−141233号
公報に示されるような方法が提案されている。即ち、図
8(a)はチップヒューズの断面図及び(b)は電極と
ヒューズ金属との関係を示す図で,一般のチップ部品と
同一寸法に形成された直方体形状のアルミナセラミック
14の長手方向両端部に一対の電極10,10を設け、
電極間に(b)図に示すようなパターンのヒューズ金属
膜11をめっき法又は厚膜法で表面に平面的に形成した
ものである。なお16は被覆層である。
[Prior Art] Conventionally, fuses used to prevent electronic equipment from overheating, fires, accidents, etc. due to overcurrent caused by malfunctions such as incorrect operation or short circuits have a cap-shaped external connection on both ends of a glass tube. There was a tube fuse in which terminals were provided and fuse metal was connected between the terminals inside the glass tube. However, as electronic devices become smaller, the area occupied by the tube fuse becomes larger, which has become a problem. To solve this problem, a chip type fuse that can be surface mounted on a board has been proposed (Japanese Unexamined Patent Application Publication No. 172-172-1982, Japanese Unexamined Patent Publication No. 62-17
No. 2625, No. 62-172629, etc.). In the method disclosed in these publications, after forming an electrode 10 on the surface of an insulating alumina ceramic 14 in the shape of a rectangular parallelepiped chip as shown in FIG.
This wire is used as a fuse metal, and the wire is protectively coated with resin potting to form a fuse. In addition, in the figure, 5 is a through hole. However, this method not only complicates the manufacturing process because the terminal electrodes and fuse metal for electrical connection with external circuits are formed separately, but also has a disadvantage compared to chip components such as general chip resistors and chip capacitors. Due to its complicated shape, it was not suitable for automatic mounting on the surface of a circuit board. Also, when manufacturing
When using insulating alumina ceramic that is pre-cut into a single chip shape, each chip is too small, making it difficult to handle.In general, in order to increase mass production, multiple chip fuse elements are formed at once and then individually cut. Alumina ceramics are generally very rigid, so dicing with a laser or a blade coated with diamond powder is used to separate them. However, both division methods require a large amount of work time, leading to an increase in manufacturing costs. On the other hand, as a chip fuse suitable for automatic mounting on the surface of a circuit board, a method as shown in Japanese Patent Laid-Open No. 63-141233, shown in FIG. 6, has been proposed. That is, FIG. 8(a) is a cross-sectional view of the chip fuse, and FIG. 8(b) is a diagram showing the relationship between the electrode and the fuse metal. A pair of electrodes 10, 10 are provided at both ends,
A fuse metal film 11 having a pattern as shown in the figure (b) is formed between the electrodes in a planar manner on the surface by a plating method or a thick film method. Note that 16 is a covering layer.

【0003】0003

【発明が解決しようとする課題】しかしながら、特開昭
63−141233号公報に示される方法は、特開昭6
2−172624号公報、同62−172625号公報
及び同62−172629号公報に示される方法と比較
して電極及びヒューズ金属の形成法を改良したものであ
り、量産性を上げるために多数個取りにした場合、最終
製品の分割法はやはりレーザやダイシングによるしかな
く、分割における製造コストは前記三つの公報に示され
る方法と変るところがない。また、チップヒューズを表
面実装する際の接続信頼性を上げるためには、チップ長
手方向の端子電極をチップの側面を介してチップヒュー
ズの裏面にも形成する必要があり、側面スルーホールが
ない場合や分割後に側面メタライズをする場合は特に困
難な問題を含む。つまり表裏の電極を接続するための側
壁面メタライズを無電解めっき法で形成する場合は、部
分めっきになるためめっきレジストを形成したり、エッ
チング用レジストの形成、エッチング工程等が新たに必
要となりコストアップになる。また厚膜法の場合で側面
メタライズを通常の厚膜ペーストを使用する場合は、8
50℃近辺での熱処理が必要となり、ヒューズ金属上に
被覆したシリコン樹脂が劣化するという問題点がある。 また180℃近辺でキュアする厚膜ペーストを使用する
場合は、半田の濡れ性及び密着力に信頼性がないという
問題点がある。また側面スルーホールを予め形成した製
造法の場合、多数個取りのシート状態で孔を形成する必
要がある。この孔の形成法としては、通常焼結前のシー
トにパンチで孔加工してから焼結して必要位置に孔を形
成したアルミナセラミック基板を得るか、焼結したアル
ミナセラミック基板に後からレーザで開孔する方法が取
られる。しかしながら孔加工した生シートを焼結して開
孔したアルミナセラミック基板を得る方法では、一般に
アルミナセラミック基板の焼結収縮率が1%ほどばらつ
くため、所望の最終製品の孔位置と焼結したアルミナセ
ラミック基板の孔位置が合致せず歩留りを悪くするとい
う問題点がある。また焼結したアルミナセラミック基板
にレーザで開孔する場合、孔位置精度は良いものの、孔
近傍に蒸発したアルミナセラミックが再付着したり、開
孔に多大のコストを必要とするなどの問題がある。さら
に速断性が要求される用途においては、溶断すべきヒュ
ーズ金属が熱伝導性の良いアルミナセラミック基板に直
接密着しているため、過電流がヒューズ金属膜に流れた
場合のヒューズ部分の発熱が放熱されて、過電流が流れ
た際の速断性に欠けるという問題点がある。一方熱伝導
性が悪く銅等の接着や加工法の確立されているプリント
板があるが、速断性は優れるものの銅等のヒューズ金属
が溶断する融点が高く、ヒューズ支持基板の耐熱温度が
低いため、ヒューズの発熱による支持基板の劣化、発煙
、発火等の危険性の問題がある。
[Problems to be Solved by the Invention] However, the method disclosed in Japanese Patent Application Laid-Open No. 63-141233 is
This is an improved method for forming electrodes and fuse metals compared to the methods shown in Publications No. 2-172624, No. 62-172625, and No. 62-172629. In this case, the only way to divide the final product is by laser or dicing, and the manufacturing cost for dividing is the same as the methods shown in the above three publications. In addition, in order to increase the connection reliability when surface mounting a chip fuse, it is necessary to form terminal electrodes in the longitudinal direction of the chip on the back side of the chip fuse via the side surface of the chip. Particularly difficult problems arise when performing side metalization after separation. In other words, when forming sidewall metallization to connect the front and back electrodes using electroless plating, it is partial plating, which requires new steps such as forming a plating resist, forming an etching resist, and etching process, which increases the cost. It's going to be up. In addition, in the case of the thick film method, when using normal thick film paste for side metallization, 8
There is a problem in that heat treatment at around 50° C. is required, and the silicone resin coated on the fuse metal deteriorates. Further, when using a thick film paste that cures at around 180° C., there is a problem that the wettability and adhesion of the solder are unreliable. Further, in the case of a manufacturing method in which side through holes are formed in advance, it is necessary to form the holes in a multi-hole sheet. The holes are usually formed by punching holes in a sheet before sintering and then sintering them to obtain an alumina ceramic substrate with holes formed at the required positions, or by laser-cutting the sintered alumina ceramic substrate afterwards. A method of drilling holes is used. However, in the method of obtaining a perforated alumina ceramic substrate by sintering a perforated raw sheet, the sintering shrinkage rate of the alumina ceramic substrate generally varies by about 1%. There is a problem in that the positions of the holes in the ceramic substrate do not match, resulting in poor yield. In addition, when drilling holes in a sintered alumina ceramic substrate using a laser, although the hole position accuracy is good, there are problems such as re-adhesion of evaporated alumina ceramic near the hole and the large cost required to drill the hole. . Furthermore, in applications that require fast-acting performance, the fuse metal to be blown is in direct contact with the alumina ceramic substrate, which has good thermal conductivity. However, there is a problem in that it lacks quick cutting performance when an overcurrent flows. On the other hand, there are printed boards that have poor thermal conductivity and have established bonding and processing methods for copper, etc., but although they have excellent fast-acting properties, the melting point at which fuse metals such as copper melt is high, and the heat resistance temperature of the fuse support board is low. However, there are problems such as deterioration of the supporting board due to heat generated by the fuse, danger of smoke generation, and ignition.

【0004】本発明は上記した不都合に鑑みなされたも
のであり、過電流がヒューズ部分に流れた際の速断性に
優れ、ヒューズの製造上容易に開孔・分割ができ、量産
性に優れたチップヒューズ用基板及びそれを用いたチッ
プヒューズを提供するものである。
The present invention has been made in view of the above-mentioned disadvantages, and has excellent fast-acting properties when overcurrent flows through the fuse portion, easy opening and splitting in the manufacture of fuses, and excellent mass productivity. The present invention provides a chip fuse substrate and a chip fuse using the same.

【0005】[0005]

【課題を解決するための手段】発明者らは、チップヒュ
ーズの絶縁基板として従来のアルミナセラミック等に代
えて化学切削性感光性ガラス板を使用することにより、
ヒューズとして使用した場合に短絡等の異常によりヒユ
ーズに過電流が流れたときのヒューズの速断性が優れ、
またヒューズ製造において分割性及び側面メタライズ用
スルーホールの形成性が改善されるので量産性にも優れ
ることを見い出し、本発明を完成するに至った。
[Means for Solving the Problems] The inventors have achieved the following by using a chemically cuttable photosensitive glass plate instead of the conventional alumina ceramic etc. as an insulating substrate of a chip fuse.
When used as a fuse, the fuse has excellent fast-acting properties when overcurrent flows through the fuse due to an abnormality such as a short circuit.
In addition, the inventors have found that the method is excellent in mass production because the splitting properties and the formability of through-holes for side metallization are improved in fuse manufacturing, and the present invention has been completed.

【0006】本発明は、化学切削性感光性ガラス板に多
数のチップヒューズに分割するスリットを形成したチッ
プヒューズ用基板、並びにチップヒューズ用基板に、チ
ップヒューズごとに対向する二つの電極及び該電極を電
気的に接続するヒューズ金属膜を配設したチップヒュー
ズに関する。
The present invention provides a chip fuse substrate in which a chemical cutting photosensitive glass plate is formed with slits to divide it into a large number of chip fuses, and a chip fuse substrate with two electrodes facing each other for each chip fuse and the electrodes. This invention relates to a chip fuse provided with a fuse metal film that electrically connects the fuse.

【0007】本発明において、化学切削性感光性ガラス
板の組成は特に制限はなく、紫外線による局部露光後の
適当な熱処理によりHFに易溶な結晶を析出するもので
あればよく、SiO2−Li2O−Al2O3系がよく
知られているものである。このガラスは紫外線による局
部露光とそれに続く熱処理によってHFに易溶なLi2
O・SiO2結晶を露光部に析出するから、このガラス
板をHF溶液に浸漬することにより、Li2O・SiO
2部を溶出させ、スルーホールやスリットの加工ができ
る。
[0007] In the present invention, the composition of the chemically cuttable photosensitive glass plate is not particularly limited as long as it can precipitate crystals that are easily soluble in HF by an appropriate heat treatment after local exposure to ultraviolet rays, and SiO2-Li2O. -Al2O3 system is well known. This glass is made of Li2, which is easily soluble in HF, by local exposure to ultraviolet rays and subsequent heat treatment.
O.SiO2 crystals are precipitated in the exposed area, so by immersing this glass plate in an HF solution, Li2O.SiO2 crystals are precipitated in the exposed area.
By eluting the second part, it is possible to process through holes and slits.

【0008】従って本発明のチップヒューズ用基板は、
化学切削性感光性ガラス板(以下、感光性ガラスと呼ぶ
)に、電極端子部のスルーホール及び多数のチップヒュ
ーズに分割するスリットの部分だけが露光するようなマ
スクを施して紫外線を照射してから、例えば550℃で
熱処理して(一次熱処理)Li2O・SiO2結晶を露
光部分に析出させた後、HF溶液に浸漬して析出結晶を
溶解除去し、最後に例えば800℃で熱処理して(二次
熱処理)ガラス全体を結晶化させて得られる。局部露光
用のマスクの材料は紫外線を透過する部分と遮蔽する部
分とが形成できるものであればよく、通常は透明石英ガ
ラス板にCr蒸着膜を施したマスクが使用される。紫外
線照射においては、スリット部の露光幅を充分細くして
狭いスリットへのHFの供給及び溶解Li2O・SiO
2結晶の除去速度を遅くして、スルーホールが貫通した
時点で図6に示す形状の手分割に適した深さのスリット
12が感光性ガラス1に形成されるようにするのが好ま
しい。また、スリットに相当する部分への露光量をスル
ーホールに相当する部分への露光量よりも少なくするこ
とにより、熱処理におけるLi2O・SiO2結晶析出
量を少なくし、HF浸漬時のスリット部分の加工速度を
スルーホール開孔速度よりも遅くすることが好ましい。 このため、例えばルミラーフィルムのような紫外線を若
干吸収する材料をスリット部に重ねて照射する方法が用
いられる。
Therefore, the chip fuse substrate of the present invention has the following features:
A chemically cuttable photosensitive glass plate (hereinafter referred to as photosensitive glass) is irradiated with ultraviolet light by applying a mask that exposes only the through holes in the electrode terminals and the slits that divide the chip fuses. Then, heat treatment is performed at, for example, 550°C (primary heat treatment) to precipitate Li2O/SiO2 crystals on the exposed area, followed by immersion in an HF solution to dissolve and remove the precipitated crystals, and finally heat treatment at, for example, 800°C (secondary heat treatment). (Second heat treatment) Obtained by crystallizing the entire glass. The material of the mask for local exposure may be any material as long as it can form a part that transmits ultraviolet rays and a part that blocks ultraviolet rays, and usually a mask made of a transparent quartz glass plate coated with a Cr vapor deposition film is used. In ultraviolet irradiation, the exposure width of the slit part is made sufficiently narrow to supply HF to the narrow slit and dissolve Li2O/SiO.
It is preferable to slow down the removal rate of the two crystals so that a slit 12 having a depth suitable for manual division as shown in FIG. 6 is formed in the photosensitive glass 1 when the through hole penetrates. In addition, by making the amount of exposure to the portion corresponding to the slit smaller than the amount of exposure to the portion corresponding to the through hole, the amount of Li2O/SiO2 crystal precipitation during heat treatment is reduced, and the processing speed of the slit portion during HF immersion is reduced. It is preferable that the through-hole opening speed be slower than the through-hole opening speed. For this reason, a method is used in which a material that absorbs some ultraviolet rays, such as a Lumirror film, is placed over the slit portion and irradiated.

【0009】化学切削性感光性ガラスは、二次熱処理し
て結晶化した場合結晶化に伴いガラスの密度が上がり寸
法収縮するが、収縮率は約1%とアルミナに比べて1桁
小さいためヒューズ形成用基板としての寸法精度が高い
。また比熱、熱伝導率及び密度がアルミナより小さいか
らヒューズが発熱した場合の熱拡散速度が遅く、ヒュー
ズが融点に達する温度までの異常電流通電時間を短くで
きる利点がある。
When chemically machinable photosensitive glass is crystallized through secondary heat treatment, the density of the glass increases as it crystallizes and it shrinks in size, but the shrinkage rate is approximately 1%, which is an order of magnitude smaller than that of alumina, so it is not suitable for fuses. High dimensional accuracy as a forming substrate. Furthermore, since the specific heat, thermal conductivity, and density are lower than those of alumina, the rate of heat diffusion when the fuse generates heat is slow, which has the advantage of shortening the abnormal current flow time until the fuse reaches the melting point.

【0010】チップヒューズ用基板への電極及びヒュー
ズ金属膜の形成は、公知のスクリーン印刷等の圧膜法で
ペースト状の導体を印刷、熱処理したり、表面を粗化後
めっきし、更にフォトリソグラフィ、エッチングする方
法が用いられる。後者の方法において、表面の粗化は公
知のフッ化物溶液に浸漬する方法でよい。めっきは無電
解めっき更に必要に応じて電気めっきして、スルーホー
ル内及び表面のめっき厚さを均一にする。めっき後は公
知の方法により、フォトリソグラフィ、エッチングを行
いチップヒューズの連結体とされる。電極は導電製の金
属が用いられ、ヒューズ用の金属は過電流で溶断するも
のを適宜選定して用いるが、通常は金、銀、銅又はそれ
らの合金が使用される。
[0010] The electrodes and fuse metal film are formed on the chip fuse substrate by printing a paste-like conductor using a known pressure film method such as screen printing, heat-treating it, roughening the surface, plating it, and then photolithography. , an etching method is used. In the latter method, the surface may be roughened by immersion in a known fluoride solution. The plating is performed by electroless plating and, if necessary, electroplating to make the plating thickness uniform within the through hole and on the surface. After plating, photolithography and etching are performed using known methods to form a chip fuse connection body. The electrodes are made of conductive metal, and the fuse metal is appropriately selected from metals that melt when an overcurrent occurs, and gold, silver, copper, or an alloy thereof is usually used.

【0011】チップヒューズは、上記したチップヒュー
ズの連結体をスリットの部分から手分割して得られる。
[0011] The chip fuse is obtained by manually dividing the above-mentioned chip fuse assembly from the slit portion.

【0012】0012

【実施例】以下、本発明の実施例を説明する。[Examples] Examples of the present invention will be described below.

【0013】実施例1 図1(a)に示すように、厚さ0.75mmで60×6
0mmの感光性ガラス(住田光学ガラス製、PSG−1
)1の上に0.7mm角のスルーホール形状及び15μ
m幅のスリットに対応する部分にCr蒸着膜のない紫外
線透過部があって、他の部分にはCr蒸着膜3を施した
透明石英ガラスのマスク2を重ね合せ、オーク製作所製
ガラス基板用高精度露光装置ORCHMW−661B−
1により平行光の紫外線を10J/cm2照射した。 次いで紫外線露光したガラス板を熱処理炉に入れ、一次
熱処理として大気中で545℃に加熱して3時間保持し
、図1(b)に示すように紫外線照射部分にLi2O・
SiO2結晶4を析出させた。次にこのガラス板を6重
量%のHF水溶液に90分浸漬撹拌し、析出結晶部分を
溶解して洗浄、乾燥後、再度熱処理炉に入れて二次熱処
理として810℃で2時間加熱してガラスを結晶化させ
、図1(c)に示すスルーホール5及び図示しないスリ
ットを有するチップヒューズ用基板6を得た。
Example 1 As shown in FIG. 1(a), a 60x6
0mm photosensitive glass (manufactured by Sumita Optical Glass, PSG-1
) 0.7mm square through hole shape and 15μ on top of 1
There is an ultraviolet transmitting part without a Cr vapor deposited film in the part corresponding to the m-wide slit, and a transparent quartz glass mask 2 coated with a Cr vapor deposited film 3 is superimposed on the other part. Precision exposure device ORCHMW-661B-
1, parallel ultraviolet light was irradiated at 10 J/cm2. Next, the glass plate exposed to ultraviolet rays was placed in a heat treatment furnace, and as a primary heat treatment, it was heated to 545°C in the air and held for 3 hours, and as shown in Figure 1(b), Li2O.
SiO2 crystal 4 was deposited. Next, this glass plate was immersed and stirred in a 6% by weight HF aqueous solution for 90 minutes, the precipitated crystal portion was dissolved, washed, dried, and then placed in a heat treatment furnace again and heated at 810°C for 2 hours as a secondary heat treatment. was crystallized to obtain a chip fuse substrate 6 having through holes 5 shown in FIG. 1(c) and slits (not shown).

【0014】次にこの基板を液温30℃の10重量%H
F水溶液に10分間浸漬及び撹拌して表面を粗化した。 次いでこの基板を流水で洗浄後30重量%HCl水溶液
に1分間浸漬し、増感剤(日立化成工業製、HS−10
1B)に5分間浸漬後流水洗浄した。次にこれを密着促
進剤(日立化成工業製、ADP−201)に5分間浸漬
し、流水洗浄後70℃に加熱した無電解めっき液(日立
化成工業製、L−59)に2時間浸漬し、4μmの銅め
っきを施し、図1(d)に示す銅めっき膜7を有する基
板を得た。この後図1(e)のように感光性レジストフ
ィルム(日立化成工業製、PHT−862AF−40)
8を銅めっき7の上に密着し、ヒューズパターン及び電
極パターンに対応する導体形成用マスク9を配して紫外
線露光後、1重量%のNa2CO3水溶液で現像し、次
いで塩化銅水溶液で銅をエッチングし、レジストフィル
ム8を剥離して図2に示すようなパターンのヒューズ金
属膜11及び電極10を有する化学切削性感光性ガラス
チップヒューズの連結体を得た。この後スリット12か
ら分割して複数個のチップヒューズを得た。
Next, this substrate was heated to 10% by weight H at a liquid temperature of 30°C.
The surface was roughened by immersing it in an F aqueous solution for 10 minutes and stirring. Next, this substrate was washed with running water, immersed in a 30% by weight HCl aqueous solution for 1 minute, and then treated with a sensitizer (manufactured by Hitachi Chemical, HS-10).
1B) for 5 minutes and then washed with running water. Next, this was immersed in an adhesion promoter (manufactured by Hitachi Chemical, ADP-201) for 5 minutes, and after washing with running water, it was immersed in an electroless plating solution (manufactured by Hitachi Chemical, L-59) heated to 70°C for 2 hours. , 4 μm of copper plating was applied to obtain a substrate having a copper plating film 7 shown in FIG. 1(d). After that, as shown in Figure 1(e), a photosensitive resist film (manufactured by Hitachi Chemical Co., Ltd., PHT-862AF-40) was used.
8 was closely attached to the copper plating 7, a conductor forming mask 9 corresponding to the fuse pattern and the electrode pattern was placed, and after exposure to ultraviolet rays, development was performed with a 1% by weight Na2CO3 aqueous solution, and then the copper was etched with a copper chloride aqueous solution. Then, the resist film 8 was peeled off to obtain a connected body of chemically cutable photosensitive glass chip fuses having a fuse metal film 11 and an electrode 10 having a pattern as shown in FIG. Thereafter, it was divided through the slit 12 to obtain a plurality of chip fuses.

【0015】実施例2 実施例1と同様にして図3(a)に示すように感光性ガ
ラス1の上にマスク2を重ね、その上のCr蒸着面と反
対側の面にスリット用透過部を充分に覆う厚さ188μ
mのポリエチレンテレフタレートのフィルム(東レ製、
商品名ルミラー)13を重ね、以下実施例1と同様に紫
外線照射、一次熱処理をして図3(b)に示すようにL
i2O・SiO2結晶4を析出させ、次いでHFエッチ
ングを行い、更に650℃で5時間二次熱処理して図3
(c)に示すようにスルーホール孔5及びスリット12
を有するチップヒューズ用基板6を得た。次いで通常の
厚膜スクリーン印刷法でデュポン社製銅ペースト992
2を表面、裏面及びスルーホール内に印刷し、焼付けて
図4に示すような形状の電極10及びヒューズ金属膜1
1を有する化学切削性感光性ガラスチップヒューズの連
結体を得た。次いでスリット12から分割して複数個の
チップヒューズを得た。
Example 2 In the same manner as in Example 1, a mask 2 was placed on a photosensitive glass 1 as shown in FIG. Thickness 188μ to sufficiently cover
m polyethylene terephthalate film (manufactured by Toray,
Lumirror (trade name) 13 were stacked and then subjected to ultraviolet irradiation and primary heat treatment in the same manner as in Example 1 to form L as shown in Figure 3(b).
The i2O/SiO2 crystal 4 was precipitated, then HF etched, and then subjected to secondary heat treatment at 650°C for 5 hours to form the structure shown in Fig. 3.
As shown in (c), the through hole hole 5 and the slit 12
A chip fuse substrate 6 having the following was obtained. DuPont Copper Paste 992 was then applied using a conventional thick film screen printing method.
2 is printed on the front surface, back surface, and inside the through hole, and baked to form the electrode 10 and the fuse metal film 1 in the shape shown in FIG.
A chemically cutable photosensitive glass chip fuse connector having a chemical cutting property of No. 1 was obtained. Next, it was divided through the slit 12 to obtain a plurality of chip fuses.

【0016】比較例 厚さ0.635mmで60×60mmの96%アルミナ
基板に直径0.8mmのスルーホールを実施例1と同一
位置に開孔したチップヒューズ用基板(日立化成工業製
、ハロックス552)を用意した。次いで日立化成工業
製の脱脂液HCR−201で洗浄、水洗、乾燥後350
℃に加熱したNaOH融液中で5分間浸漬して表面を粗
化後濃度10重量%のH2SO4溶液中に5分間浸漬し
、出力300Wの超音波振動エネルギーを印加してセラ
ミック表面を中和した。次いで実施例1と同一条件で銅
めっき、フォトリソ、エッチングして実施例1と同じパ
ターンのヒューズ金属膜及び電極を有するセラミックチ
ップヒューズの連結体を得た。この後スライシングマシ
ーン(ディスコ製、DAD−2H−6)を用いて切断し
、複数個のチップヒューズを得た。
Comparative Example A chip fuse substrate (Halox 552 manufactured by Hitachi Chemical Co., Ltd.) in which a through hole with a diameter of 0.8 mm was opened in the same position as in Example 1 on a 96% alumina substrate of 60 x 60 mm with a thickness of 0.635 mm. ) was prepared. Then, after washing with degreasing liquid HCR-201 manufactured by Hitachi Chemical, washing with water, and drying,
After roughening the surface by immersing it in a NaOH melt heated to ℃ for 5 minutes, it was immersed in a H2SO4 solution with a concentration of 10% by weight for 5 minutes, and ultrasonic vibration energy with an output of 300 W was applied to neutralize the ceramic surface. . Next, copper plating, photolithography, and etching were performed under the same conditions as in Example 1 to obtain a ceramic chip fuse connector having the same pattern of fuse metal film and electrode as in Example 1. Thereafter, it was cut using a slicing machine (DAD-2H-6, manufactured by DISCO) to obtain a plurality of chip fuses.

【0017】実施例1及び比較例で得られたチップヒュ
ーズについて、JIS  C8352に規定する方法に
準拠して直流溶断性試験を行い、速断性を確認した。そ
の結果を図5に示す。図5から明らかなように実施例1
のチップヒューズの方が早く溶断する。即ちヒューズの
構成(質及びパターン)が同一でも、ヒューズの支持基
板をアルミナセラミックよりも比熱、熱伝導率及び密度
が小さい感光性ガラスに代えることで速断性が改良され
る。
[0017] The chip fuses obtained in Example 1 and Comparative Example were subjected to a DC fusing test in accordance with the method specified in JIS C8352 to confirm their fast blowing properties. The results are shown in FIG. As is clear from FIG. 5, Example 1
The chip fuse blows faster. That is, even if the structure (quality and pattern) of the fuse is the same, rapid blowing performance is improved by replacing the support substrate of the fuse with photosensitive glass, which has lower specific heat, thermal conductivity, and density than alumina ceramic.

【0018】[0018]

【発明の効果】本発明のチップヒューズ用基板は、化学
切削性感光性ガラス板にスルーホール及び多数のチップ
ヒューズに分割するスリットを形成するので、寸法精度
のよいチップヒューズの量産性に優れ、またそのチップ
ヒューズは速断性に優れる。
Effects of the Invention The chip fuse substrate of the present invention has through-holes and slits dividing it into a large number of chip fuses in a chemically cuttable photosensitive glass plate, so it is excellent in mass production of chip fuses with good dimensional accuracy. Moreover, the chip fuse has excellent fast-acting properties.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】本発明の実施例になるチップヒューズの製造工
程を示す図。
FIG. 1 is a diagram showing the manufacturing process of a chip fuse according to an embodiment of the present invention.

【図2】本発明の実施例になるチップヒューズの平面図
FIG. 2 is a plan view of a chip fuse according to an embodiment of the present invention.

【図3】本発明の実施例になるチップヒューズの製造工
程を示す図。
FIG. 3 is a diagram showing a manufacturing process of a chip fuse according to an embodiment of the present invention.

【図4】本発明の実施例になるチップヒューズの平面図
FIG. 4 is a plan view of a chip fuse according to an embodiment of the present invention.

【図5】チップヒューズの溶断特性を示すグラフ。FIG. 5 is a graph showing the blowing characteristics of a chip fuse.

【図6】スリットの形成状態を示す拡大図。FIG. 6 is an enlarged view showing how slits are formed.

【図7】従来のチップヒューズを示す図。FIG. 7 is a diagram showing a conventional chip fuse.

【図8】従来のチップヒューズを示す図。FIG. 8 is a diagram showing a conventional chip fuse.

【符号の説明】[Explanation of symbols]

1    感光性ガラス 2    マスク 3    Cr蒸着膜 4    Li2O・SiO2結晶 5    スルーホール 6    チップヒューズ用基板 7    銅めっき膜 8    感光性レジストフィルム 9    導体形成用マスク 10  電極 11  ヒューズ金属膜 12  スリット 13  フィルム 14  アルミナセラミック 15  ワイヤー 16  被覆層 1 Photosensitive glass 2 Mask 3 Cr vapor deposited film 4 Li2O/SiO2 crystal 5 Through hole 6 Chip fuse board 7 Copper plating film 8 Photosensitive resist film 9 Conductor formation mask 10 Electrode 11 Fuse metal film 12 Slit 13 Film 14 Alumina ceramic 15 Wire 16 Coating layer

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】  化学切削性感光性ガラス板に多数のチ
ップヒューズに分割するスリットを形成したチップヒュ
ーズ用基板。
1. A chip fuse substrate, in which a chemically cuttable photosensitive glass plate is formed with slits for dividing it into a large number of chip fuses.
【請求項2】  請求項1記載のチップヒューズ用基板
に、チップヒューズごとに、対向する二つの電極及び該
電極を電気的に接続するヒューズ金属膜を配設したチッ
プヒューズ。
2. A chip fuse, wherein the chip fuse substrate according to claim 1 is provided with two opposing electrodes and a fuse metal film for electrically connecting the electrodes.
JP1005991A 1991-01-30 1991-01-30 Base for chip fuse and chip fuse using it Pending JPH04245132A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1005991A JPH04245132A (en) 1991-01-30 1991-01-30 Base for chip fuse and chip fuse using it

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1005991A JPH04245132A (en) 1991-01-30 1991-01-30 Base for chip fuse and chip fuse using it

Publications (1)

Publication Number Publication Date
JPH04245132A true JPH04245132A (en) 1992-09-01

Family

ID=11739818

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1005991A Pending JPH04245132A (en) 1991-01-30 1991-01-30 Base for chip fuse and chip fuse using it

Country Status (1)

Country Link
JP (1) JPH04245132A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1996041359A1 (en) * 1995-06-07 1996-12-19 Littelfuse, Inc. Improved method and apparatus for a surface-mounted fuse device
US5790008A (en) * 1994-05-27 1998-08-04 Littlefuse, Inc. Surface-mounted fuse device with conductive terminal pad layers and groove on side surfaces
US5844477A (en) * 1994-05-27 1998-12-01 Littelfuse, Inc. Method of protecting a surface-mount fuse device
US5974661A (en) * 1994-05-27 1999-11-02 Littelfuse, Inc. Method of manufacturing a surface-mountable device for protection against electrostatic damage to electronic components
US6878004B2 (en) 2002-03-04 2005-04-12 Littelfuse, Inc. Multi-element fuse array

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5790008A (en) * 1994-05-27 1998-08-04 Littlefuse, Inc. Surface-mounted fuse device with conductive terminal pad layers and groove on side surfaces
US5844477A (en) * 1994-05-27 1998-12-01 Littelfuse, Inc. Method of protecting a surface-mount fuse device
US5943764A (en) * 1994-05-27 1999-08-31 Littelfuse, Inc. Method of manufacturing a surface-mounted fuse device
US5974661A (en) * 1994-05-27 1999-11-02 Littelfuse, Inc. Method of manufacturing a surface-mountable device for protection against electrostatic damage to electronic components
US6023028A (en) * 1994-05-27 2000-02-08 Littelfuse, Inc. Surface-mountable device having a voltage variable polgmeric material for protection against electrostatic damage to electronic components
WO1996041359A1 (en) * 1995-06-07 1996-12-19 Littelfuse, Inc. Improved method and apparatus for a surface-mounted fuse device
US6878004B2 (en) 2002-03-04 2005-04-12 Littelfuse, Inc. Multi-element fuse array

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