JPH04175039A - Demodulation circuit - Google Patents

Abstract

PURPOSE:To obtain a digital signal output with less error by comparing the quantity of relation of an error with respect to each identification value and each sampling point and selecting an output of an identification circuit whose error is minimum.. CONSTITUTION:An identification section is provided with identification circuits 101a-101i, to which an analog base band signal 1 is inputted. A voltage division circuit 201 forms three identification levels 21-23 whose level differs from each other. A delay circuit 301 forms three sampling points 31-33 based on a sampling point 3. An identification level 2' being one of the three identification levels is inputted to a discrimination value setting circuit 601, in which three criteria 81'-83' are set. An eye pattern inputted to discrimination circuits 701-703 is sampled at the sampling point 3' and discriminated by the three criteria 81'-83' and converted into a digital signal, and the output is compared to be an error signal 4'. Error signals 41-49 are compared by a comparator circuit 40 and an identification circuit whose error is least is selected out, a selection circuit 501 selects an identification data from the identification circuit whose error is least and the result is sent as an output data 7.

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a demodulation circuit in a demodulator for multilevel orthogonal modulated waves used in digital wireless transmission, and particularly to an identification section of the demodulation circuit.

(Prior Art) The identification section of a conventional demodulation circuit is configured using one type of identification circuit.

This identification circuit converts the Nyquist waveform-shaped analog baseband signal (hereinafter referred to as "eye pattern") into one
The determination was made based on a constant optimal discrimination value at two optimal sampling points, and the result was converted into a digital signal.

(Problems to be Solved by the Invention) Conventional demodulation circuits require optimum sampling points and optimum discrimination values in their discrimination circuits, and therefore require a large amount of time for adjustment. The problem is that it requires a complex compensation circuit to withstand changes in environmental conditions such as voltage fluctuations.

The present invention was made in view of these problems, and its purpose is to easily adjust the discrimination value, sampling point, or analog baseband signal (eye pattern) without requiring a complicated compensation circuit. ).An object of the present invention is to provide a demodulation circuit equipped with an identification section that can perform identification with fewer errors even if there is a variation in

(Means for Solving the Problems) In order to achieve the above object, the demodulation circuit of the present invention has the following configuration.

That is, the demodulation circuit of the first invention is a demodulation circuit in a demodulator for a multilevel orthogonal modulated wave used in digital wireless transmission; a plurality of identification circuits, each of which is provided with a different identification value and one sampling point is provided in common;
a comparison circuit that compares the magnitude relationship of error signals output by each of the plurality of identification circuits and detects the identification circuit with the smallest error; a selection circuit that selects and outputs the output data of the identification circuit detected by the comparison circuit; It is characterized by the fact that it is equipped with

Further, the demodulation circuit of the second invention is a demodulation circuit in a demodulator of a multilevel orthogonal modulated wave used in digital wireless transmission; a plurality of identification circuits, each of which is provided with a different sampling point and which is provided with one identification value in common;
a comparison circuit that compares the magnitude relationship of error signals output by each of the plurality of identification circuits and detects the identification circuit with the smallest error; a selection circuit that selects and outputs the output data of the identification circuit detected by the comparison circuit; It is characterized by the fact that it is equipped with

Further, a demodulation circuit according to a third aspect of the invention is a demodulation circuit in a demodulator for a multi-level orthogonal modulated wave used in digital wireless transmission, wherein the identification section has an output of identification data and an error detection output. A plurality of identification circuits that carry out the following steps, each of which is given a different identification value and a predetermined number of identification circuits that are given one sampling point in common, the sampling points are different among the plurality of sets, a plurality of identification circuits having different identification values among a plurality of sets of a predetermined number of identification circuits to which different sampling points are given and one identification value is given in common; the plurality of identification circuits; A comparison circuit that compares the magnitude relationship of the error signals outputted by each of the discrimination circuits and detects the discrimination circuit with the least error; and a selection circuit that selectively outputs the output data of the discrimination circuit detected by the comparison circuit. This is a characteristic feature.

(Function) Next, the function of the demodulation circuit of the present invention configured as described above will be explained.

The identification section of the demodulation circuit includes a plurality of identification circuits, and outputs an error signal for each identification value (first invention), and outputs an error signal for each sampling point (second invention), and further outputs an error signal for each identification value. and output an error signal for each sampling point (third invention)
, and automatically detects the identification circuit with the least error, and uses the identification data of the detected identification circuit as output data.

In this way, even if there are variations in the identification value, sampling point, or analog baseband signal (eye pattern), identification can be performed with fewer errors.

(Example) Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows an identification section of a demodulation circuit according to an embodiment of the present invention. Pattern) 1 is input for each.

One discrimination value 2 and one sampling point 3 are set by a demodulation circuit control section (not shown), but discrimination value 2 is input to the voltage divider circuit 201, and sampling point 3 is input to the delay circuit 301. do.

The voltage dividing circuit 201 forms and outputs three discrimination values (21, 22, 23) having different levels from the set discrimination value 2. The relationship between these identification values (21, 22° 23) and the eye pattern 1 is as shown in FIG. 2, for example.

That is, the discrimination value 22 is set near the center of the eye pattern in the amplitude direction, and the discrimination values 21 and 23 are set at appropriate level positions equidistant above and below the discrimination value 22. 1 identification value 21
is commonly given to the identification circuits 101a, 101b, and 101c, and one identification value 22 is given to the identification circuits 101d, 101c.
01e and 101f, and one identification value 23 is given to identification circuits 101g, 101h, and 1011.
Commonly given to

Further, the delay circuit 301 operates at the set sampling point 3.
Three sampling points (31,
32, 33) and output.

The relationship between these sampling points (31, 32, 33) and A-I pattern 1 is as shown in FIG. 3, for example. That is, one sampling point 32 is set near the center of the eye pattern 1 in the horizontal direction (time axis), and sampling points 31 and 33 are set at appropriate timing positions equally spaced before and after the sampling point 32. One sampling point 31 is identified by the identification circuits 101a, 101d, and 101.
g, one sampling point 32 is commonly given to the identification circuits 101b, 101e, and 101h, and one sampling point 33 is provided to the identification circuits 101
Commonly given to 101f, 101i, and 101i.

In short, one vertical column of identification circuits (101a, 101ci,
101g), (101b, 101e, 101h), and (101c, 101f, 101i), each set of identification circuits is given a different identification value and one sampling point in common. .

The sampling points for each set are different. In addition, one horizontal row of identification circuits (101a, 101b, 1
01c), same (101d, 101e, 10f>, same (1
01g, 101h, 101i), each set of identification circuits is provided with different sampling points, and one identification value is provided in common. The identification values between each set are different from each other.

Such an identification circuit is configured as shown in FIG. 4, for example. In FIG. 4, the discrimination value 2' is one of the three types of discrimination values described above, and this is determined by the discrimination value setting circuit 6.
The 0 judgment value setting circuit 601 input to 01 sets three judgment values (81', 82', 83') from the input identification value 2'.
) are respectively set to 0. For example, when the identification value 2' is the identification value 22 (Fig. 2), as shown in Fig. 5,
The judgment value 82' is set equal to the discrimination value 22, and the judgment value 81
' and 83' are set by appropriately shifting the levels above and below the judgment value 82' at equal intervals. These judgment values (81', 82'
, 83') are given to corresponding ones of the judgment circuits (701°, 702, 703).

Further, the sampling point 3' is any one of the three types of sampling points mentioned above, but the determination circuit (701, 702
, 703). In FIG. 5, sampling point 3' is shown as sampling point 32 (FIG. 3).

Eye pattern 1 input to the judgment circuit (701, 702, 703) is sampled at sampling point 3',
Judgment is made based on the judgment values (81', 82', 83'),
converted into a digital signal. At this time, the judgment value 82'
The output data of the determination circuit 702 is the identification data 5.
2', but at the same time each judgment diagram #(701,
702 and 703) are compared, and the comparison result is output as an error signal 4'. This occurs when the eye pattern is degraded by various noises, and indicates the degree of degradation.

In other words, in FIG. 1, the error signals (41 to 49) output by the nine discrimination circuits when eye pattern 1 deteriorates are not the same but have different contents due to differences in discrimination values and sampling points. be.

Therefore, the comparison circuit 401 compares the error signals (41 to 49) of the nine discrimination circuits, selects the discrimination circuit with the least error, and inputs the selection information 6 to the selection circuit 501. Identification data (5
1 to 59) are input, the identification data of the identification circuit with the smallest error is selected according to the selection information 6, and it is sent out as the output data 7.

Note that, as is clear from the above description, the number of identification values and the number of sampling points set for one eye pattern can be set to any desired number.

(Effects of the Invention) As explained above, according to the demodulation circuit of the present invention, the identification section is configured with a plurality of identification circuits, and the error for each identification value (first invention), the error for each sampling point ( Furthermore, the magnitude relationship of the error (third invention) for each identification value and each sampling point is compared, and the output data of the identification circuit with the least error is automatically selected. Even if there are fluctuations in values, sampling points, or analog baseband signals (eye patterns), the effect is that a digital signal output with fewer errors can be obtained without the need for complicated adjustments or complicated compensation circuits.

Further, although the present invention includes a plurality of identification circuits, since they all have the same configuration, they can be integrated, the circuit scale does not increase, and there is an effect that it is suitable for mass production.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of the configuration of an identification section of a demodulation circuit according to an embodiment of the present invention, FIG. 2 is a relationship diagram between an eye pattern and an identification value, and FIG. 3 is a relationship diagram between an eye pattern and sampling points. FIG. 4 is a block diagram of the configuration of the identification circuit, and FIG. 5 is an explanatory diagram of the identification operation. 101a to 1011...Identification circuit, 201.
...Voltage divider circuit, 301...Delay circuit,
401... Comparison circuit, 501...
selection circuit. Agent Patent Attorney Yoshihiro Hachiman Hiroshi I9-', it: Tree plot diagram $, 2 Figure/-m-I2 matter>, 21-23-・Identification L, 3
/-33---Pung ν>, 7', J! , $ 3 Figure

Claims (3)

[Claims] (1) A demodulation circuit in a demodulator for multilevel orthogonal modulation waves used in digital wireless transmission;
a plurality of identification circuits, the identification unit of which outputs identification data and outputs error detection, each of which is given a different identification value and one sampling point in common; a comparison circuit that compares the magnitude of the error signals output by each of the identification circuits and detects the identification circuit with the least error; a selection circuit that selectively outputs the output data of the identification circuit detected by the comparison circuit;
A demodulation circuit comprising: (2) A demodulation circuit in a demodulator for multilevel orthogonal modulated waves used in digital wireless transmission;
a plurality of identification circuits, the identification unit of which outputs identification data and outputs error detection, each of which is given a different sampling point and one identification value in common; a comparison circuit that compares the magnitude of the error signals output by each of the identification circuits and detects the identification circuit with the least error; a selection circuit that selectively outputs the output data of the identification circuit detected by the comparison circuit;
A demodulation circuit comprising: (3) A demodulation circuit in a demodulator for multilevel orthogonal modulated waves used in digital wireless transmission;
The identification unit is a plurality of identification circuits that output identification data and detect errors, and a plurality of sets of a predetermined number of identification circuits each given a different identification value and one sampling point in common. The sampling points are different between each set, or the identification values are different between a plurality of sets of a predetermined number of identification circuits each having a different sampling point and one identification value in common. a comparison circuit that compares the magnitude relationship of the error signals outputted by each of the plurality of discrimination circuits and detects the discrimination circuit with the least error; and a comparison circuit that detects the discrimination circuit with the least error; A demodulation circuit comprising: a selection circuit for selectively outputting;