JPH03280619A - Power element driving circuit - Google Patents

Abstract

PURPOSE:To obtain an inexpensive power element drive circuit by using a charge pump circuit and an isolation means in common to employ an IC with low breakdown voltage. CONSTITUTION:The drive circuit is provided with a 1st driving IC 15 to drive a 1st power element 1, a 2nd driving IC 16 to drive a 2nd power element 4, a 1st isolation means 17 electrically isolating an output signal of a control means 14 and an input signal to the 1st driving IC 15 and a 2nd isolation means 18 electrically isolating an output signal of the control means 14 and an input signal to the 2nd driving IC 16. Moreover, a circuit charging a capacitor 8 when a 2nd power element 4 is turned on and using the capacitor voltage as a 2nd power supply 7 for driving the 1st power element 1 is referred to as a charge pump circuit. Thus, the inexpensive power element driving circuit is realized.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a drive circuit for power elements connected in series, typified by a semiconductor power converter.

[Prior art] FIG. 21 shows, for example, International Rec
t1fier Power MOS-FET App
FIG. 2 is a circuit diagram of a conventional power drive shown in the lication notes. In the figure, (1) is a first power element, which here consists of a MOS-FET (2) and a diode (3) connected antiparallel to it. (4) is the second power element connected in series with the first power element (1), (5) is the first and second power element (1), and (4) is the drive IC1 (6). Drive I
The first power supply supplies power to C(5), and the second power supply (7) supplies power to C(5).
a second power source that supplies power to the drive IC (5), consisting of a capacitor (8) and a rectifier diode (9) that are charged by the first power source (6) when the power element (4) is turned on;
10) is a DC power supply, (11) is a load, (12), (
13) is a capacitor for obtaining DC neutral point potential, (1
4) is a control means for outputting ignition signals for the first and second power elements (1) and (4).

Next, the operation will be explained. FIG. 21 is a circuit diagram for applying alternating current to the load (11) by alternately turning on the first and second power elements (1) and (4) so that they do not overlap. When the first power element (1) is ON, a positive voltage is applied to the load (11
), and when the second power element (4) is ON, a negative voltage is applied to the load (11) when viewed from the DC neutral point potential.

First, driving of the second power element (4) will be explained. When the control means (14) applies a signal to the input terminal of the drive IC (5) to turn on the second power element (4), the drive IC (5) turns on the second power element (4). The first power supply (6) connected to the source terminal applies a positive voltage between the gate and source terminals of the second power element (4) to turn on the second power element (4). At this time, a path of first power supply (6) - diode (9) - capacitor (8) - second power element (4) is created, and the capacitor (8) is charged by the first power supply (6). . This capacitor (8) is connected to the source terminal of the first power element (1), and since its voltage is a positive voltage when viewed from the source terminal of the first power element (1), the power It functions as a second power source (7) for driving the element (1). The control means (14) controls the drive IC (5).
When a signal to turn off the second power element (4) is applied to the input terminal of the drive IC (5), the drive IC (5) short-circuits between the gate and source terminals of the second power element (4) and turns off the second power element (4). Turn off element (4).

Next, driving of the first power element (1) will be explained. When the control means (14) applies a signal to turn on the first power element (1) to the input terminal of the drive IC (5), the drive IC (5) turns on the first power element (1). A second power supply (7) consisting of a capacitor (8) connected to the source terminal causes the gate of the first power element (1) to be
A positive voltage is applied between the source terminals, and the first power element (
1) Turn on. At this time, the source terminal of the first power element has a potential close to the voltage of the DC power supply (10), so the diode (9) is turned off, and the capacitor (8) is connected to the drive IC (5) and the first power element. (1) Gradually discharge while supplying power only between the gate and source terminals.

The control means (14) causes the input terminal of the drive (5) to
When a signal is applied to turn off the first power element (1), the drive IC (5) turns off the gate of the first power element (<1).
Short-circuit the source terminals and turn off the first power element (1)
F.

As is clear from the above operation, the drive IC (5) includes a power element (1) for driving the first power element (1).
) is connected to the source terminal of the second power element (4), that is, the drain terminal of the second power element (4).
Not only the voltage of the first power source (6) for driving in step 4) but also a voltage close to the voltage of the DC power source (IO) is applied. Therefore, the drive IC (5) connects the first and second power elements (1
), (4) is not a low voltage IC with withstand voltage close to the withstand voltage between the gate and source terminals, but is close to the withstand voltage between the drain and source terminals of the first and second power elements (1) and (4). A high voltage IC with withstand voltage is used.

[Problems to be Solved by the Invention] Conventional power element drive circuits are configured as described above, but the circuit becomes expensive due to the use of high-voltage ICs, and negative voltage is generated between the signal input terminals of the power elements. There was a problem in that it was not possible to apply

This invention has been made to solve the above-mentioned problems.The first invention aims to obtain an inexpensive power element drive circuit using a low voltage IC, and the second invention aims to provide a power element drive circuit using a low voltage IC. The object of the present invention is to obtain a power element drive circuit that can also apply a negative voltage between signal input terminals.

[Means for Solving the Problems] The power element drive circuit according to the first invention uses a charge pump circuit and an insulating means in combination, so that high voltage IC
Instead, a low voltage IC is used.

The power element drive circuit according to the second invention is capable of applying a negative voltage between the signal input terminals of the power element by adding a charge pump circuit and a power supply for applying a negative voltage.

[Function] The power element drive circuit in the first invention uses a charge pump circuit and an insulating means in combination to prevent high voltage from being applied to the drive IC, thereby making it possible to use a low breakdown voltage IC.

The power element drive circuit according to the second aspect of the invention uses the charge pump circuit to apply a negative voltage to the signal input terminal of the power element with minimal addition of a power source.

[Embodiments of the Invention] Hereinafter, a first embodiment of the first invention will be described with reference to the drawings. In FIG. 1, a first power element (1) MOS-EFT
(2), diode (3), second power element (4),
First power supply (6), second power supply (7) capacitor (8)
Diode (9), DC power supply (10), load (11)
), capacitors (12), (13), control means (14)
) is the same as the conventional technology, so the explanation will be omitted.

(15) is a first drive IC1 (16) for driving the first power element (1) is a second drive IC1 (17) for driving the second power element (4) is a control means (1
(18) first insulating means for electrically insulating the output signal of (4) and the input signal of the first drive IC (15);
is the output signal of the control means (14) and the second drive IC (1
B) is a second insulating means for electrically insulating the input signal.

FIG. 1 shows a load (1
1) is a circuit diagram for applying alternating current to. When the first power element (1) is ON, a positive voltage is applied to the load (11) when viewed from the DC neutral point potential, and the second power element (
4) is ON, a negative voltage is applied to the load (11) when viewed from the DC neutral point potential. This operation is shown in Figures 1 and 2.
This will be explained using figures.

First, driving of the second power element (4) will be explained. When the output g- of the control means (14) becomes "L",
The second drive IC (1
A signal for turning on the second power element (4) is applied to the input terminal of B>. Then, the second drive IC (16) uses the first power supply (6) connected to the source terminal of the second power element (4) to turn on the gate of the second power element (4).
A positive voltage Ec is applied between the source terminals to turn on the second power element (4). At this time, the first power supply (6) -
A diode (9)-capacitor (8)-second power element (4) path is created, and the capacitor (8) is charged by the first power source (6).

Since this capacitor (8) is connected to the source terminal of the first power element (1), and its voltage is a positive voltage when viewed from the source terminal of the first power element (1),
It functions as a second power source (7) for driving the power element (1). When the output g- of the control means (14) becomes "Ho", the second drive I
Connect the second power element (4) to the input terminal of C (1G).
A signal for FF is added. Then, the second drive IC
(1B) short-circuits between the gate and source terminals of the second power element (4) to turn off the second power element (4).

Next, driving of the first power element (1) will be explained. When the output g+ of the control means (14) becomes "L", the first
A signal for turning on the first power element (1) is applied to the input terminal of the first drive IC (15) via the insulating means (17). Then, the first drive IC (15) drives the first power element (1) by the second power supply (7) consisting of a capacitor (8) connected to the source terminal of the first power element (1). A positive voltage Vc is applied between the gate and source terminals of the first power element (1) to turn on the first power element (1). At this time, the source terminal of the first power element is connected to the DC power source (10).
Diode (9) is OFF because it has a potential close to the voltage of
L, the capacitor (8) gradually connects the first insulating means (17), the first drive IC (15), and the first power element (1) while supplying power only between the gate and source terminals. discharge to. When the output g+ of the control means (14) becomes "Hl", the first drive IC is connected via the first insulation means (17).
Turn off the first power element (1) to the input terminal of (15)
A signal is added to Then, the first drive IC(1
5) short-circuits between the gate and source terminals of the first power element (1) to turn off the first power element (1).

As described above, the capacitor (8) is charged when the second power element (4) is turned on, and the capacitor voltage is used as the second power supply (7) for driving the first power element (1). The circuits are collectively referred to as charge pump circuits. In this charge pump circuit, the second power element (4)
is ON only when the first power supply (6) - diode (9
)-capacitor (8)-second power element (4) charges the capacitor (8), and when the second power element (4) is OFF, the capacitor (8) is discharged. . Therefore, as shown in FIG. 2, the voltage of the charge pump capacitor (8) pulsates in synchronization with the switching of the power element (4). However, if a voltage-driven power element such as a MOS-FET is used, the current supplied to the gate terminal of the first power element (1) can be small, so the capacitance of the capacitor (8) can be adjusted appropriately. By making a selection, it is possible to keep this pulsation within an allowable range. In addition, a second power element (4
) is ON, the capacitor (8) is charged, so the charge pump current 1c becomes an intermittent current, and the second
The OFF time of the power element (4) is long and the capacitor (8
) The larger the voltage drop, the higher its peak value. If the ON time of the second power element (4) is long, even after charging the capacitor (8), the first insulating means (17) is connected from the first power source (8) through the charge pump path.
) and the first drive IC (15).

As is clear from the above operation, the first power element (1)
The source terminal potential of the first and second power elements (1) is
, (4), the voltage is close to the voltage of the DC power supply (10), but unlike the conventional technology, the first and second drive ICs (15) and (1B> are connected to the first and second drive ICs (15) and (1B>, respectively). The second insulating means (17), (18) and the charge pump circuit connect the first and second power supplies (6), (7).
), the first power source (6)
No higher voltage is applied. Therefore, the first and second drive ICs (15) and (1B) have low breakdown voltages that are close to the breakdown voltage between the gate and source terminals of the first and second power elements (1) and (4). IC is fine.

FIG. 3 shows a second embodiment of the first invention. In this embodiment, the first invention is applied to a three-phase inverter and used to drive a three-phase AC motor.

In FIG. 3, a first power element (1), a diode (3), a second power element (4), a first power source (6),
Second power supply (7), capacitor (8), diode (9)
), a DC power supply (10), a control means (14), a first drive IC (15), a second drive IC (1B), a first insulation means (I7), and a second insulation means (18). ) is the same as in Example 1 of the first invention, so the explanation will be omitted. In this embodiment, a switching power supply is used as the first power supply (6), a three-phase rectifying and smoothing circuit is used as the DC power supply (1O), and a three-phase AC motor is used as the load (11). (19) together with the diode (3) are connected to the first and second
IG forming the power elements (1) and (4) of
B T , (20), (21), and (22) are U, V, and W phase switching circuits, respectively, and have the same configuration as the first embodiment of the first invention. (23) is the switching MOS-FET of the switching power supply, (24) is the transformer of the switching power supply, (25) is the rectifier diode of the switching power supply, (26) is the smoothing capacitor of the switching power supply, and (27) is the control of the switching power supply. Means, (2
8) is a three-phase AC power supply, (29) is a three-phase rectifier circuit, (30
) is a smoothing capacitor.

Next, the operation will be explained. The individual operations of the U-, V-, and W-phase switching circuits (20), (21), and (22) are the same in configuration as in Example 1 of the first invention, so details will be omitted. Furthermore, although the configurations of the first power source (6) and the DC power source (10) were shown in more detail, their descriptions are omitted because they are functionally the same as in Example 1 of the first invention. .

FIG. 4 is an explanatory diagram of a triangular wave comparison method often used to control a three-phase inverter like this embodiment. The control means (14) controls the three-phase reference signals eu, ev, ew and the triangular wave carrier e as shown in FIG.
t is compared, and when the reference signal is larger than the triangular wave carrier, a signal is output to turn on the first power element (1), and when the opposite is true, the second power element (4) is turned on. Output a signal. At this time, the first
The ON signal of the power element (1) and the second power element (
4) Preventing the ON signals from overlapping is the same as in the first embodiment of the first invention. In this way, the U, V, W phase switching circuit (20) <2
1) and (22) respectively output the voltages shown in (b), (c), and (d) in Figure 4 when viewed from the neutral point of the DC power supply (10), and the line voltage is (f') in Figure 4
, (g) and (h), resulting in three-phase AC voltage.

The waveforms (b), (c), and (d) in Figure 4 above are the second waveforms.
Since the waveform of the load voltage VR is the same as that shown in the figure, it can be seen that the operation of each phase in the three-phase inverter is the same as in the first embodiment of the first invention. This is true both for inverters that are in the same phase and for inverters that operate under different controls.

Embodiment 3 of the first invention is shown in FIG. In this embodiment, the first power supply (6) of the second embodiment of the first invention is replaced with a simpler series power supply instead of a switching power supply.

In FIG. 5, (31) is a step-down resistor, (32) is a constant voltage diode that determines the power supply voltage, and (33) is a capacitor for voltage stabilization. All other constituent elements are the same as those in the second embodiment of the first invention, so their explanation will be omitted. Further, the operation is also functionally the same as the second embodiment of the first invention, except that the first power supply (6) is replaced with a series power supply, so the explanation will be omitted.

Embodiment 4 of the first invention will be explained with reference to FIG.

This embodiment relates to initial charging of a charge pump circuit. The circuit configuration is the same as the first embodiment of the first invention described above.
2.3 may be used, so rewriting and explanation of the circuit diagram will be omitted. However, FIG. 6 is drawn assuming the three-phase inverter of the second embodiment of the first invention shown in FIG. 3.

Further, in FIG. 6, since the operation after starting is the same as that in the second embodiment of the first invention, the explanation thereof will be omitted. As can be seen from the operation description of Embodiment 1 of the first invention, the second power supply (7) connects the second power element (4) to the ONL and the capacitor (8).
It only functions as a power source after being charged. Therefore, if normal operation is required immediately after starting, the second power element (4) is turned on before starting, and the capacitor (
8) It would be effective to provide a charging period. FIG. 6 shows this operation.

In FIG. 6, U-, V-, and W- are U, V, and W-, respectively.
U+V+ W+ is the output signal of the control means (14) corresponding to the first power element (1) of U, V, and W phases, respectively, and the signal is " When the voltage is L'', the corresponding power elements are turned on. As shown in Figure 6, during the initial charging period, U-, V-, W
- to “L” and U+ V+ W+ to “H” 1
From this, each phase switching circuit (20), (21),
(22) Charge the capacitor (8) to enable normal operation immediately after startup. During this initial charging period, only the second power element (4) of each phase is ONL, so the voltages at the output terminals U, V, and W are all equal. Therefore, the output line voltage becomes zero, no voltage is applied to the load, and no abnormal operation of the load (11) is caused. This means that 2
The same holds true for inverters with a greater number of phases.

Embodiment 5 of the first invention will be described with reference to FIG. This embodiment relates to initial charging of a charge pump circuit. Since the circuit configuration may be any of the second and third embodiments of the first invention described above, the circuit diagram will not be repeated or explained. However, FIG. 6 is drawn assuming the three-phase inverter of the second embodiment of the first invention shown in FIG. 3. In FIG. 7, since the operation after starting is the same as that in the second embodiment of the first invention, a description thereof will be omitted. Similar to the fourth embodiment of the first invention, this embodiment also includes an initial charging period to enable normal operation immediately after startup. The difference from the fourth embodiment of the first invention is that, while the fourth embodiment of the first invention performs initial charging for three phases simultaneously, this embodiment performs initial charging for each phase. This initial charging operation is shown in FIG.

As shown in FIG. 7, U and V during the initial charging period.

The first power element (1) of the W phase is turned off, and the U
.

If the second power elements (4) of the V and W phases are turned on in sequence with a time interval longer than the circuit time constant of the charge pump path, the total sum of charge pump currents flowing from the first power supply (6) ic -i The maximum value of eu+t ev+ i cv is approximately 1/3 of that when initial charging is performed in three phases simultaneously. This complicates the initial charging operation, but the
This is effective in reducing the size of the power supply (6), particularly in reducing the capacitance of the output smoothing capacitor (2B) of the switching power supply shown in FIG. 3 and the output voltage stabilizing capacitor (33) shown in FIG.

In this embodiment, either only the second power element (4) of each phase is ONL during the initial charging period, or both the first power element (1) and the second power element (4) are ONL. It's OFF. For this reason, output terminals U, V
, W are equal or disconnected from the power supply. Therefore, the output line voltage becomes zero, and no voltage is applied to the load.

Embodiment 6 of the first invention will be explained with reference to FIG.

This embodiment relates to initial charging of a charge pump circuit. The circuit configuration is the second embodiment of the first invention described above.
3 may be used, so the re-description and explanation of the circuit diagram will be omitted. However, FIG. 8 is drawn assuming the three-phase inverter of the second embodiment of the first invention shown in FIG. 8th
In the figure, since the operation after starting is the same as that in the second embodiment of the first invention, the explanation will be omitted. Similar to the fourth embodiment of the first invention, this embodiment also includes an initial charging period to enable normal operation immediately after startup. The difference from Embodiment 4 of the first invention is that Embodiment 4 of the first invention completes initial charging with one switching, whereas in this embodiment, initial charging is completed with multiple switchings. It is to let This initial charging operation is shown in FIG.

As shown in FIG. 8, during the initial charging period, U.

If the second power elements (4) of the V and W phases are simultaneously switched at a cycle equal to or less than the circuit time constant of the charging path, the total charge pump current flowing from the first power supply (6) ic
The average value of -ICU+iev+icv is about twice the switching duty as compared to the case where one switching initial charge is performed. Since the switching duty is 1 or less, the current can be reduced to a desired value or less by adjusting the switching duty. Although this complicates the initial charging operation, it also reduces the size of the first power supply (6).
In particular, the output smoothing capacitor (26) of the switching power supply shown in Fig. 3 and the output voltage stabilizing capacitor (3) shown in Fig.
3) is effective in reducing capacity. In this example,
During the initial charging period, the power elements of the U, V, and W phases operate in the same way, so the voltages at the output terminals U, V, and W become equal. Therefore, the output line voltage becomes zero, and no voltage is applied to the load. Further, in FIG. 8, ON signals U+, V+ of the first power element (1) of each phase.

It is obvious that similar effects can be obtained when W+ is set to "H" during the initial charging period. At this time as well, U, V
, W-phase power elements operate in the same way, so the voltages at the output terminals U, V, and W are equal, and no voltage is applied to the load.

Embodiment 7 of the first invention will be explained with reference to FIG.

This embodiment relates to limiting the charging current of the charge pump circuit, and in particular, a resistor is inserted in the charge pump path in order to limit the large charging current during initial charging of the charge pump circuit.

In FIG. 9, a second power element (4), a first power source (6), a capacitor (8), a diode (9), a DC power source (10), a load (11), a control means (14), a U,
V.

W-phase switching circuit (20), (21), (
22), Output smoothing capacitor of switching power supply (26
) is the same as the second embodiment of the first invention, so the explanation will be omitted.

(34) is a current limiting resistor.

Next, the operation will be explained. The operation of this embodiment is the first
This is basically the same as the second embodiment of the invention.

The difference is that when the second power element (4) is turned on, the first power supply (6) - current limiting resistor (34) - diode (9) - capacitor (8) - second power element (4) )
Since the capacitor (8) is charged through the path, the charging current is limited by the current limiting resistor (34). As a result, the maximum value of the charge pump current IC flowing from the first power supply (6) becomes smaller and the charging circuit time constant becomes longer, so that the first power supply (6) at the time of initial charge excitation becomes smaller.
), the voltage drop of the first power supply (6) becomes smaller, especially the output smoothing capacitor (26) of the switching power supply
It is effective in reducing the capacity of As shown in FIG. 6, the initial charging current at the time of startup of the charge pump circuit is much larger than the charge pump current during steady operation.

For this reason, the current limiting resistor (
34) may be a small resistance, and its influence on steady operation can be ignored.

In this embodiment, the current limiting resistor is shown as (35) in FIG.

One may be inserted in each phase as shown in (36) and (37), or one may be inserted in each phase as shown in (38) in Figure 11.
It is obvious that the same effect can be obtained even if it is inserted in series with the output of the first power supply (6). Furthermore, even if this embodiment is applied to the first embodiment of the first invention, similar effects can be obtained in the series power supply shown in the third embodiment of the first invention.

In addition, if normal operation is required immediately after startup, the first
It is also obvious from the similarity between this embodiment and the second embodiment of the first invention that it is effective to combine it with the initial charging operation of embodiments 4, 5, and 6 of the invention.

Next, a first embodiment of the second invention will be described with reference to FIG. 12. In FIG. 12, a first power element (1), a MOS
-EFT (2), diode (3), second power element (4), first power supply (6), second power supply (7), first capacitor (8), diode (9), DC Power supply (10
), load (11), capacitor (12), (13),
The control means (14), the first drive IC (15), the second drive IC (16), the first insulation means (17) and the second insulation means (18) are the same as in the first invention. The explanation will be omitted.

(39) is a third power supply (4o
) is the fourth terminal connected to the drain terminal of the power element (]).
The power source (41) consists of a second capacitor (42) and a rectifier diode (43) that are charged by the fourth power source (40) when the first power element (1) is conductive, and the first drive This is a fifth power source that supplies power to the IC (15).

Figure 12 shows the load (
11) is a circuit diagram for applying an alternating current to. When the first power element (1) is ON, a positive voltage is applied to the load (11) when viewed from the DC neutral point potential, and the second power element (4)
When is ON, a negative voltage is applied to the load (II) when viewed from the DC neutral point potential. This operation is shown in Figures 12 and 13.
This will be explained using figures.

First, driving of the second power element (4) will be explained. When the output g- of the control means (14) becomes "L", the second
A signal for turning on the second power element (4) is applied to the input terminal of the second drive IC (16) via the insulating means (18). Then, the second drive IC (1B) operates between the gate and source terminals of the second power element (4) by the first power supply (6) connected to the source terminal of the second power element (4). A positive voltage Eel is applied to turn on the second power element (4). At this time, a path of first power supply (6) - diode (9) - first capacitor (8) - second power element (4) is created, and the first capacitor (8) is connected to the first power supply ( 6). This first capacitor (8) is connected to the source terminal of the first power element (1), and its voltage is connected to the source terminal of the first power element (1).
), it functions as a second power source (7) for turning on the power element (1). Also, at this time, the drain terminal of the second power element has a potential close to zero, so the diode (43) is OF
F, and the second capacitor (42) is connected to the first insulating means (
17), the first drive IC (15), and the first power element (1), while gradually discharging while supplying power only between the gate and source terminals of the IC (15) and the first power element (1). The output g- of the control means (14) is H'
Then, a signal for turning off the second power element (4) is applied to the input terminal of the second drive IC (1B) via the second insulating means (1B). Then, the second drive I
C (1B) applies a negative voltage -Ee3 between the gate and source terminals of the second power element (4) by the third power supply (39) connected to the source terminal of the second power element (4). and turns off the second power element (4).

Next, driving of the first power element (1) will be explained. When the output g÷ of the control means (14) becomes "Lo," the first
A signal for turning on the first power element (1) is applied to the input terminal of the first drive IC (15) via the insulating means (17). Then, the first drive IC (15)
A second power source (7) consisting of a first capacitor (8) connected to the source terminal of the power element (1) of the first
A positive voltage Ec2 is applied between the gate and source terminals of the first power element (1) to turn on the first power element (1). At this time, the source terminal of the first power element has a potential close to the voltage of the DC power supply (lO), so the diode (9)
is OFF L, and the first capacitor (8) supplies power only between the first insulating means (17), the first drive IC (15), and the gate-source terminal of the first power element (1). Discharge gradually while supplying. Also at this time, the fourth power supply (
40) - First power element (1) - Second capacitor (
42)-diode (43) path is created and the second capacitor (42) is charged by the fourth power supply (40). This second capacitor (42) is connected to the first power element (
1) is connected to the source terminal of
Since the voltage is negative when viewed from the source terminal of the first power element (1), the fifth power element (1) cannot be turned off.
functions as a power source (41). When the output g+ of the control means (14) becomes "H", the first power element (1) is turned off to the input terminal of the first drive IC (15) via the first insulation means (17). A signal is added. Then,
The first drive IC (15) generates a negative voltage between the gate and source terminals of the first power element (1) by the fifth power supply (41) connected to the source terminal of the first power element (1). Apply voltage -Ec5 and turn off the first power element (1)
let

As described above, the circuit shown in FIG. 12 has two charge pump circuits. In the second power supply charge pump circuit, only when the second power element (4) is ON, the first power supply (6) - diode (9) - first capacitor (8)
- The first capacitor (8) is charged by the charge pump path consisting of the second power element (4), and when the second power element (4) is OFF, the first capacitor (
8) is discharged. In addition, in the charge pump circuit of the fifth power supply, only when the first power element (1) is ON, the fourth power supply (40) - the first power element (1) -
A charge pump path consisting of capacitor (42)-diode (43) at node 2 connects the second capacitor (42)
) is charged, and when the first power element (1) is OFF, the second capacitor (42) is discharged. For this, as shown in FIG. 13, the first and second capacitors (8).

The voltage at (42) is applied to the second and first power elements (4).

Pulsates in synchronization with the switching of (1). However, M
If you use a voltage-driven element like an OS-FET, the first
Since only a small current is required to be supplied to the gate terminals of the second power elements (1) and (4), the capacitances of the first and second capacitors (8) and (42) should be appropriately selected. It is possible to keep this pulsation within an allowable range. Further, only when the second power element (4) is ON, the first power element (4)
Since the capacitor (8) is charged, the charge pump current becomes an intermittent current. The value will be higher. When the ON time of the second power element (4) is long, the first capacitor (
8), power is supplied from the first power supply to the first insulating means (17) and the first drive IC (15) through the path of the charge pump. The same applies to the second capacitor (42).

As is clear from the above operation, the first power element (1
) of the first and second power elements (1
), (4) depending on the ON state, the voltage will be close to the voltage of the DC power supply (10), but as in the first invention, the first and second drive ICs (15), (1B), respectively. The first, second, third, and fifth power supplies (6), (7), (39) are connected by the first and second insulating means (17), (1g) and the two charge pump circuits. , (41), a voltage higher than the sum of the voltages of the first power source (6) and the third power source (39) is not applied. Therefore, the first and second drive ICs (15), (1
B) includes the first and second power elements (1), (4)
A low breakdown voltage IC having a breakdown voltage close to the breakdown voltage between the gate and source terminals may be used.

FIG. 14 shows a second embodiment of the second invention. In this embodiment, the second invention is applied to a three-phase inverter and used to drive a three-phase AC motor.

In FIG. 14, a first power element (1), a diode (3), a second power element (4), a second power source (7)
, first capacitor (8), diode (9), DC power supply (10), load (11), control means (14), first drive IC (15), second drive IC (1B) , 1st
insulation means (17), second insulation means (18), IG
B T (19), the switching MOS-FET (23) of the switching power supply, the control means (27) of the switching power supply, the fifth power supply (41), the second capacitor (42), and the diode (43). This embodiment is the same as Example 1 of the first invention or the second invention, so the explanation will be omitted. (4
4), (45), and (4B) are U, V, and W, respectively.
The phase switching circuit has the same configuration as the first embodiment of the second invention. (47) is a switching power supply, which includes a winding (48) for producing the first power supply (6), a rectifier diode (49), a smoothing capacitor (50), and a winding for producing the third power supply (39). wire (51), rectifier diode (
52), a smoothing capacitor (53), and a fourth power supply (
40), a winding (54) and a rectifier diode (5
5), smoothing capacitor (56), and winding wire (4g)
, (51) and (54) are wound around the transformer (57).

Regarding operation, U, V, W phase switching circuit (4
The individual operations of 4), (45), and (4B) are the same as those in the first embodiment of the second invention, and the overall operation is also the same as described in the second embodiment of the first invention. Therefore, the explanation will be omitted.

Embodiment 3 of the second invention will be explained with reference to FIG. 15.

This embodiment relates to initial charging of a charge pump circuit. The circuit configuration is the same as the first embodiment of the first invention described above.
2 may be used, so a re-description and explanation of the circuit diagram will be omitted. However, FIG. 15 is drawn assuming the three-phase inverter of the second embodiment of the second invention shown in FIG. Further, in FIG. 15, since the operation after starting is the same as that in the second embodiment of the second invention, the explanation thereof will be omitted. As can be seen from the operation description of Embodiment 1 of the second invention, the second power supply (
7) functions as a power source only after ONL the second power element (4) and charges the first capacitor (8). Further, the fifth power source (41) is connected to the first power element (
1) is ONL and after charging the second capacitor (42), it is closed and functions as a power source. Therefore, if normal operation is required immediately after startup, the second power element (4) charges the first capacitor (8) with the ONL before startup, and then the first capacitor (8) The voltage causes the first power element (1) to ONL and the second capacitor (4) to ONL.
2) It is effective to provide a charging period. This operation is shown in FIG. In FIG. 15, U-, V-, W
- are U and V, respectively.

U+, V+ to the W-phase second power element (4).

W+ is the first power element (1) of U, V, and W phases, respectively.
is the output signal of the control means (14) corresponding to the signal "
When the voltage is low, the corresponding power elements are turned on.As shown in FIG. 15, during the initial charging period, first the
, V-W- to "L" and U+V+, W+ to "Ho", the switching circuits of each phase (44), (4
5) Charge the first capacitor (8) of (4B), then turn U-V-W- to "Ho1ko, tr+, vo
By setting w+ to "L", the second capacitors (42) of the switching circuits (44), (45), and (4B) of each phase are charged. This allows normal operation immediately after startup. During this initial charging period, the first and second power elements (1), (4) of each phase
Since they operate in the same way, the voltages at the output terminals U, V, and W are all equal. Therefore, the output line voltage becomes zero, and no voltage is applied to the load. This also holds true for inverters having two or more phases.

Embodiment 4 of the second invention will be explained with reference to FIG. 16.

This embodiment relates to initial charging of a charge pump circuit. Since the circuit configuration is the same as that of the second embodiment of the second invention described above, the circuit diagram and explanation thereof will be omitted. In FIG. 16, since the operation after starting is the same as that in the second embodiment of the second invention, a description thereof will be omitted.

Similar to the third embodiment of the second invention, this embodiment also includes an initial charging period to enable normal operation immediately after startup. The difference from Embodiment 3 of the second invention is that Embodiment 3 of the second invention performs initial charging in three phases simultaneously.
In this embodiment, initial charging is performed for each phase.

This initial charging operation is shown in FIG. As shown in FIG. 16, during the initial charging period, the first power element (1) of the U, V, and W phases is first turned off, and then the U, V, and W phases are turned off.
The second power elements (4) of each phase are sequentially turned on at time intervals equal to or longer than the circuit time constant of the charge pump path. As a result, the maximum value of the sum of the charge pump currents flowing out from the first power source (6) is approximately ⅓ of that when initial charging is performed simultaneously in three phases. After that, the second power element (4) of the U, V, and W phases is turned off, and the voltage of the first capacitor (8) is used to control the U, V phase.

If the W-phase first power elements (1) are turned on in sequence at intervals equal to or longer than the circuit time constant of the charge pump path, the maximum value of the sum of the charge pump currents flowing from the fourth power supply (40) will also be: This is approximately 1/3 of the amount when initial charging is performed in three phases simultaneously. Although this complicates the initial charging operation, the first power supply (6) can be made smaller, especially the output smoothing capacitor (50) of the switching power supply (47) in Fig. 14.
, (5B) is effective in reducing the capacity.

In this embodiment, during the initial charging period, only the second power element (4) of each phase is ON, or only the first power element (1) is ON, or only the first power element (1) is ON, or only the first power element (1) of each phase is ON. Either the power element (1) and the second power element (4) are both OFF. Therefore, the voltages at the output terminals U, V, and W are equal or disconnected from the power supply, so the output line voltage becomes zero,
No voltage is applied to the load.

Embodiment 5 of the second invention will be explained with reference to FIG.

This embodiment relates to initial charging of a charge pump circuit. The circuit configuration is the same as the first embodiment of the second invention described above.
2 may be used, so rewriting and explanation of the circuit diagram will be omitted. However, FIG. 17 is drawn assuming the three-phase inverter of the second embodiment of the second invention shown in FIG. 14.

In FIG. 17, since the operation after starting is the same as that in the second embodiment of the second invention, the explanation will be omitted. Similar to the fourth embodiment of the first invention, this embodiment also includes an initial charging period to enable normal operation immediately after startup. The difference from the third embodiment of the second invention is that the third embodiment of the second invention completes the initial charging with one switching, whereas this embodiment completes the initial charging with multiple switchings. It is to let This initial charging operation is shown in FIG. As shown in FIG. 17, during the initial charging period, first U, V
, the W-phase second power elements (4) are simultaneously switched at a cycle less than or equal to the circuit time constant of the charging path, the average value of the total charge pump current flowing from the first power supply (6) is Compared to the case where initial charging is performed by switching, the duty is approximately twice that of switching. After that,
If the voltage of the first capacitor (8) turns on the first power element (1) of the Ug■ and W phases in order at a time interval longer than the circuit time constant of the charge pump path, the fourth power supply ( The average value of the sum of the charge pump currents flowing out from 40) is also approximately twice the switching duty as compared to the case where initial charging is performed by one switching. Since the switching duty is 1 or less, the charge pump current can be made equal to or less than a desired current by adjusting the switching duty. Although this complicates the initial charging operation, the switching power supply (47) in Fig. 14 can be made smaller, especially the output smoothing capacitors (50) and (56
) is effective in reducing the capacity.

In this example, U during the initial charging period.

Since the V and W phase power elements operate in the same way, the voltages at the output terminals U, V, and W are equal. Therefore, the output line voltage becomes zero, and no voltage is applied to the load. Also the first
In Fig. 7, during charging of the fifth power source (41), the ON signal U-V-W- of the second power element (4) of each phase is set to “H”.
It is obvious that the same effect can be obtained even if the output terminals U, V, and W are The voltages become equal and no voltage is applied to the load.Also, while charging the second power supply (6), the first power element (1) of each phase is turned on.
If the signals 7J+, V+, and W1 are inverted signals of the ONN signals -, V-, and W- of the second power element (4) of each phase, the fifth power source is charged at the same time as the second power source is charged. Therefore, although the method shown in FIG. 17 cannot achieve any of the effects, it does facilitate generation of the ON signal. At this time, the U, V, and W phase power elements operate in the same way, so the output terminals U, V.

The voltages on W will be equal and no voltage will be applied to the load.

Embodiment 6 of the second invention will be explained with reference to FIG.

This embodiment relates to limiting the charging current of the charge pump circuit, and in particular, a resistor is inserted in the charge pump path in order to limit the large charging current during initial charging of the charge pump circuit.

In FIG. 18, a first power element (1), a second power element (4), a first capacitor (8), a diode (9), a DC power supply (10), a load (11), a control means ( 14), second power supply current limiting resistor (34), U,
V.

W-phase switching circuit (44), (45),
(4B), switching power supply (47), first power supply smoothing capacitor (50), fourth power supply smoothing capacitor (5
6) is the same as Example 2 of the first invention or the second invention, so the explanation will be omitted. (5'8) is a current limiting resistor of the fifth power supply.

Next, the operation will be explained. The operation of this embodiment is as follows.
This is basically the same as the second embodiment of the invention.

The difference is that when the second power element (4) is turned on, the smoothing capacitor (50) of the first power supply - the current limiting resistor (34) - the diode (9) - the first capacitor (8)
) - the first capacitor (8) is charged in the path of the second power element (4), so that the charging current flows through the current limiting resistor (3).
4). Also, when the first power element (1) is turned on, the smoothing capacitor (5B) of the fourth power supply - the first power element (1) - the second capacitor (42) - the diode (43) - the current limiter Resistance (58)
Since the second capacitor (42) is charged through the path,
The charging current is limited by a current limiting resistor (58). As a result, the smoothing capacitor (50) of the first power supply, the fourth
Since the maximum value of the charge pump current flowing from the power supply smoothing capacitor (56) becomes smaller and the charging circuit time constant becomes longer, the first power supply smoothing capacitor (50) and the fourth power supply smoothing capacitor at the initial charging current (56)
This reduces the voltage drop in the switching power supply (47), making the switching power supply (47) more compact, especially the switching power supply's output smoothing capacitor (47).
50), is effective in reducing the capacity of (5B). As shown in FIG. 6, the initial charging current at the time of startup of the charge pump circuit is much larger than the charge pump current during steady operation. Therefore, the current limiting resistors (34) and (5g) used to limit the initial charging current may be small resistors, and their influence on steady operation can be ignored.

In this embodiment, the current limiting resistor is shown as (35) in FIG.

As shown in (3B), (37), (59), (60), and (61), it may be inserted into each phase side.
As shown in 8), similar to the seventh embodiment of the second invention,
It is obvious that the same effect can be obtained even if the current limiting resistor (34) of the second power source is inserted in series with the output of the first power source (6). Furthermore, it is obvious that similar effects can be obtained even if this embodiment is applied to the second embodiment of the second invention.

In addition, if normal operation is required immediately after startup, the second
This is effective in combination with the initial charging operation of Embodiments 3, 4.5 of the invention. This is obvious due to the similarity between this example and Example 2 of the second invention.

[Effects of the Invention] As described above, according to the first invention, since a low breakdown voltage IC is used, an inexpensive power element drive circuit can be obtained.

Further, according to the second invention, since the configuration is such that a negative voltage can be applied to the signal input of the power element with the addition of a minimum power supply, the turn-off time of the power element can be shortened and the turn-off time of the power element can be shortened.
This is effective in preventing malfunctions at F.

[Brief explanation of the drawing]

FIG. 1 is a power element drive circuit according to Embodiment 1 of the first invention, FIG. 2 is an explanatory diagram of the operation of the power element drive circuit according to Embodiment 1 of the first invention, and FIG. 3 is an implementation of the first invention. A power element drive circuit according to Example 2, FIG. 4 is an explanatory diagram of the operation of a power element drive circuit according to Example 2 of the first invention, FIG. 5 is a power element drive circuit according to Example 3 of the first invention, and FIG. The figure is an explanatory diagram of the operation of the power element drive circuit according to the fourth embodiment of the first invention, FIG. 7 is an explanatory diagram of the operation of the power element drive circuit according to the fifth embodiment of the first invention, and FIG. FIG. 9 is a power device drive circuit diagram according to Example 7 of the first invention, and FIG. 1O is a power device drive circuit according to Example 7 of the first invention. 11 is a power element drive circuit diagram according to Embodiment 7 of the first invention, FIG. 12 is a power element drive circuit diagram according to Embodiment 1 of the second invention, and FIG. 13 is a power element drive circuit diagram according to Embodiment 1 of the second invention. An explanatory diagram of the operation of the power element drive circuit according to Example 1, FIG. 14 is a diagram of the power element drive circuit according to Embodiment 2 of the second invention, and FIG. 15 is an operation explanatory diagram of the power element drive circuit according to Embodiment 3 of the second invention. Explanatory diagram, FIG. 16 is an explanatory diagram of the operation of the power element drive circuit according to the fourth embodiment of the second invention, FIG. 17 is an explanatory diagram of the operation of the power element drive circuit according to the fifth embodiment of the second invention, and FIG. 19 is a power element drive circuit diagram according to Example 6 of the second invention, FIG. 20 is a power element drive circuit diagram according to Example 6 of the second invention, and FIG. 20 is a power element drive circuit diagram according to Example 6 of the second invention. Drive circuit diagram: FIG. 21 is a conventional power element drive circuit diagram. In the figure, (l) is the first power element, (4) is the second
power element, (6) is the first power supply, (7) is the second power supply, (8) is the first capacitor, (10) is the DC power supply,
(11) is the load, (14) is the control means, (15) is the first
The drive IC, (16) is the second drive IC, (17)
is the first insulating means, (18) is the second insulating means, (39
) is the third power supply, (40) is the fourth power supply, (41) is the fifth power supply, and (42) is the second capacitor. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (2)

[Claims] (1) first and second drive ICs for driving first and second power elements connected in series; a first power source that supplies power to the second drive IC; a second drive IC that supplies power to the first drive IC, including a capacitor that is charged by the first power supply when the second power element is conductive;
a power source, a control means for outputting ignition signals for the first and second power elements, and a control means provided between the output of the control means and the inputs of the first and second drive ICs. a circuit including first and second insulating means for electrically insulating the output signal of the first and second drive ICs from the input signals of the first and second drive ICs; A power element drive circuit comprising: a low breakdown voltage IC having a breakdown voltage closer to a breakdown voltage between signal input terminals than a breakdown voltage between output terminals of the first and second power elements. (2) first and second drive ICs for driving first and second power elements connected in series; first and second drive ICs connected in series for supplying power to the second drive IC; 3, and a fourth power source whose high voltage side is connected to the output terminal of the first power element that is not connected to the second power element.
and a first capacitor charged by the first power source when the second power element is conductive.
a second power source that supplies power to the drive IC of the first power source; and a second capacitor that is connected in series with the second power source and that is charged by the fourth power source when the first power element is conductive. a fifth power supply for supplying power to the drive IC; a control means for outputting ignition signals for the first and second power elements; and a fifth power supply for supplying power to the first and second drive ICs; It is characterized by comprising first and second insulating means provided between an input and for electrically insulating the output signal of the control means and the input signals of the first and second drive ICs. Power element drive circuit.