JPH03245398A - Superconducting memory - Google Patents

Abstract

PURPOSE:To simplify configuration and to reduce energy consumption by turning a superconducting transistor to a normal conductive state, injecting the current of contents into a loop-shaped path, afterwards, interrupting the current in the superconductive state, storing the contents in the loop-shaped path and reading the data contents from the current to flow from the loop-shaped path when the transistor is returned to the normal conductive state. CONSTITUTION:When writing data, a superconducting transistor 10 is turned to the normal conductive state and afterwards, the current controlled by a current control means 40 corresponding to the contents of the data is injected into a loop-shaped path 30. Next, the superconducting transistor 10 is switched to the superconductive state and afterwards, by interrupting the injection of the current, the injected current is stored in the loop-shaped path 30 as a permanent current. When reading the data, a current detecting means 50 detects the current to flow from the loop-shaped path 30 when switching the superconducting transistor 10 to the normal conductive state, and the contents of the data stored in the loop-shaped path 30 as the permanent current are read. Thus, since the loop-shaped path can be composed of one superconducting transistor and a superconducting body at a minimum as the structure of a memory unit, the structure can be simplified and the energy consumption can be decreased.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a memory that stores data in a superconducting state using a superconductor and a field-effect superconducting transistor.

[Conventional technology]

As is well known, superconducting electronic circuits or integrated circuits utilize the Josephson effect, and of course, in order to construct such a superconducting circuit, it is necessary to store a large number of data from the simplest 1-bit data latch. Various stages of memory, up to and including RAM, are essential. For superconducting memory that utilizes this Josephson effect, 4JL (junction
n Logic) gates are known. As is well known, this is a system in which four tunnel-type or point-contact type Josephson junctions are connected in a ring via a superconductor and combined with input/output resistors, etc. In principle, multiple dJL-type inverters can be connected By combining these, a superconducting memory with a desired capacity can be constructed.

[Problem to be solved by the invention]

However, if a large capacity memory is constructed by combining such 4JL gates, a very large number of Josephson junctions will be required. In other words, this inverter gate is
By combining these, a 1-bit launch, which is a basic element of memory, can be constructed, but this requires 8 Josephson junctions and several attached resistors for storing 1-bit data.

Furthermore, in this 4JL gate, due to its operating principle, it is necessary to constantly apply a bias voltage to the Josephson junction, and since this bias voltage is usually created by a resistor, the current flowing through the bias resistor cannot be ignored.
In particular, large-capacity memory consumes a lot of power.

In addition, the heat generated in such a resistor inevitably causes an economic disadvantage during use under the cryogenic conditions where Josephson junctions and superconductors are placed, and for this reason, if the resistor is placed outside the cryogenic region,
As can be easily seen, the connection with the Josephson junction becomes very complicated.

It is an object of the present invention to solve the problems of the prior art and provide a superconducting memory with a simple configuration and low power consumption.

[Means to solve the problem]

This purpose, according to the invention, consists of a field-effect transistor that can be switched between a normal-conducting state and a superconducting state by gate control; It consists of a current control means for controlling the current to be injected, and a current detection means connected to a circular path.When writing data, the transistor is placed in a normally conducting state and then controlled by the current control means according to the data content. The current is injected into the annular path, the transistor is switched to a superconducting state, and the current injection is then cut off to store the injected current in the annular path as a persistent current.When reading data, the transistor is placed in a normal conducting state. This is achieved by a superconducting memory in which the current flowing out of the annular path when switching is detected is detected by a current detection means, and the data content stored as a persistent current is read.

[Effect]

The present invention focuses on the fact that as long as logic gates are configured with two-terminal Josephson junctions as in the past, it is difficult to reduce the number of circuit elements and power consumption for providing bias is unavoidable. A superconducting transistor, which is a terminal circuit element, is used together with a superconductor to form a circular path through which a persistent current for data storage flows.

Since this ring path can be constructed from at least one superconducting transistor and a superconductor formed in a backbone closed by it, the memory unit structure for 1 bit is much improved compared to the conventional case using 8 Josephson junctions. and since the contents of one bit are stored in the form of a persistent current in the ring path, no power consumption is required during storage.

Furthermore, in the present invention, by using a voltage-controlled field effect transistor as the superconducting transistor, it is brought into a superconducting state and the loop path is closed.

It also eliminates the need for power consumption for opening the ring path and maintaining the state by making it into a normally conductive state.

5- Note that the current control means in the configuration described in the previous section injects a current into the ring path according to the content of each bit of data to be stored with the superconducting transistor in a normal conduction state and the ring path open, and This is to store the injected current, that is, the data content, in the form of a persistent current in the annular path by cutting off current injection with the superconducting transistor in a superconducting state and the annular path closed.

Further, the current detection means is for detecting the current flowing out when the superconducting transistor is switched from such a state to a normal conducting state and opening the ring path, and reading the data content stored in the form of a persistent current. It is.

〔Example〕

Embodiments of the present invention will be specifically described below with reference to the drawings. Fig. 1 is a configuration circuit diagram for one bit of the superconducting memory of the present invention, Fig. 2 is a waveform diagram showing its operation, Fig. 3 is a cross-sectional view of a structural example of a superconducting transistor, and Fig. 4 is a multi-bit circuit diagram of the superconducting memory. FIG. 2 is a circuit diagram of an example of application to a superconducting memory.

6- In FIG. 1, the ring path 30 shown in the center is connected to the superconducting transistor 1, which is simply shown by its gate 15 in the figure.
0 and, in this example, a superconductor 20 formed approximately in an annular shape, and is placed in an extremely low temperature, for example, at the temperature of liquid helium, as shown by the partially hatched dot-dash line in the figure. Among them, the superconducting transistor 10 is, for example, C1ar
The field effect transistor (Fea
sfb mouthity of Hybrid Josephso
n Field Effect Transistor
; J, Appl·Pbys,, vol, 51.
2736-2745.1980-5),
An example of its structure will be described below with reference to FIG.

As a semiconductor substrate for this superconducting transistor IO,
For example, an electronically conductive n-type silicon base FiI with a relatively low impurity concentration is used, and from its surface, a pair of diffusion layers 12 and 13 corresponding to the source/drain layer are formed by, for example, n-type high impurity concentration diffusion. A very thin gate oxide film 14 of around 0.1 μm is formed on the surface between the two dispersion layers 12 and 13.
On top of this, a gate 15 made of polycrystalline silicon or the like is provided as usual.

The superconductor 20 is, for example, a niobium film vacuum-deposited to a thickness of about 1 p, and by providing it so as to sandwich the gate 15 and contact both the dispersion layers 12 and 13 as shown in the figure, a field effect type They are used as source and drain electrodes for the superconducting transistor 10, and are formed in the annular pattern shown in FIG. 1 to form an annular path 30 together with the superconducting transistor 10.

Note that the connection to the superconductor 20 is made via a connection electrode film 21 such as ANO-P-MI which is in conductive contact with the superconductor 20, as shown on both the left and right sides of FIG.

When the superconductor 20 enters a superconducting state at extremely low temperatures, the electron waves or wave functions of the electron pairs within it leak out not only into the superconductor but also into its vicinity, to some extent.
The range in which this superconducting state becomes superconducting due to the so-called seepage effect is called the superconducting coherence length, which is the square root of the mobility of carriers, that is, electrons, in the semiconductor diffusion layers 12 and 13 in contact with the superconductor 20, and the carrier concentration. It is known that it is proportional to the cube root, and in the superconducting transistor 10 shown in FIG. 3, it is about 0.1.

In the structure shown in FIG. 3, the range of such superconducting state seeping out from the left and right superconductors 20 is the diffusion layer 1 with high impurity concentration.
2 and 13, respectively, but does not extend to the substrate 11, which has a low impurity concentration between the two, and this is the normal conduction state or off state of the superconducting transistor 10. However, when the gate voltage Vg is applied to the gate 15 to increase the carrier concentration on the surface of the substrate 11 under the gate as in the case of a normal field effect transistor, the superconducting state also seeps into the surface of this substrate 11 from both the left and right sides. The distance between the left and right superconductors 20, that is, the lateral width of the gate 15 is set to 0.1~
If it is set to 0.2μ or less, the superconducting state seeping out from the left and right sides overlaps each other, and the superconducting transistor 10 becomes a superconducting state or an on state.

As you will see, superconducting transistor 1 in Figure 1
0 is in a normal conducting state when there is no gate voltage Vg and the ring path 30 is open, but by applying the gate voltage Vg, the superconducting transistor 10 is switched to the superconducting state and the ring path 30 is closed. It can be made into a superconducting path.

9 In the present invention, the content of data is memorized by the persistent current trapped in this annular path 30, but in order to do so, it is necessary to first inject the current that is the source of the persistent current into the annular path 30, and for this purpose, current control is performed. Means 40 are provided. In the embodiment of the first [iJ, the data to be stored is digital data, and the content of 1.0 of the l bit is stored depending on the presence or absence of persistent current, so the current control means 40 gates the write data D of this l focus. The receiver is constituted by a single field effect transistor 41 that controls opening and closing of the injection current ia applied from the current source 60 to the annular path 30. This current control means 40 is normally provided outside the cryogenic region as shown in the figure, but it can also be incorporated within the cryogenic region if it is constituted by a field effect transistor with low current consumption.

The current detection means 50 is for reading the data content stored in the form of the above-mentioned persistent current, and in the example of FIG. If possible, it is sufficient, and in some cases, a combination of a resistor and a voltage detection circuit may be used.

0- FIG. 2 shows the operation of the superconducting memory shown in FIG. 1 when the 1-bit write data WD is l.

FIG. 2(a) shows the gate voltage Vg for the superconducting transistor 10, and as shown in the figure, it is initially set to O to keep the superconducting transistor IO in a normal conduction or off state. Next, at time t1 shown in FIG.
1 of D is applied to the gate of the field effect transistor 41 to turn it on, and the injected current ia is applied from the current source 60 to the annular path 3.
Supply to 0. At this time, the superconducting transistor 1 in FIG.
0 is in the off state and no current flows in the right half of the annular path 30 in the diagram, the injected current ia flows mostly into the left half of the annular path 30, resulting in the current ib shown in FIG. 2(C). Become.

In this state, a gate voltage Vg is applied to the superconducting transistor 10 at time t2 (not shown in FIG. 12A) to turn it on.

As a result, the right half of the annular path 30 also becomes superconducting, so a current should originally flow in this right half, but since the same current ib as the injected current ia is already flowing in the left half, Due to the self-holding effect, no current actually flows to the right half yet.

However, this prepares the persistent current to flow in the annular path 30, so that the write data WD to the gate of the field effect transistor 41 is then written at time tw shown in FIG.
When the injected current ia is cut off by cutting off the current jb in the left half of the annular path 30, a current flows also in the right half of the annular path 30, causing a persistent current ic shown in FIG. begins to circulate. That is, as a result, the injection current ia corresponding to the content of 1 in the 1-bit write data WD is stored in the annular path 30 as the persistent current ic.

In order to read the contents of the data stored in this way, the gate voltage Vg is turned off from the above-mentioned state as shown at time t in FIG. Switch to state and ring road 3
Since no current flows in the right half of 0, the persistent current ic becomes the outflow current idO shown in Fig. 2(e) due to its holding effect.
The current flows out through the current detection means 50, albeit within a short period of time. Therefore, the current detection means 50 only needs to detect this outflow current id and then read the content of 1 from the write data WD.

Note that the above has been described for the case where the write data ilD is 1, but of course when it is 0, the field effect transistor 4
1 is not originally turned on, therefore the injection data ia also has a persistent current j
Since c also becomes 0, no outflow current id is generated, and the current detection means 50 in this embodiment reads the stored data content as 0 when there is no outflow current id.

However, in implementing the present invention, the operation of the superconducting memory can be made more reliable by making the positive and negative directions of the persistent current correspond to the contents of 1-bit data.

In this case, for example, the current control means 40 is constituted by two field effect transistors, which are turned on alternately depending on the contents of the write data WD to inject the current ia into the annular path 30 in a positive or negative manner. By giving it in the direction, it is possible to give the persistent current IC a positive or negative direction depending on the contents of 1 or O of the write data (2). Also, the outflow current id
Since the current is generated in both the positive and negative directions in response to this, the current control means 40 adjusts the content of the stored data according to the positive and negative directions.
．． 0 can be determined accurately.

13 As can be seen from the above explanation, in the superconducting memory of the present invention, data contents are stored in the form of persistent current, so data storage is so-called permanent storage, and abnormal situations such as breaking the cryogenic conditions for the ring path There is no risk of memory loss except over time. Further, since it is sufficient to simply maintain the gate voltage to the superconducting transistor throughout this data storage period, no power consumption occurs other than maintaining the cryogenic conditions.

Further, as can be seen from the structure of the superconducting transistor 10 described above, the gate 15 needs to be made into a submicron size, and the size of the superconductor 20 can be reduced accordingly. 30 to 1
It can be formed into a very small size with a diameter of about 0μ.

FIG. 4 shows an example in which a practical superconducting memory is constructed by arranging a large number of the annular paths 30 in the embodiment shown in FIG. is shown in FIG. 5 in a form corresponding to FIG.

14 In FIG. 4, the ring paths 30 arranged in a matrix are M'S
In this embodiment, a 1-byte write consisting of bits WDO to WD7 shown in the upper part of the figure is shown in a simplified manner by the date 15 of the conductive transistor and the superconductor 20. 1 byte of read data consisting of the focus RDO to R[17 shown at the bottom of the figure is read out all at once. Therefore, the gates 15 of the superconducting transistors in the annular path 30 arranged in the row direction are commonly connected and controlled by the gate voltages vgO to νg+, respectively.

First, as a current control means, a field effect transistor 42 is used.
are provided for each annular path 30, and similarly, the gates of eight field effect transistors 42 arranged in the row direction are commonly connected and controlled by opening/closing commands SO to Si. As another current control means, in order to apply an injection current to the annular path 30 according to the contents of the write data via the field effect transistor 42, an electronic switch 43 in this example is commonly used for the field effect transistors 42 arranged in the column direction. will be provided.

These electronic switches 43 are transistors or analog switches with a very small current capacity, and are turned on and off according to the contents of 1.0 of each bit -DO to WD7 of the write data, and in this example, have negative polarity. It serves to inject an injection current ia into each ring path 30 via a field effect transistor 42, which is set by a resistor 61 connected to a low power supply voltage Vd.

The current detecting means in this embodiment uses an amplifier 52 provided in common to the resistors 51 connected in parallel to each annular path 30 and the resistors 51 arranged in the column direction, and the outflow current id flows through each resistor 51. A common amplifier 52 amplifies the voltage drop that occurs when
[The contents of IO to RD7 are obtained.

FIGS. 5(a) to 5(a) show the operation of the superconducting memory of this embodiment.
In (f), the writing operation is shown on the left side of the figure, and the reading operation is shown on the right side. In addition, before starting the operation, the gate voltage VgO-Vg7 and opening/closing command SO~ shown in FIG.
It is assumed that all Si is set to 0.

First, at time 10 in FIG. 5(a), write data is applied to the electronic switches 43 all at once, and the electronic switches 43 are placed in an on/off state according to the content of each bit in the data. In this figure, each pin (WDO to WD7) of the write data in Fig. 4 is the write data W.
A case represented by D and whose content is 1 is shown. Next, at time t1 in the same figure (b), the opening/closing command SO~St
By giving a specific opening/closing command S among the above, and turning on the field effect transistors 42 arranged on one row all at once, the injection current ia is given all at once to the annular paths 30 arranged on the corresponding six.

Next, at time t2 in FIG. 5(C), a gate voltage Vg corresponding to the above-mentioned opening/closing command S among the gate voltages VgO to Vg1 in FIG. By putting all the transistors into a superconducting state all at once and turning off the opening/closing command S at the time shown in Figure 5 (b),
The injection current ia is injected into the annular path 30 arranged in the row direction as shown in the figure (d).
is trapped as a persistent current jc.

This completes the operation of storing the write data HD into the annular path 30, so the write data 110 is cut off as shown in FIG. 2A to end the write operation.

=I? As in the previous embodiment, during the reading operation, it is sufficient to simply turn off the gate voltage Vg at time tr shown in FIG. The outflow current id shown in FIG. 4(e) flows in the current detection resistor 51. At this time, the current detection resistors 51 arranged in the column direction in FIG.
Among them, since a voltage drop occurs only in a specific resistor corresponding to the above-mentioned opening/closing command S and gate voltage Vg, the amplifier 52 provided in common for each column selectively receives this voltage.
The bit data stored in the annular path 30 arranged in a specific row direction is output all at once as shown by read data RD in FIG. 5(f).

Although the read data RO in FIG. 5(f) is in the form of short pulses, it can be held by a means such as a flip-flop to provide easy-to-use data as shown by the broken line in the figure. In addition, in the embodiment, the data stored in the circular path is lost due to the reading operation, but as in the case of a normal memory, the read data RD is rewritten as the write data WD if necessary. By performing the read operation, the stored data can be preserved.

18 The present invention is not limited to the embodiments described above, and the present invention can be implemented in various embodiments. For example, in the embodiment, one superconducting transistor is provided in each ring path, but by providing two superconducting transistors and making the mode of switching between the superconducting state and the normal conducting state by the gate voltage different from each other, it is possible to make the superconducting transistor more complicated than in the embodiment. It is possible to perform various data write and read operations. For example, the direction of the persistent current in the ring path can be switched depending on the content of the written data, or the so-called 5QUID
The method can be used to detect magnetic flux quanta trapped in the toroidal path by persistent currents and read stored data without erasing it.

Further, in the embodiment, the current detection means is also connected in parallel to the ring path, but the current detection means is not limited to this, and the point is that it is sufficient to connect the current detection means with this so that the outflow current from the ring path can be detected, for example, by using the above-mentioned 5QUID method. When using magnetic flux detection, it is of course necessary to use an appropriate connection or coupling mode. The example of application of the present invention shown in FIG. 4 is also just an example.
Practical aspects can be adopted depending on the situation.

〔Effect of the invention〕

As described above, the present invention includes a field-effect superconducting transistor that can be switched between a normal conductive state and a superconducting state by gate control, and a ring-like structure formed of a superconducting transistor and a superconductor formed so as to be closed through the superconducting transistor. A superconducting memory is constructed by a current control means for controlling the current injected into the annular path, and a current detecting means connected to the annular path. A current controlled by the control means according to the content of the data is injected into the annular path, and then the injection current is stored as a persistent current in the annular path by cutting off the current injection after switching the superconducting transistor to a superconducting state. When reading data, the current flowing out from the annular path when the superconducting transistor is switched to a normal conductive state is detected by the current detection means, and the data content stored as a persistent current in the annular path is read from the result. By doing so, the following effects can be achieved.

(a) Since the circular path as a storage unit structure for 1-bit data can be constructed using only at least one superconducting transistor and superconductor, the structure is much simpler than the conventional case of using multiple Josephson junctions. can be converted into

(b) Since the data is stored in the form of a persistent current in the ring path and a field effect type superconducting transistor is used to close this ring path, it is only necessary to maintain the gate voltage to the superconducting transistor during the data storage period. , power consumption can be reduced by two to three orders of magnitude compared to conventional methods.

(C) Since the gate width of a superconducting transistor is submicron size, and the dimensions of the superconductor are also reduced accordingly, several circular paths can be used as a storage unit structure for 1-bit data.
It can be fabricated within a very small area of about 10-diameter.

(d) Since data is stored in the form of a persistent current, the data storage is permanent and there is no risk of the memory being lost except in abnormal situations such as when the extremely low temperature conditions of the ring road are broken.

=21=

[Brief explanation of drawings]

All of the figures relate to the present invention; Figure 1 is a configuration circuit diagram showing an example of the configuration of one bit of a superconducting memory according to the present invention, Figure 2 is a waveform diagram of main signals to explain its operation, and Figure 3 is a waveform diagram of main signals.
The figure is a cross-sectional view of an example of the structure of a field-effect superconducting transistor, FIG. 4 is a circuit diagram of a configuration example of a multi-pin superconducting memory according to the present invention, and FIG. 5 is a diagram of main signals for explaining its operation. FIG. In the figure, 10: superconducting transistor, 11: silicon substrate, 12
．． 13: Diffusion layer, I4: Gate oxide film, 15: Gate of superconducting transistor, 20: Superconductor, 21: Connection electrode film, 30: Annular path, 40: Current control means, 41, 42
: Field effect transistor, 43: Electronic switch, 5o
: current detection means, 51: current detection resistor, 52: amplifier,
60: current source, 61: injection current setting resistor, ia: injection current, ib: injection current flowing in the annular path, ic: persistent current, id: outflow current, RO, 11110 to 1107
: Read data or its bit, S, SO to Si: Open/close command, tr: Data reading time, tll: Data writing time, 10 to 22-t2: Time, Sig, vgi to Vgi: Gate voltage for superconducting transistor, 1l WDO~WD7: Write data or 3

Claims (1)

[Claims] A field-effect superconducting transistor that can be switched between a normal conducting state and a superconducting state by gate control, a ring path consisting of the superconducting transistor and a superconductor formed so as to be closed through the superconducting transistor, and an injection current into the ring path. and a current detection means connected to the annular path. When writing data, the superconducting transistor is first brought into a normal conducting state and then controlled by the current control means according to the content of the data. The injected current is stored as a persistent current in the ring path by injecting a current into the ring path, then switching the superconducting transistor to the superconducting state and cutting off the current injection, and when reading data, the superconducting transistor is placed in the normal conducting state. A superconducting memory in which a current flowing out from the annular path is detected by a current detection means when switching to the annular path, and data content stored as a persistent current in the annular path is read from the result.