JPH0272614A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To make it possible to form a polycrystalline silicon film with large grain diameters through heat treatment in a short time by stacking an amorphous silicon film low in polycrystalline nucleus generating density and an amorphous silicon film high in that so as to grow them in solid phase. CONSTITUTION:A first silicon layer 102 is formed on an insulating amorphous material 101, and a second silicon layer 103 is stacked on the first silicon layer 102, and the first and second silicon layers 102 and 103 are crystal-grown by heat treatment, etc., and a semiconductor element is formed on this silicon layer 104. The field effect mobility of a low temperature process TET (N- channel) which is formed hereupon is 100-150cm<2>/V.sec. and high-performance TET is formed on a glass substrate. Hereby, a polycrystalline silicon film with large grain diameters can be formed excellently in reproducibility.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor element on an insulating amorphous material.

[Prior Art] Attempts have been made to form high-performance semiconductor elements on insulating amorphous substrates such as glass and quartz, and insulating amorphous layers such as SiC2.

In recent years, as the need for large, high-resolution liquid crystal display panels, high-speed, high-resolution contact-type image sensors, 3D ICs, etc. has increased, high-performance semiconductor devices on insulating amorphous materials such as those mentioned above are becoming increasingly popular. The realization of this is eagerly awaited.

Taking the case of forming a thin film transistor (TPT) on an insulating amorphous material as an example, (1) TPT whose element material is amorphous silicon formed by plasma CVD method, etc.;
(2) TPT whose element material is polycrystalline silicon formed by CVD method or the like; (3) TPT whose element material is single crystal silicon formed by melt recrystallization method or the like are being considered.

However, among these TPTs, TPTs made of amorphous silicon or polycrystalline silicon have significantly lower field-effect mobilities than those made of single-crystal silicon (amorphous silicon TFT < 1c
m2/V・see, polycrystalline silicon TFT ~
10Cm2/■・5eC), it was difficult to realize a high-performance TPT.

On the other hand, the melting and recrystallization method using laser beams, etc. is still not a fully developed technology, and it also poses technical difficulties when it is necessary to form elements over a large area, such as in liquid crystal display panels. Especially big.

[Problem to be solved by the invention] Therefore, a method of solid-phase growth of large-grain polycrystalline silicon has attracted attention as a simple and practical method for forming high-performance semiconductor elements on insulating amorphous materials. and research is underway. (Thin 5 solid films)
100 (1983) p, 227, JJ
AP Vol, 25 No. 2 (1986) p.
, L121) However, in the conventional technology, polycrystalline silicon is formed by the CVD method, Si is ion-implanted to make the polycrystalline silicon amorphous, and then heat treatment is performed at about 600°C for nearly 100 hours. Ta. Therefore, in addition to requiring expensive ion implantation snow making, the heat treatment time was also extremely long.

Therefore, the present invention provides a manufacturing method for forming polycrystalline silicon with large grain size using a simpler and more practical method.

[Means for Solving the Problems] A method for manufacturing a semiconductor device of the present invention includes the steps of: (b) forming a first silicon layer on an insulating amorphous material; (b) forming a second silicon layer on the first silicon layer; The process of stacking silicon layers (
The method is characterized by comprising at least the following steps: c) growing crystals of the first and second silicon layers by heat treatment or the like; and (d) forming a semiconductor element on the crystal-grown silicon layers.

[Example] FIG. 1 is an example of a manufacturing process diagram of a semiconductor device in an example of the present invention. Note that FIG. 1 takes as an example a case where a thin film transistor (TFT) is formed as a semiconductor element.

In FIG. 1, (A) is a first non-crystalline material formed on an insulating amorphous material 101 such as an insulating amorphous substrate such as glass or quartz, or an insulating amorphous material layer such as SiO2. This is a step of forming a crystalline silicon layer 102. As a method for forming the first amorphous silicon layer, for example, LPCVD method is used.
There are methods such as forming an amorphous silicon film with a thickness of about 508 to 1000 at a temperature of about 00 to 560 degrees Celsius, but the film forming method is not limited to this. It is important that the amorphous silicon film has a polycrystalline nucleus generation density higher than that of the second amorphous silicon (preferably less than one crystal nucleus per 1 μm square) due to heat treatment of a certain degree. (B) is the first amorphous silicon layer 10
This is a step of laminating a second amorphous silicon layer 103 on top of the second amorphous silicon layer 103. As a method for forming the second amorphous silicon layer, for example, a method such as forming an amorphous silicon film with a thickness of about 100A to 3,000 layers using a vacuum evaporation method at a vacuum level of about 10-5 Pa or less is used. be.

Note that the film forming method is not limited to this, but has a lower polycrystalline nucleation density than the first amorphous silicon film (preferably, heat treatment at about 550°C to 650'C for several tens of hours). It is important that the silicon is amorphous (no polycrystalline nuclei are generated even when the silicon is used).

(c) is a step of polycrystallizing the first and second amorphous silicon layers by heat treatment. The optimal heat treatment temperature varies depending on the film formation conditions of the first and second amorphous silicon layers, but the heat treatment is performed at about 550°C to 650°C for about 2 to 10 hours in an inert gas atmosphere such as nitrogen or Ar. As a result, a polycrystalline silicon layer 104 is formed. The mechanism is that crystal nuclei are first generated in the first amorphous silicon layer by a short heat treatment, and then the second amorphous silicon layer is crystallized using the crystal nuclei as seeds, and the grain size is large. A polycrystalline silicon layer 104 is formed. (D) is a step of forming a semiconductor element on a polycrystalline silicon layer. Note that FIG. 1(D) takes as an example a case where a TPT is formed as a semiconductor element.

In the figure, 105 is a gate electrode, 106 is a source/drain region, 107 is a gate insulating film, 108 is a glabellar insulating film, 109 is a contact hole, and 110 is a wiring. T.P.
As an example of the T formation method, the polycrystalline silicon layer 104 is patterned to form a gate insulating film. The gate insulating film is formed by thermal oxidation method (high temperature process) and CVD.
There is a method (low-temperature process) of forming at a low temperature of about 600° C. or lower using a plasma CVD method or the like. In low-temperature processes, inexpensive glass substrates can be used as substrates, so semiconductor devices such as large liquid crystal display panels and contact image sensors can be manufactured at low cost. A semiconductor element can be formed in the upper layer portion without adversely affecting the element (for example, diffusion of impurities). Subsequently, after forming the gate electrode, the source/drain regions are formed by ion implantation, thermal diffusion, plasma doping, etc., and the glabellar insulating film is formed by CVD, sputtering, plasma CVD, etc. Furthermore, a TPT is formed by opening a contact hole in the interlayer insulating film and forming a wiring.

The field effect mobility of the low temperature process TPT (N channel) manufactured by the semiconductor device manufacturing method based on the present invention is as follows:
It was 100 to 1500 m2/■.SeC, and it was possible to form a high-performance TPT on a glass substrate. this is,
The manufacturing method of the present invention has made it possible to form a polycrystalline silicon film with a large grain size with good reproducibility.

Furthermore, if the TPT manufacturing process includes a step of exposing the semiconductor element to a plasma atmosphere of a gas containing hydrogen gas or the like,
The density of defects existing at grain boundaries is reduced, and the field effect mobility is further improved.

In addition to the TPT shown in the embodiment of FIG. 1, the present invention can be applied to insulated gate semiconductor devices in general, as well as photovoltaic devices such as bipolar transistors, static induction transistors, solar cells, and optical sensors. This is an extremely effective manufacturing method when forming a semiconductor element such as a conversion element using a polycrystalline semiconductor as the element material.

Next, the technical background that led to the present invention will be described.

In order to solid-phase grow amorphous silicon into large-grain polycrystalline silicon, we developed a method for forming amorphous silicon and the film quality of polycrystalline silicon (crystal grain size, orientation, crystallization We investigated the relationship between As a result, the following became clear.

(1) The density of polycrystalline nuclei generated by heat treatment and the time until polycrystalline nuclei are generated vary depending on the method of forming an amorphous silicon film.

(2) For example, in the case of a silicon film formed by the LPCVD method, at a film formation temperature of about 590°C, grains with a diameter of 2
It is polycrystalline or microcrystalline silicon with approximately 0.00 to 300 crystal grains. Therefore, the membrane
Even when heat treated at a temperature of about °C, almost no increase in crystal grain size is observed. In addition, although the film formed at a film forming temperature of 500°C to 560'C is amorphous, the density of polycrystalline nucleation and the time until polycrystalline nuclei are generated by heat treatment at about 600°C are higher than the film forming temperature. It was different depending on. That is, the film forming temperature 5
At 60°C, the density of polycrystalline nucleation is high, and the crystal grain size is at most about 1000A (however, the time required for polycrystalization is short, about 1 to 2 hours), but as the film forming temperature is lowered, , the polycrystalline nucleation density decreases, and the film formation temperature is 5.
Polycrystalline silicon having a crystal grain size of about 2,000 to 3,000 at 40°C and about 3,000 to 5,000 at a film forming temperature of 500°C was formed by heat treatment at about 600°C. (However, the time required for polycrystallization was approximately 5 hours at a film formation temperature of 540'C, and more than 20 hours at a film formation temperature of 500'C.) (3) Even under the same film formation conditions, the film thickness When it becomes thinner, the density of polycrystalline nucleation tends to decrease.

(4) In the case of a silicon film formed by a vacuum evaporation method or a plasma CVD method, the density of polycrystalline nucleation can be further lowered than that of a film formed by a CVD method. Taking the vacuum evaporation method as an example, an amorphous silicon film formed at a vacuum level of about 10"6 Pa or less and a substrate temperature of about 100°C is
By performing heat treatment at 00℃ for about 500 hours, the crystal grain size was reduced to 5.
Over 000 polycrystalline silicon was formed. If the heat treatment temperature is lowered to about 550° C., polycrystalline silicon having a grain size of 1 μm or more can be formed, but in that case, the heat treatment time required for polycrystallization is 100 hours or more.

Based on the above results, the manufacturing process of the present invention shown in FIG. 1 is the result of an investigation to form polycrystalline silicon with a large grain size. The technical point is that an amorphous silicon film with a low polycrystalline nucleation density and a relatively high amorphous silicon film with a relatively high polycrystalline nucleation density are layered and grown in solid phase. The point is that it is possible to form a polycrystalline silicon film having a grain size.

In FIG. 1, (A) is a step of forming a first amorphous silicon film having a relatively low polycrystalline nucleation density compared to the second amorphous silicon film. As mentioned above, the film forming method is, for example, LPCVD method at 50'C to 56°C.
There is a method of forming an amorphous silicon film with a thickness of about 50 to 1000 A at about 0°C. 590℃ by LPCVD method
A method of forming a polycrystalline silicon film using the above method is also considered, but the crystal grain size is small, about 200 to 300, and the amorphous silicon film laminated on top of it also has a polycrystalline silicon film with a similar grain size, reflecting the underlying layer. Since it grows in a solid phase on crystalline silicon, it is difficult to increase the grain size. On the other hand, amorphous silicon formed at 500°C to 560°C has a low polycrystalline nucleation density (nucleation density when heat treated at about 600°C), and has a film thickness of 1000°C.
In the case of humans, only about one crystal nucleus exists per 1000 to 5000 A angle, and it was found that if the film thickness was further reduced, the density of polycrystalline nucleation would further decrease. For example, in the LPCVD method, 50 to 1
When forming an amorphous silicon film of about 0.000 people, the thickness of 1μ
It was possible to suppress the density of nucleation to one or less per m square.
(The time it took for polycrystalline nuclei to occur tended to become shorter as the film-forming temperature was higher.

Furthermore, there was a tendency that the lower the film forming temperature, the lower the nucleation density even if the film thickness was increased. Therefore, considering the shortening of heat treatment time and the controllability of film thickness, the film forming temperature is 530'C to 550'C.
'C degree is particularly preferable. ) The second amorphous silicon film grows crystals using the crystal nuclei generated in the first amorphous silicon film as seeds, so if an amorphous layer with a low nucleation density is used as described above, the grain size will be 1 μm. The above polycrystalline silicon is obtained and is particularly suitable as the first amorphous silicon layer.

For the first amorphous silicon layer, even if it is microcrystalline silicon in which a minute crystalline region exists in the amorphous phase, the crystal nucleus density can be reduced by optimizing the film thickness etc. It is effective if it is reduced. Note that even in microcrystalline silicon, as the size of microcrystalline regions becomes smaller, it becomes difficult to distinguish it from amorphous silicon, which has a relatively high polycrystalline nucleation density.

Note that the method for forming the first amorphous silicon layer is not limited to the CVD method, but may include plasma CVD method, photo CVD method, etc.
It is also possible to form by a method such as a method or an MBE method. for example,
In the plasma CVD method, a film formed by setting the substrate temperature at a relatively high temperature of 300° C. to 500° C. satisfies the above-mentioned conditions. It is important that the first amorphous silicon layer has a relatively high polycrystalline nucleation density compared to the second amorphous silicon layer, and that it is a film in which crystalline nuclei are generated by a short heat treatment.

(B) is a step of forming an amorphous silicon film with a low polycrystalline nucleation density. As a method for forming the film, as described above, for example, a vacuum evaporation method is used to form an amorphous silicon film having a thickness of about 100 to 3,000 layers at a degree of vacuum of about 10 -5 Pa or less.

The important point regarding the film quality of the second amorphous silicon layer is
It is necessary that polycrystalline nuclei are difficult to generate or that it takes a sufficiently long time to generate polycrystalline nuclei during the heat treatment at about 650°C. For this purpose, it is necessary to form a random amorphous silicon film with less regularity. Specifically, in addition to vacuum evaporation methods such as EB evaporation method, amorphous silicon films formed by MBE method, plasma CVD method, sub-lid method, CVD method in which the substrate temperature is cooled to about 500 degrees Celsius or less, etc. is suitable. In particular, an amorphous silicon film formed by the EB method or MBE method at a temperature lower than the substrate temperature of about 200° C. is suitable because it is difficult to generate polycrystalline nuclei.

Also, when stacking the second amorphous silicon layer on the first amorphous silicon layer, it is better to remove the natural oxide film present on the first amorphous silicon layer to improve the film quality and crystallinity. It has been found that it is effective in improving If heat treatment is performed in a hydrogen gas atmosphere or hydrogen plasma atmosphere before laminating the second amorphous layer, the oxide film on the first amorphous layer can be removed. Another effective method is to continuously form the first amorphous layer and the second amorphous layer without breaking the vacuum.

When a first amorphous silicon layer with a relatively high polycrystalline nucleation density and a second amorphous silicon layer in which polycrystalline nuclei are not easily generated are laminated and heat treated at about 550°C to 650°C, ,
Crystal nuclei are generated in the first amorphous silicon layer. (Moreover, the time required for nucleus generation is as short as several hours.) Next, the second amorphous silicon layer is polycrystallized using the crystal nuclei generated in the first amorphous silicon layer as seeds. . Since polycrystalline nuclei are less likely to occur in the second amorphous silicon layer, crystal growth is less likely to occur from locations other than the crystalline nuclei generated in the first amorphous silicon layer. As a result, selective crystal growth is performed using the crystal nucleus as a seed, and polycrystalline silicon having a large grain size is formed.

Next, the features of the present invention will be described in comparison with the case where only one of the first amorphous silicon and the second amorphous silicon is grown in a solid phase.

An object of the present invention is to form polycrystalline silicon having a large grain size by a short heat treatment and by a simple manufacturing process.

When only the second amorphous silicon film is grown in solid phase,
It has the disadvantage of requiring a long heat treatment. When the heat treatment temperature is raised to, for example, 800° C. or higher in order to shorten the heat treatment time, the density of polycrystalline nucleation increases rapidly, and polycrystalline silicon having a grain size of about 200A to 300A at most can only be obtained.

Furthermore, with only the first amorphous silicon layer, the thickness cannot be freely reduced in order to reduce the crystal nucleation density, but with the first amorphous silicon layer and the second amorphous silicon layer, Adopting a structure in which layers are stacked has the advantage that the thickness of the first amorphous silicon layer that generates crystal nuclei can be arbitrarily set. That is, as mentioned above, even under the same film forming conditions, the density of polycrystalline nucleation decreases as the film thickness decreases, so for example, if the first amorphous silicon layer is
It is also possible to make the film as thin as A and to form the remaining film thickness with the second amorphous silicon.

In addition, although Fig. 1 shows an example in which an amorphous silicon layer in which polycrystalline nuclei are difficult to generate is laminated on an amorphous silicon layer with a relatively high polycrystalline nucleus generation density, the lamination order can also be reversed. good.

That is, an amorphous silicon layer with a relatively high polycrystalline nucleation density may be laminated on an amorphous silicon layer in which polycrystalline nuclei are difficult to generate.

In addition, although in FIG. 1, solid phase growth is performed by heat treatment after laminating the first amorphous layer and the second amorphous layer, the manufacturing process is not limited to this. For example, the first
There is also a method in which a second amorphous silicon layer is formed and then heat treated to cause solid phase growth, and then a second amorphous silicon layer is laminated and heat treated again to cause solid phase growth.

[Effects of the Invention] As described above, according to the present invention, a polycrystalline silicon film with a large grain size can be formed with a simpler manufacturing process. As a result, it has become possible to form high-performance semiconductors on insulating amorphous materials, making it easy to form large, high-resolution liquid crystal display panels, high-speed, high-resolution contact image sensors, 3D ICs, etc. I can now do it.

Furthermore, since the present invention only requires heat treatment at a low temperature of about 650° C., (1) an inexpensive glass substrate can be used as the substrate; (2) In a three-dimensional IC, a semiconductor element can be formed in an upper layer without adversely affecting the elements in the lower layer (for example, diffusion of impurities). There are also other benefits.

In addition to the TPT shown in the embodiment of FIG. 1, the present invention can be applied to insulated gate semiconductor devices in general, as well as photovoltaic devices such as bipolar transistors, static induction transistors, solar cells, and optical sensors. This is an extremely effective manufacturing method when forming a semiconductor element such as a conversion element using a polycrystalline semiconductor as the element material.

[Brief explanation of the drawing]

FIGS. 1(a) to 1(d) are process diagrams for manufacturing a semiconductor device in an embodiment of the present invention. 20-101・109・Insulating amorphous material First amorphous silicon layer Second amorphous silicon layer Polycrystalline silicon layer Gate electrode source/drain region Gate insulating film Interlayer insulating film Contact hole Wiring and above (○) Applicant Seiko Epson Co., Ltd. Representative Patent Attorney Masayoshi Kamiyanagi (and 1 other person) Figure 1

Claims (1)

[Claims] 1) (a) Step of forming a first silicon layer on an insulating amorphous material; (b) Forming a second amorphous silicon layer on the first silicon layer. (c) a step of crystal-growing the first silicon layer and the second amorphous silicon layer by heat treatment or the like; and (d) a step of forming a semiconductor element on the crystal-grown silicon layer. A method for manufacturing a semiconductor device, characterized by: 2) The method of manufacturing a semiconductor device according to claim 1, wherein the first silicon layer formed on the insulating amorphous material is amorphous silicon. 3) The method of manufacturing a semiconductor device according to claim 1 or 2, wherein the first silicon layer is formed by a CVD method. 4) The first silicon layer is heated to 500°C to 560°C by CVD method.
4. The method of manufacturing a semiconductor device according to claim 3, wherein the semiconductor device is formed by: 5) The method of manufacturing a semiconductor device according to claim 4, wherein the first silicon layer has a thickness of 50 Å to 100 Å. 6) The method of manufacturing a semiconductor device according to claim 1, wherein the first silicon layer formed on the insulating amorphous material is microcrystalline silicon. 7) (a) forming a second amorphous silicon layer on the insulating amorphous material; (b) forming a first silicon layer on the second amorphous silicon layer; (c) a step of crystal-growing the second amorphous silicon layer and the first silicon layer by heat treatment or the like; and (d) a step of forming a semiconductor element on the crystal-grown silicon layer. A method for manufacturing a semiconductor device. 8) The method of manufacturing a semiconductor device according to claim 7, wherein the first silicon layer is amorphous silicon. 9) The method of manufacturing a semiconductor device according to claim 7 or 8, wherein the first silicon layer is formed by a CVD method. 10) The first silicon layer is heated to 500°C by CVD method.
10. The method of manufacturing a semiconductor device according to claim 9, wherein the semiconductor device is formed at 560°C. 11) The thickness of the first silicon layer is from 50 Å to 10 Å.
11. The method of manufacturing a semiconductor device according to claim 7, wherein the thickness is 0 Å. 12) The method of manufacturing a semiconductor device according to claim 7, wherein the first silicon layer is made of microcrystalline silicon. 13) (a) Step of forming a first silicon layer on an insulating amorphous material, (b) Step of growing crystals of the first silicon layer by heat treatment etc., (c) Step of growing the first silicon layer forming a second amorphous silicon layer thereon; (d) growing crystals of at least the second amorphous silicon layer by heat treatment or the like; (e) forming a semiconductor element on the crystal-grown silicon layer; 1. A method of manufacturing a semiconductor device, comprising at least a step of forming a semiconductor device.