JPH02219232A - Forming method of thin film - Google Patents
Forming method of thin filmInfo
- Publication number
- JPH02219232A JPH02219232A JP3988989A JP3988989A JPH02219232A JP H02219232 A JPH02219232 A JP H02219232A JP 3988989 A JP3988989 A JP 3988989A JP 3988989 A JP3988989 A JP 3988989A JP H02219232 A JPH02219232 A JP H02219232A
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- gas
- film
- plasma
- teos
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000010409 thin film Substances 0.000 title claims abstract description 27
- 238000000034 method Methods 0.000 title claims description 12
- 239000007789 gas Substances 0.000 claims abstract description 21
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 8
- 238000000354 decomposition reaction Methods 0.000 claims abstract description 5
- 239000011261 inert gas Substances 0.000 claims abstract description 4
- 238000000151 deposition Methods 0.000 claims description 3
- 238000005979 thermal decomposition reaction Methods 0.000 claims description 3
- 230000001678 irradiating effect Effects 0.000 claims description 2
- 230000015572 biosynthetic process Effects 0.000 claims 2
- 238000005530 etching Methods 0.000 claims 2
- 238000004519 manufacturing process Methods 0.000 claims 1
- 239000010408 film Substances 0.000 abstract description 23
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 18
- 229910052681 coesite Inorganic materials 0.000 abstract description 9
- 229910052906 cristobalite Inorganic materials 0.000 abstract description 9
- 229910052751 metal Inorganic materials 0.000 abstract description 9
- 239000002184 metal Substances 0.000 abstract description 9
- 239000000377 silicon dioxide Substances 0.000 abstract description 9
- 235000012239 silicon dioxide Nutrition 0.000 abstract description 9
- 229910052682 stishovite Inorganic materials 0.000 abstract description 9
- 229910052905 tridymite Inorganic materials 0.000 abstract description 9
- 238000009413 insulation Methods 0.000 abstract description 6
- 239000001301 oxygen Substances 0.000 abstract description 6
- 239000000758 substrate Substances 0.000 abstract description 6
- 238000005268 plasma chemical vapour deposition Methods 0.000 abstract description 5
- 239000012535 impurity Substances 0.000 abstract description 4
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 abstract description 3
- 229910052782 aluminium Inorganic materials 0.000 abstract description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 238000002230 thermal chemical vapour deposition Methods 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 229910020169 SiOa Inorganic materials 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 230000008642 heat stress Effects 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Landscapes
- Local Oxidation Of Silicon (AREA)
- Formation Of Insulating Films (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は超ＬＳＩなどの絶縁膜に用いられる薄膜の形成
方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for forming a thin film used as an insulating film for VLSI and the like.
従来の技術
従来、テトラオキシシラン（以下ＴＥＯ８と記す）と０
２のプラズマ分解（以下プラズマＣＶＤと記す）や、Ｔ
Ｅ０１と０３との熱分解（以下熱ＣＶＤと記す）により
形成した薄膜はステップカバレッジが良好なために超Ｌ
ＳＩにおける多層配線の層間絶縁膜の形成技術として用
いられている。Conventional technology Conventionally, tetraoxysilane (hereinafter referred to as TEO8) and 0
2 plasma decomposition (hereinafter referred to as plasma CVD), T
The thin film formed by thermal decomposition (hereinafter referred to as thermal CVD) of E01 and 03 has a good step coverage, so it is ultra-L.
It is used as a technique for forming interlayer insulating films for multilayer wiring in SI.
この１例の簡単な素子断面を第３図に示す。A simple device cross section of this example is shown in FIG.
同図において、１１はトランジスタ等が作り込まれた基
板、１２は第１の絶縁膜、１３は第１の金属配線、１４
は６００ｎｍの厚みのＴＥ０１のプラズマＣｖＤと２０
０ｎｍ厚みのＴＥ０１の熱ＣＶＤで形成した薄膜の第２
の絶縁膜、１５は第２の金属配線を示す。このようにス
テップカバレッジが良好なために第２の金属配線の短絡
や断線の発生が抑えられている。In the figure, 11 is a substrate on which transistors and the like are built, 12 is a first insulating film, 13 is a first metal wiring, and 14
is the plasma CVD of TE01 with a thickness of 600 nm and 20
The second thin film formed by thermal CVD of TE01 with a thickness of 0 nm
15 is an insulating film, and 15 is a second metal wiring. Since the step coverage is thus good, the occurrence of short circuits and disconnections in the second metal wiring is suppressed.
発明が解決しようとする課題
しかし、かかる構成によれば、超ＬＳＩにおける微細化
が進み、金属配線間隙が例えば１μｍ程度になるとＴＥ
０１で形成した薄膜の絶縁特性が劣化するといった問題
があった。上述問題は以下の理由で生じる。すなわち、
ＴＥ０１を用いた薄膜は次のような反応となる。Problems to be Solved by the Invention However, with such a configuration, as miniaturization in VLSI progresses and the metal wiring gap becomes, for example, about 1 μm, the TE
There was a problem that the insulation properties of the thin film formed in No. 01 deteriorated. The above problem arises for the following reasons. That is,
A thin film using TE01 exhibits the following reaction.
Ｓ ｉ （ＯＣ２Ｈ６） ａ＋２４ （０）→Ｓ
ｉ ０２＋ ８ Ｃ０２＋ １０ ＨｐＯしかし、現
実には上記反応を５００℃以下の低温にて行うために完
全な形のＳｉＯ２は形成されず、膜中にはＣＨやＣＯや
ＯＨ等不純物が取り込まれており、前記不純物を介して
リーク電流が流れ易くなるために絶縁特性の劣化を来す
。このために例えば０２雰囲気中にて４５０″Ｃ程度の
熱処理を行うと絶縁特性の改善を計ることができる。S i (OC2H6) a+24 (0) → S
i 02+ 8 C02+ 10 HpO However, in reality, the above reaction is carried out at a low temperature below 500°C, so SiO2 in perfect form is not formed, and impurities such as CH, CO, and OH are incorporated into the film. , leakage current tends to flow through the impurities, resulting in deterioration of insulation properties. For this purpose, for example, heat treatment at about 450''C in a 02 atmosphere can improve the insulation properties.
しかし、熱処理を行うために熱ストレスを受けて金属配
線の断線を生じたり、配線金属が５ｉＯａを突き破って
成長するヒロックが発生して他の配線と短絡するといっ
た問題がある。However, there are problems such as disconnection of the metal wiring due to heat stress due to heat treatment, and hillocks where the metal wiring breaks through 5iOa and grows, resulting in short circuit with other wiring.
本発明は、上述の問題点に鑑みて為されたもので、断線
や短絡を発生することなく、絶縁特性を改善することが
できる薄膜の形成方法を提供することを目的とする。The present invention has been made in view of the above-mentioned problems, and an object of the present invention is to provide a method for forming a thin film that can improve insulation properties without causing disconnections or short circuits.
課題を解決するための手段
本発明は、プラズマＣＶＤあるいは熱ＣＶＤにてＴＥ０
１より形成した薄膜に酸素プラズマまたは光で生成した
酸素ラジカルを照射させるという構成を備えたものであ
る。Means for Solving the Problems The present invention provides TE0 by plasma CVD or thermal CVD.
The thin film formed from No. 1 is irradiated with oxygen plasma or oxygen radicals generated by light.
作用
本発明は上述の構成によって、ＴＥ０１にて作成した薄
膜の不純物を酸素プラズマまたは光で生成した酸素ラジ
カルによって除くことで良好なＳｉＯ２にすることがで
き、絶縁特性の改善が可能となる。Operation According to the present invention, with the above-described configuration, impurities in the thin film formed by TE01 can be removed by oxygen plasma or oxygen radicals generated by light, thereby making it possible to obtain good SiO2, thereby making it possible to improve the insulation properties.
実施例
第１図は本発明の一実施例による薄膜の形成方法のプロ
セスを示す説明図である。同図（ａ）において、トラン
ジスタ等が作り込まれた基板１１上に、第１の絶縁膜１
２を形成し、第１の金属配線１３として２％Ｓｉ含有の
アルミ（以下ＡＩと記す）配線が厚さ０． ８μｍでパ
ターン化されている。同図（ｂ）において、第２の絶縁
膜１４として平行平板形のプラズマＣＶＤ装置にてＴＥ
０１と０２ガスのプラズマ分解を行い、基板温度３８０
℃にて５ｉｄｅ膜を形成する。さらに上記ＳｉＯ２膜を
堆積後、Ｏ１！ガスのみのプラズマに約５分間さらして
処理を行う。Embodiment FIG. 1 is an explanatory diagram showing a process of a thin film forming method according to an embodiment of the present invention. In the same figure (a), a first insulating film 1 is formed on a substrate 11 on which transistors and the like are formed.
2, and a 2% Si-containing aluminum (hereinafter referred to as AI) wiring is formed as the first metal wiring 13 with a thickness of 0.2%. It is patterned at 8 μm. In the same figure (b), TE is used as the second insulating film 14 in a parallel plate type plasma CVD apparatus.
Plasma decomposition of 01 and 02 gases was performed, and the substrate temperature was 380℃.
A 5ide film is formed at ℃. Furthermore, after depositing the above SiO2 film, O1! The treatment is performed by exposing to gas-only plasma for about 5 minutes.
このような構成の基板における２本の平行に走るスペー
ス１μｍ１ 長さ１０ｍｍのＡＩ配線間に電圧を印加し
、前記ＡＩ配線間のリーク電流を測定した。その結果を
第２図に示す。同図で明らかなように上記処理をしない
ものは５ｖの印加電圧に対して数百ｐＡのリーク電流が
観察されるが、本実施例によれば数ｐＡのリーク電流と
極めて低減することができる。A voltage was applied between two AI wires having a space of 1 μm and a length of 10 mm running in parallel on the substrate having such a configuration, and the leakage current between the AI wires was measured. The results are shown in FIG. As is clear from the figure, a leakage current of several hundred pA is observed for an applied voltage of 5V without the above treatment, but according to this example, the leakage current can be extremely reduced to a few pA. .
なお本実施例ではｏ２ガスの例を示したが、Ｎ２０１
Ｎ０１Ｎ０２、Ｃ０１ＣＯ２ガスにいずれであっても同
様の効果は観察された。In this example, an example of O2 gas was shown, but N201
Similar effects were observed with either N01N02 or C01CO2 gas.
発明の効果
以上の説明から明らかなように、本発明は、ＴＥ０１に
よるＳ ｉ Ｏａ膜を形成した後にＯａ、 Ｎ２０１
ＮＯｌ ＮＯ２、Ｃ０１ＣＯ２ガスのうちの１つ以上
のガスか、前期１つ以上のガスとＮ２または不活性ガス
との混合ガスをプラズマにて分解した雰囲気中にさらす
か、光照射を行うことでＴＥ０１による５ｉ０２膜をよ
り強固にするため、前記ＴＥＯ８によるＳｉＯ２膜のリ
ーク電流の低減という効果を有するものである。Effects of the Invention As is clear from the above explanation, the present invention provides the following advantages: After forming a SiOa film using TE01, Oa, N201
TE01 can be achieved by exposing one or more of NOl NO2, CO1CO2 gases, or a mixed gas of one or more of the preceding gases and N2 or an inert gas to an atmosphere in which plasma is used to decompose it, or by irradiating it with light. In order to make the 5i02 film stronger, the TEO8 has the effect of reducing the leakage current of the SiO2 film.
第１図は、本発明の一実施例の薄膜形成工程の部分断面
図、第２図は、同方法にて形成された絶縁膜のリーク特
性図、第３図は、従来の眉間絶縁膜により絶縁された半
導体装置の断面構造図である。
１１・・・基板、１２・・・第１の絶縁膜、１３・・・
第１の金属配線、１４・・・第２の絶縁膜。FIG. 1 is a partial cross-sectional view of a thin film forming process according to an embodiment of the present invention, FIG. 2 is a leakage characteristic diagram of an insulating film formed by the same method, and FIG. 3 is a diagram showing a conventional glabella insulating film. FIG. 2 is a cross-sectional structural diagram of an insulated semiconductor device. 11... Substrate, 12... First insulating film, 13...
First metal wiring, 14... second insulating film.
Claims (2)
にて薄膜を堆積する第１の工程か、テトラオキシシラン
とＯ＿３ガスの熱分解にて薄膜を堆積する第２の工程か
、上記第１と第２の工程を複数回繰り返して薄膜を堆積
する第３の工程、または上記第１か第２あるいは第３の
工程で堆積した薄膜の１部をエッチングする第４の工程
よりなる薄膜の形成方法において、上記第１の工程かま
たは第２の工程または第３の工程または第４の工程にて
形成した薄膜をＯ＿２、Ｎ＿２Ｏ、ＮＯ、ＮＯ＿２、Ｃ
Ｏ、ＣＯ＿２ガスのうちの１つ以上のガスか、前期１つ
以上のガスとＮ＿２または不活性ガスとの混合ガスをプ
ラズマにて分解した雰囲気中にさらす工程よりなること
を特徴とする薄膜の形成方法。(1) The first step is to deposit a thin film by plasma decomposition of tetraoxysilane and O_2 gas, or the second step is to deposit a thin film by thermal decomposition of tetraoxysilane and O_3 gas. A method for forming a thin film comprising: a third step of depositing a thin film by repeating step 2 a plurality of times; or a fourth step of etching a part of the thin film deposited in the first, second or third step. , the thin film formed in the first step, second step, third step, or fourth step is O_2, N_2O, NO, NO_2, C
A method for producing a thin film characterized by a step of exposing one or more of O, CO_2 gases, or a mixed gas of one or more of the above gases and N_2 or an inert gas to an atmosphere in which plasma has been decomposed. Formation method.
にて薄膜を堆積する第１の工程か、テトラオキシシラン
とＯ＿３ガスの熱分解にて薄膜を堆積する第２の工程か
、上記第１と第２の工程を複数回繰り返して薄膜を堆積
する第３の工程、または上記第１か第２あるいは第３の
工程で堆積した薄膜の１部をエッチングする第４の工程
よりなる薄膜の形成方法において、上記第１の工程かま
たは第２の工程または第３の工程または第４の工程にて
形成した薄膜をＯ＿２、Ｎ＿２Ｏ、ＮＯ、ＮＯ＿２、Ｃ
Ｏ、ＣＯ＿２ガスのうちの１つ以上のガスか、前期１つ
以上のガスとＮ＿２または不活性ガスとの混合ガス中に
て保持し、光照射を行う工程よりなることを特徴とする
薄膜の形成方法。(2) The first step is to deposit a thin film by plasma decomposition of tetraoxysilane and O_2 gas, or the second step is to deposit a thin film by thermal decomposition of tetraoxysilane and O_3 gas. A method for forming a thin film comprising: a third step of depositing a thin film by repeating step 2 a plurality of times; or a fourth step of etching a part of the thin film deposited in the first, second or third step. , the thin film formed in the first step, second step, third step, or fourth step is O_2, N_2O, NO, NO_2, C
A thin film characterized by comprising a step of maintaining the thin film in one or more of O and CO_2 gases or a mixed gas of one or more of the above gases and N_2 or an inert gas, and irradiating it with light. Formation method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1039889A JPH06103691B2 (en) | 1989-02-20 | 1989-02-20 | Method of forming thin film |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1039889A JPH06103691B2 (en) | 1989-02-20 | 1989-02-20 | Method of forming thin film |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02219232A true JPH02219232A (en) | 1990-08-31 |
| JPH06103691B2 JPH06103691B2 (en) | 1994-12-14 |
Family
ID=12565539
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1039889A Expired - Fee Related JPH06103691B2 (en) | 1989-02-20 | 1989-02-20 | Method of forming thin film |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH06103691B2 (en) |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0438829A (en) * | 1990-06-04 | 1992-02-10 | Mitsubishi Electric Corp | Semiconductor device and manufacture thereof |
| US5302555A (en) * | 1991-06-10 | 1994-04-12 | At&T Bell Laboratories | Anisotropic deposition of dielectrics |
| WO1995002896A1 (en) * | 1993-07-15 | 1995-01-26 | Tadahiro Ohmi | Method for manufacturing semiconductor |
| US5427824A (en) * | 1986-09-09 | 1995-06-27 | Semiconductor Energy Laboratory Co., Ltd. | CVD apparatus |
| US5610105A (en) * | 1992-10-23 | 1997-03-11 | Vlsi Technology, Inc. | Densification in an intermetal dielectric film |
| US6013338A (en) * | 1986-09-09 | 2000-01-11 | Semiconductor Energy Laboratory Co., Ltd. | CVD apparatus |
| JP2007281516A (en) * | 2002-10-30 | 2007-10-25 | Fujitsu Ltd | Method for manufacturing semiconductor device |
| US8349722B2 (en) | 2002-10-30 | 2013-01-08 | Fujitsu Semiconductor Limited | Silicon oxycarbide, growth method of silicon oxycarbide layer, semiconductor device and manufacture method for semiconductor device |
| US8778814B2 (en) | 2002-10-30 | 2014-07-15 | Fujitsu Semiconductor Limited | Silicon oxycarbide, growth method of silicon oxycarbide layer, semiconductor device and manufacture method for semiconductor device |
-
1989
- 1989-02-20 JP JP1039889A patent/JPH06103691B2/en not_active Expired - Fee Related
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5427824A (en) * | 1986-09-09 | 1995-06-27 | Semiconductor Energy Laboratory Co., Ltd. | CVD apparatus |
| US5629245A (en) * | 1986-09-09 | 1997-05-13 | Semiconductor Energy Laboratory Co., Ltd. | Method for forming a multi-layer planarization structure |
| US5855970A (en) * | 1986-09-09 | 1999-01-05 | Semiconductor Energy Laboratory Co., Ltd. | Method of forming a film on a substrate |
| US6013338A (en) * | 1986-09-09 | 2000-01-11 | Semiconductor Energy Laboratory Co., Ltd. | CVD apparatus |
| JPH0438829A (en) * | 1990-06-04 | 1992-02-10 | Mitsubishi Electric Corp | Semiconductor device and manufacture thereof |
| US5302555A (en) * | 1991-06-10 | 1994-04-12 | At&T Bell Laboratories | Anisotropic deposition of dielectrics |
| US5610105A (en) * | 1992-10-23 | 1997-03-11 | Vlsi Technology, Inc. | Densification in an intermetal dielectric film |
| WO1995002896A1 (en) * | 1993-07-15 | 1995-01-26 | Tadahiro Ohmi | Method for manufacturing semiconductor |
| JP2007281516A (en) * | 2002-10-30 | 2007-10-25 | Fujitsu Ltd | Method for manufacturing semiconductor device |
| US8349722B2 (en) | 2002-10-30 | 2013-01-08 | Fujitsu Semiconductor Limited | Silicon oxycarbide, growth method of silicon oxycarbide layer, semiconductor device and manufacture method for semiconductor device |
| US8778814B2 (en) | 2002-10-30 | 2014-07-15 | Fujitsu Semiconductor Limited | Silicon oxycarbide, growth method of silicon oxycarbide layer, semiconductor device and manufacture method for semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH06103691B2 (en) | 1994-12-14 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |