JPH02166739A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To round the corner part of an aluminum wiring and to improve the step coverage of a deposited interlayer insulating film by providing the aluminum wiring in a vacuum chamber after the formation by patterning, applying argon shock, and performing heat treatment under this state. CONSTITUTION:An aluminum wiring 12 is patterned on a semiconductor substrate 11. The device is provided in an argon atmosphere. Argon gas is ionized. The ions are made to hit on the aluminum wiring 12. As a result, defects are induced in the surface of the aluminum wiring. The surface of the aluminum wiring is made soft and fluid by heating, and the round part is formed. Then, an SiO2 film which is to serve as an interlayer insulating film is deposited. Then, a second aluminum wiring layer 14 is formed. Since the corner part of the aluminum wiring 12 which becomes the ground layer is made round, the step coverage of the SiO2 film 13 is not deteriorated, and voids are not formed between the aluminum wirings.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and in particular to improving the reliability of multilayer wiring.

Conventional techniques (111) Conventionally, aluminum (At") films, which are inexpensive and have low electrical resistance, have been used as metal wiring materials for semiconductor devices. The aluminum film deposited by this method is polycrystalline, and the crystal grain size is 0.5 μm to 2.5 μm. 0 μm (Ae-1% S
i). Further, in recent years, dry etching technology, which has excellent processing dimensional accuracy and selectivity of processing materials, has been used for fine processing of aluminum wiring with a line width of 2.0 μm or less.

After forming interconnections with a spacing of 1.0 μm or less using dry etching technology, a 5i02 interlayer insulating film is deposited using plasma CVD, contact holes are opened, and an upper interconnection layer is formed.

FIG. 2 is a diagram illustrating a conventional multilayer wiring process.

First, as shown in FIG. 2A, 11,000 nm of Ae-1% Si is deposited on a semiconductor substrate 21, and then aluminum wiring 22 is patterned by a normal photolithography process. The minimum wiring spacing in this case is 11000n
It is. Subsequently, the same figure (B) was obtained by plasma CVD method.
As shown in FIG. 2, a 5i02 film 23 is deposited to a thickness of 1200 nm. Thereafter, as shown in FIG. 3C, an upper layer of aluminum wiring 24 was formed. In this conventional example, aluminum wiring 2
2 is minute, about 1.0 μm, so the insulating film between the eyebrows, 5iO211! A23 is inserted into the space between the aluminum wiring lines 220 and becomes thin, and a hollow portion is formed.

Further, in the diagram of this conventional example, transistors and the like on the semiconductor substrate are omitted.

Problems to be Solved by the Invention As described above, in the conventional wiring structure, a cavity is created in the 5i02 film 23, which is an interlayer insulating film. Therefore,
This causes deterioration in the withstand voltage of the interlayer insulating film between the upper and lower wiring layers.

In addition, it is difficult for the 5i02 film to enter between the wirings (because
There are parts where the interlayer insulating film becomes thinner and the breakdown voltage deteriorates. Furthermore,
Because the upper wiring layer is formed on top of an unplanarized interlayer insulating film, the step coverage of the wiring deteriorates, the upper wiring becomes thin due to constrictions, and problems such as high current density (leading to disconnection) occur. It had a point.

Means for Solving the Problems In the method for manufacturing a semiconductor device of the present invention, plasma is generated in an aluminum wiring formed on a semiconductor substrate in an inert gas, and inert gas ions (for example, argon ions) are attached to the substrate. The temperature of the semiconductor substrate increases at the same time as the semiconductor substrate collides with the semiconductor substrate.

Function The present invention applies argon bombardment to patterned aluminum wiring by the above-described semiconductor device manufacturing method to induce defects, and at the same time, increases temperature to soften and fluidize the aluminum wiring surface. Round the corners of the aluminum wiring. As a result, the step coverage of the interlayer insulating film deposited on the aluminum wiring can be improved.

Example FIG. 1 is a process explanatory diagram of an embodiment of the present invention.

In FIG. 1, 11 is a semiconductor substrate, 12 is a thickness of 0.8
μm, first layer aluminum wiring with minimum spacing of 0.8 μm, 1
3 has a thickness of 1.2μ formed by plasma CVD method.
The SiO2 film 14, which is an interlayer insulating film, has a thickness of 0.8μ.
This is the second layer of aluminum wiring.

First, as shown in FIG. 1(A), an Ae-1% Si film is deposited to a thickness of 800 nm on a semiconductor substrate 11 using a DC magnetron sputtering method, and then a minimum thickness of 800 nm is deposited on a semiconductor substrate 11 using a normal photolithography process and a dry etching process. The aluminum wiring 12 was patterned so that the wiring spacing was 800 nm.

Next, the semiconductor substrate 11 is placed in an argon atmosphere, a negative potential is applied to the semiconductor substrate 11, and a positive potential is applied to the counter electrode (not shown) to ionize the argon gas, and the aluminum wiring 1
Collision into 2. Specifically, the pressure is 1.0 Pa, the power is 0
, 5 w/cat, and a substrate temperature of 300°C. As shown in the same figure (B), this treatment induces defects on the aluminum wiring surface, and by heating it,
The aluminum wiring surface can be softened and fluidized to give it a rounded shape.

Subsequently, as shown in FIG. 3C, a 5i02 film 13, which will become an interlayer insulating film, is deposited by plasma CVD. In this case, since the corner portions of the underlying aluminum wiring 12 are rounded, the step coverage of the 5i02 film 13 does not deteriorate;
It can be formed without creating cavities between aluminum wirings or creating thin parts.

Thereafter, as shown in FIG. 2D, a second layer of aluminum wiring 14 is formed. In this example, 5i, which becomes the interlayer insulating film,
Since the 02 film 13 is deposited in a step covering manner, there are no hollow parts or thin parts, and reliability in terms of withstand voltage, leakage current, etc. can be improved.

In addition, since the second layer of aluminum wiring does not have any constricted parts, the current density is high, and there are no parts that generate heat and are disconnected, improving reliability.

In this example, aluminum was used as the wiring material and argon was used as the inert gas, but similar effects can be expected with other materials. Further, as a means for softening and fluidizing the aluminum surface, other means such as only heating the semiconductor substrate or heating with laser light may be used.

Furthermore, according to the present invention, it is possible to solve the problem of the aluminum film not adhering to a contact hole or a microscopic step due to its poor step coverage. Needless to say.

As described in detail, according to the present invention, the interlayer insulating film is deposited after rounding the corner portions of the aluminum wiring using a simple method, so that no cavities or thin portions are generated, and the first Since the second layer wiring is also formed without being constricted, the reliability of the wiring can be significantly improved, which has great practical effects in industry.

[Brief explanation of the drawing]

FIG. 1 is a manufacturing process cross-sectional view showing the step of rounding the corners of an aluminum wiring according to an embodiment of the present invention, and FIG. 2 is a conventional aluminum wiring forming process cross-sectional view. 11...Semiconductor substrate, 12...Aluminum wiring, 13...5i02 film, 14...
aluminum wiring. Name of agent: Patent attorney Shigetaka Awano (1 person)

Claims (1)

[Claims] A method for forming aluminum wiring that electrically connects a plurality of elements formed on the surface of a semiconductor substrate, characterized in that after patterning the aluminum wiring, it is placed in a vacuum chamber and heat treated while applying argon bombardment. A method for manufacturing a semiconductor device.