JPH02151056A - Manufacture of power supply board for semiconductor device - Google Patents
Manufacture of power supply board for semiconductor deviceInfo
- Publication number
- JPH02151056A JPH02151056A JP30413388A JP30413388A JPH02151056A JP H02151056 A JPH02151056 A JP H02151056A JP 30413388 A JP30413388 A JP 30413388A JP 30413388 A JP30413388 A JP 30413388A JP H02151056 A JPH02151056 A JP H02151056A
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- supply board
- semiconductor device
- insulating layers
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 14
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 13
- 239000004020 conductor Substances 0.000 claims abstract description 29
- 239000010949 copper Substances 0.000 claims abstract description 17
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 16
- 229910052802 copper Inorganic materials 0.000 claims abstract description 16
- 238000000034 method Methods 0.000 claims abstract description 15
- 230000017525 heat dissipation Effects 0.000 claims abstract description 12
- 239000000945 filler Substances 0.000 claims abstract description 8
- 238000001816 cooling Methods 0.000 claims description 12
- 239000000463 material Substances 0.000 claims description 7
- 239000000758 substrate Substances 0.000 claims description 7
- 238000009792 diffusion process Methods 0.000 claims description 5
- 229920005989 resin Polymers 0.000 claims description 5
- 239000011347 resin Substances 0.000 claims description 5
- 238000007872 degassing Methods 0.000 claims description 2
- 230000000149 penetrating effect Effects 0.000 claims 1
- 239000002826 coolant Substances 0.000 abstract description 9
- 239000003822 epoxy resin Substances 0.000 abstract description 4
- 229920000647 polyepoxide Polymers 0.000 abstract description 4
- 230000005855 radiation Effects 0.000 abstract description 4
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 abstract description 3
- 238000010030 laminating Methods 0.000 abstract description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 abstract 1
- 229910052593 corundum Inorganic materials 0.000 abstract 1
- 229910052760 oxygen Inorganic materials 0.000 abstract 1
- 239000001301 oxygen Substances 0.000 abstract 1
- 229910001845 yogo sapphire Inorganic materials 0.000 abstract 1
- 239000003507 refrigerant Substances 0.000 description 23
- 229910045601 alloy Inorganic materials 0.000 description 9
- 239000000956 alloy Substances 0.000 description 9
- 238000004806 packaging method and process Methods 0.000 description 6
- 238000005304 joining Methods 0.000 description 5
- 230000020169 heat generation Effects 0.000 description 4
- 239000011810 insulating material Substances 0.000 description 4
- 239000000919 ceramic Substances 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 239000011368 organic material Substances 0.000 description 3
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 3
- LTPBRCUWZOMYOC-UHFFFAOYSA-N Beryllium oxide Chemical compound O=[Be] LTPBRCUWZOMYOC-UHFFFAOYSA-N 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 238000003860 storage Methods 0.000 description 2
- 229910017944 Ag—Cu Inorganic materials 0.000 description 1
- 239000002033 PVDF binder Substances 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- HMDDXIMCDZRSNE-UHFFFAOYSA-N [C].[Si] Chemical compound [C].[Si] HMDDXIMCDZRSNE-UHFFFAOYSA-N 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- SLGWESQGEUXWJQ-UHFFFAOYSA-N formaldehyde;phenol Chemical compound O=C.OC1=CC=CC=C1 SLGWESQGEUXWJQ-UHFFFAOYSA-N 0.000 description 1
- LNEPOXFFQSENCJ-UHFFFAOYSA-N haloperidol Chemical compound C1CC(O)(C=2C=CC(Cl)=CC=2)CCN1CCCC(=O)C1=CC=C(F)C=C1 LNEPOXFFQSENCJ-UHFFFAOYSA-N 0.000 description 1
- 229910010272 inorganic material Inorganic materials 0.000 description 1
- 239000011147 inorganic material Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 229920001568 phenolic resin Polymers 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 229920002981 polyvinylidene fluoride Polymers 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Landscapes
- Pressure Welding/Diffusion-Bonding (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は接合方式により冷媒流路を設けた導体と絶縁体
とを交互に積層して、高密度に実装されたＬＳＩ用電源
基板で発生する熱を効率的に除去する冷却構造を備えた
半導体装置用電源基板の製作方法に関する。[Detailed Description of the Invention] [Field of Industrial Application] The present invention is based on an LSI power supply board that is densely packaged by alternately laminating conductors and insulators provided with coolant channels using a bonding method. The present invention relates to a method of manufacturing a power supply board for a semiconductor device, which is equipped with a cooling structure that efficiently removes heat.
半導体装置用電源基板は配線基板上に多数のチップを搭
載し、その実装密度を上げたマルチチップ方式が採用さ
れており、装置の処理速度を向上させるためには高集積
化、大電力化が図られ１、チップから発生する熱量は強
制空冷等の冷却手段で冷却し得る限界を超えてきている
。そのため、計算機等の半導体装置では特開昭５９−２
０２６５４号公報に開示されているように配線基板内に
冷媒流路等を設ける等の検討を行なっている。これはチ
ップからの発熱量を防止するためにとられた対策である
が、いずれの実施例でも配線基板内に冷媒管路を設けた
構造である。そのため、配線基板内には信号線と給電線
及び冷媒管が混在し、故障の原因となる。また、将来、
消費電力の増大につれてチップの発熱量だけでなく電源
基板での発熱量も問題化し、これをいかに冷却するかが
大型計算機を製作する上でのポイントとなるが、具体的
な対策は講じられていない、また、者現状の多層プリン
ト板等では発熱対策として送風機等を用いて冷却を行っ
ている。しかし、これらの実装密度がさらに高くなった
場合、多量の熱の発生が予想され、その対策として大風
量、高圧力の大型送風機を設けなければならず騒音や廐
埃の発生など種々の問題が発生する。しかし、このよう
な大型送風機の設置は装置のコンパクト化に逆行するも
のである。Power supply boards for semiconductor devices use a multi-chip method in which a large number of chips are mounted on a wiring board, increasing the packaging density, and in order to improve the processing speed of devices, higher integration and higher power are required. 1, the amount of heat generated from the chip has exceeded the limit that can be cooled by cooling means such as forced air cooling. Therefore, in semiconductor devices such as computers, JP-A-59-2
As disclosed in Japanese Patent Application No. 02654, studies are being carried out on the provision of coolant channels and the like within the wiring board. This is a measure taken to prevent the amount of heat generated from the chip, but in all embodiments, the structure is such that a refrigerant pipe is provided within the wiring board. Therefore, signal lines, power supply lines, and refrigerant pipes coexist within the wiring board, causing failures. Also, in the future
As power consumption increases, not only the amount of heat generated by the chip but also the amount of heat generated by the power supply board becomes a problem, and how to cool this is a key point in manufacturing large computers, but no concrete measures have been taken. In addition, current multilayer printed boards and the like are cooled using blowers and the like as a countermeasure against heat generation. However, if the packaging density of these devices becomes even higher, a large amount of heat is expected to be generated, and as a countermeasure, it is necessary to install a large blower with a large air volume and high pressure, which causes various problems such as noise and dust generation. Occur. However, installing such a large blower goes against the trend of making the device more compact.
大型計算機等に用いられるＬＳＩチップの高密度実装化
を図るために多層配線基板上に多数のチップを搭載され
ているが、これらのチップは特開昭６０−３２３４８号
公報に開示されているように、般に多層配線基板の表面
にＬＳＩチップを搭載し、基板のＬＳＩチップを搭載す
る面とは反対の面に人出力の端子ピンを設けて、入出力
ビンとチップとを電気的に接続するように構成されてい
る。これらチップの数を増加し、実装密度を高めるほど
基板は大きくなり、基板自体の反りやうねりが生じやす
くなる。次に、実公昭５８−３２３１２号公報に示さ九
ている基板のうねり、又は、反りが基板の寸法にほぼ比
例して増大するため、冷却フィンを半田、接着剤等で基
板に固着することは難しい。In order to achieve high-density packaging of LSI chips used in large computers, etc., a large number of chips are mounted on a multilayer wiring board, but these chips are Generally, an LSI chip is mounted on the surface of a multilayer wiring board, and terminal pins for human output are provided on the opposite side of the board from where the LSI chip is mounted to electrically connect the input/output bin and the chip. is configured to do so. As the number of these chips increases and the packaging density increases, the board becomes larger, and the board itself becomes more likely to warp or undulate. Next, as shown in Japanese Utility Model Publication No. 58-32312, the waviness or warpage of the board increases approximately in proportion to the dimensions of the board, so it is not possible to fix the cooling fins to the board with solder, adhesive, etc. difficult.
さらに、基板の大型化に伴って基板内の電源層パターン
を通して給電することは電圧降下が大きくなって困難で
あるとしている。そして基板と放熱フィンとの間に良好
な熱伝導性および機械的な、弾性をもつ絶縁シートと導
体板とを交互に重ね合せて挿入し、全体をボルトで加圧
固定する構造が提案されている。しかし、この構造では
絶縁シートと導体板との間の接触熱抵抗が問題となるが
これについては触れられていない。Furthermore, as the size of the substrate increases, it becomes difficult to supply power through the power layer pattern within the substrate because the voltage drop increases. A structure was proposed in which insulating sheets and conductor plates with good thermal conductivity, mechanical strength, and elasticity are alternately stacked and inserted between the substrate and the heat dissipation fins, and the whole is fixed under pressure with bolts. There is. However, this structure poses a problem of contact thermal resistance between the insulating sheet and the conductive plate, but this issue is not mentioned.
特開昭６２−１４０４４８号公報では導体層を２００〜
４００μｍとし、それに８０〜１２０μｍの冷却孔を設
けて電源基板としているが、これでは流路が細径すぎて
、高圧力を負荷しないと孔づまりを生じ、冷媒を安定的
に供給（特に水の場合）するのが難しく、また、冷媒を
給、排水する方法についても明記されていない、さらに
、導体層を作成する場合の合金層の厚さについて２〜３
μｍと規定してい３が、これでは接合の際、溶融不足を
生じ、未接合部分が著しく発生する。In JP-A No. 62-140448, the conductor layer is
400 μm, and cooling holes of 80 to 120 μm are provided as a power supply board, but the flow path is too small and the holes will clog unless high pressure is applied, making it difficult to stably supply the refrigerant (especially in the case of water). ), and the method for supplying and draining the refrigerant is not specified.Furthermore, the thickness of the alloy layer when creating the conductor layer is 2-3.
It is defined as 3 μm, but this results in insufficient melting during bonding, resulting in significant unbonded portions.
本発明の目的は、熱放散性のすぐれた電源基板を供給す
ることによってチップの高密度実装を可能にするように
した半導体装置用電源基板の製作方法を提供することに
ある。SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a power supply board for a semiconductor device, which enables high-density mounting of chips by supplying a power supply board with excellent heat dissipation properties.
熱放散性にすぐれた電源基板を製作するには、絶縁層に
放熱フィンを混合すると同時に、微細な冷媒流路を拡散
接合法で形成した３体層を交互に重ね合せる。To manufacture a power supply board with excellent heat dissipation, heat dissipation fins are mixed into the insulating layer, and at the same time, three layers in which fine coolant channels are formed by diffusion bonding are alternately stacked.
本発明は、ＬＳＩチップを搭載しようとする電源基板に
係り、電源基板が導体層と絶縁層とを交互に重ね合せて
一体化した構造で、導体層・と絶縁層の少なくとも一方
が放熱手段をもつ電源基板に関する。The present invention relates to a power supply board on which an LSI chip is mounted, and the power supply board has a structure in which conductive layers and insulating layers are alternately stacked and integrated, and at least one of the conductive layers and the insulating layer has a heat dissipation means. Regarding the power supply board.
装置の実装の高密度化を可能にし、しかも、装置自体の
大型化を防ぐにはチップを搭載する配線基板と電源基板
とを分割構造とすることが有効であることを見出した。We have found that it is effective to have a separate structure for the wiring board on which the chip is mounted and the power supply board, in order to enable higher density packaging of the device and also to prevent the device itself from increasing in size.
このことは、電源基板からチップまでの給電経路を短く
することができ、電圧の降下を低く押えることができる
ようになる。This makes it possible to shorten the power supply path from the power supply board to the chip, making it possible to keep the voltage drop low.
また、信号配線の長さを短くすることもできる。Furthermore, the length of the signal wiring can also be shortened.
しかし、基板をこのように分割構造とした場合には、ｆ
ｆｉ源基板基板自身熱し、チップを破壊してしまうこと
かあり得る。一般に、電源基板の発熱量は電力を増加す
るほど増大し、５００℃を超えることもあるとされてお
り、チップの破壊を防ぐためには電ｇ基板の温度を１０
０℃以下に抑えるべきである。これらチップから発生す
る熱の除去手段については各種の方法が提案されており
、その−例は特開昭６０−３２３４８号公報に記載され
ている。However, when the board is divided into such a structure, f
The FI source substrate itself may heat up and destroy the chip. In general, the amount of heat generated by a power supply board increases as the power increases, and it is said that it can exceed 500℃, so in order to prevent chip destruction, the temperature of the power supply board must be lowered by 10℃.
The temperature should be kept below 0°C. Various methods have been proposed for removing heat generated from these chips, examples of which are described in Japanese Patent Application Laid-Open No. 60-32348.
しかし、電源基板から発生する熱の具体的な除去方法に
ついては明記されてない。これら導体層と絶縁層との積
層構造をもつ電源基板に放熱フィンを取り付けた程度で
は電源基板から発生する熱を除去できないことが特願昭
６２−１４０４４８号で明らかにされている。However, no specific method for removing heat generated from the power supply board is specified. It has been revealed in Japanese Patent Application No. 140448/1988 that heat generated from the power supply board cannot be removed by simply attaching radiation fins to the power supply board having a laminated structure of conductor layers and insulating layers.
そこで、発明者らは電源基板を構成する導体層と絶縁層
の両方に放熱手段を設けることにより、電源基板の発熱
量を著しく低下することに成功した。すなわち、その放
熱手段に冷媒流路を設けた導体層とフイラ材を混入した
絶縁層との多層積構造である。このようにしてできた電
源基板の発熱温度を実測した結果、十分に効果のあるこ
とがわかった。Therefore, the inventors succeeded in significantly reducing the amount of heat generated by the power supply board by providing heat dissipation means in both the conductive layer and the insulating layer that constitute the power supply board. That is, the heat dissipation means has a multi-layered structure of a conductor layer provided with a coolant flow path and an insulating layer mixed with a filler material. As a result of actually measuring the heat generation temperature of the power supply board made in this way, it was found that it was sufficiently effective.
導体層はＡｇ−Ｃｕ合金膜を介して拡散接合方法で作成
した１、５ｔ の銅板で、その内部には約０．５Ｒ半円
の冷媒流路を多数内在している。冷媒の供給は冷媒貯蔵
タンクと導体層の冷媒流路を出し入れする部分とをパイ
プで連結してポンプにより行うようにしである。The conductor layer is a 1.5 t copper plate made by diffusion bonding via an Ag-Cu alloy film, and has a large number of approximately 0.5R semicircular refrigerant channels inside. The refrigerant is supplied by a pump that connects the refrigerant storage tank and the part of the conductive layer through which the refrigerant flow path is taken in and out.
絶縁層の材料は、有機材料を用いるが、この樹脂を導体
と導体との間に挿入し、接着剤として利用する゛ととも
に、有機材料゛、すなわち、樹脂の中にフイラ剤を混合
することによって放熱性を高めるように考慮したもので
ある。また、フイラ材の存在は有機樹脂の耐クラツク性
を高める効果もある６尚、これらの有機材料はエポキシ
樹脂を主とするが、その他に付加型ポリイミド、ポリ弗
化ビニリデシ、あるいは、フェノールホルムアルデヒド
等があり、それを用いることもある。又、無機材料は高
熱伝導性炭イピ珪素（Ｓ ｉ Ｃ）セラミックス、高純
度ＳｉＣセラミックス、ＳｉＣ単結晶。The material of the insulating layer is an organic material, and this resin is inserted between the conductors and used as an adhesive, and the organic material, that is, the resin, is mixed with a filler agent. This is designed to improve heat dissipation. In addition, the presence of filler material has the effect of increasing the crack resistance of organic resins.6 These organic materials are mainly epoxy resins, but other materials include addition type polyimide, polyvinylidene fluoride, phenol formaldehyde, etc. There is, and it is sometimes used. Inorganic materials include high thermal conductivity silicon carbon (S i C) ceramics, high purity SiC ceramics, and SiC single crystals.
アルミナ（ＡＱｚＯａ）、あるいは、ベリリア（Ｂｅｄ
）等を用いることもできるが、一般には、有機樹脂を用
いた方がよい。Alumina (AQzOa) or beryllia (Bed)
) etc., but it is generally better to use an organic resin.
さらに、フィラー材は、銅、銀またはその合金から成る
金属フィラ、アルミナあるいはＳｉＣ等のセラミックス
フィラーを用いることがよい。Further, as the filler material, it is preferable to use a metal filler made of copper, silver or an alloy thereof, or a ceramic filler such as alumina or SiC.
以上のほか電源基板内の放熱をより効果的なものとする
ために導体層と絶縁層に外気に連通する微小な孔を形成
することもよい。これは孔を設けることによって放熱面
積が増加し、熱の放熱性が高くなるためである。In addition to the above, in order to make heat dissipation within the power supply board more effective, minute holes communicating with the outside air may be formed in the conductor layer and the insulating layer. This is because the provision of the holes increases the heat radiation area and improves the heat radiation performance.
以上のことを確めるために、第１図に示すような電源基
板を作製した。すなわち、第２図に示す冷媒流路を内在
するように、拡散接合方法で接合した１００ｍｍ角Ｘ１
．５ｔ の無酸素銅製の導体層と、エポキシ樹脂に放
熱に有効なＡＱｚＯａを混合した絶縁層とを交互に積層
して電源基板を作成した。それに水を２００ Ｑ ／ｍ
ｉｎ供給し、約５０ＯＡの電流を供給したが電源基板の
発熱温度は配線基板側の表面で約４５℃、その反対側の
表面で約４０°Ｃであった。In order to confirm the above, a power supply board as shown in FIG. 1 was manufactured. In other words, a 100 mm square
．． A power supply board was created by alternately laminating conductor layers made of 5t oxygen-free copper and insulating layers made of an epoxy resin mixed with AQzOa, which is effective for heat dissipation. Add water to it at 200 Q/m
In this case, a current of about 50 OA was supplied, but the heat generation temperature of the power supply board was about 45° C. on the surface on the wiring board side and about 40° C. on the surface on the opposite side.
以下本発明の実施例を図面を用いて説明する。 Embodiments of the present invention will be described below with reference to the drawings.
第１図は本発明の電源基板を示し、第２図は各導体層の
内部に形成した冷媒流路をポルた。第３図は本発明電源
基板にＬ’ＳＩチップ３を組み込んだ場合の全体構成で
ある。図中２は配線基板、７は電源ピン。FIG. 1 shows the power supply board of the present invention, and FIG. 2 shows the coolant channels formed inside each conductor layer. FIG. 3 shows the overall configuration when the L'SI chip 3 is incorporated into the power supply board of the present invention. In the figure, 2 is the wiring board, and 7 is the power pin.
第４図は第３図に示した電源基板の断面図を拡大して示
したものである。厚さ約１２０μｍの有機絶縁材５と厚
さ１’ 、 ５ ｍｍで冷媒流路を内在した導体層１が
四枚、交互に積層されている。−枚の導体層１には電源
スルーホール８を設けると同時に電源スルーホール８と
電源スルーホール８の間に半円形流路１３がピッチ６ｍ
ｍで六個配置される。FIG. 4 is an enlarged sectional view of the power supply board shown in FIG. 3. Organic insulating material 5 with a thickness of about 120 μm and four conductor layers 1 with a thickness of 1'. - A power supply through hole 8 is provided in the conductive layer 1, and at the same time, a semicircular flow path 13 is formed at a pitch of 6 m between the power supply through holes 8.
Six pieces are arranged in m.
１１．１２は位置合せ孔である。11 and 12 are alignment holes.
第５図は、冷媒流路１３の形成方法を示す図である。厚
さ１ｍｍの銅板に冷媒流路を形成した銅板１と０．５ｍ
ｍの銅板１′を拡散接合方法により接合して一枚の導体
とするが、厚さ１ｍｍの銅板１にはフォトエツチングに
より、半円形状の冷却溝１３を形成する。このようにし
て準備した銅板１及び１′は真空中にセットし、エツチ
ング処理して接合面となる部分の酸化皮膜を除去し、そ
の後、接合面となる部分に接合用合金膜１４を形成する
。FIG. 5 is a diagram showing a method of forming the refrigerant flow path 13. Copper plate 1 with a refrigerant flow path formed on a 1mm thick copper plate and 0.5m
Copper plates 1' having a thickness of 1 mm are bonded together by a diffusion bonding method to form a single conductor, and semicircular cooling grooves 13 are formed in the copper plates 1 having a thickness of 1 mm by photo-etching. The copper plates 1 and 1' thus prepared are placed in a vacuum, etched to remove the oxide film on the parts that will become the joint surfaces, and then a joining alloy film 14 is formed on the parts that will be the joint surfaces. .
接合用合金１１Ａ１４は銅板より融点の低い７２％Ａｇ
＝Ｃｕを用いる。銅板１及び１′の接合用合金膜をスパ
ッタリング、または、蒸着後は膜同士を対面し、加圧、
加熱して作成する。この場合、接合用合金膜１４の厚さ
は６〜１２μｍとし、８３０〜９００℃で接合するか、
その前処理として７８０〜８５０℃で脱ガス処理する必
要がある。Joining alloy 11A14 is 72% Ag, which has a lower melting point than the copper plate.
=Cu is used. After sputtering or vapor-depositing the alloy film for bonding the copper plates 1 and 1', the films are placed facing each other and pressure is applied.
Create by heating. In this case, the thickness of the bonding alloy film 14 is 6 to 12 μm, and the bonding is performed at 830 to 900°C, or
As a pretreatment, it is necessary to perform a degassing treatment at 780 to 850°C.
また、接合用合金膜１４の形成はスパッタ法以外に蒸着
法、メツキ法でも形成可能であり、さらには箔を用いる
こともできるが、微細な冷媒流路形成時に流路が閉塞さ
れてしまう。尚、この場合の接合は真空中で所定の温度
に加熱、加圧して一体化し、冷媒流路が形成される。こ
のように冷媒流路が形成された後は、有機絶縁材を各導
体と導体との間に挿入、接着、積層することにより一体
化して一個の電源基板ができる。この場合の有機絶縁材
としてはエポキシ樹脂を用いた。また、外部電源との接
続は入出力端子６を通じて行うと共に、冷媒の流入、流
出は導体に設けた端子の部分に自在に変形可能な導管（
９，１０）を接続して行う。Furthermore, the bonding alloy film 14 can be formed by a vapor deposition method or a plating method other than the sputtering method, and even foil can be used, but the flow path will be blocked when forming the fine coolant flow path. Incidentally, in this case, the joining is performed by heating to a predetermined temperature and applying pressure in a vacuum to integrate the parts, thereby forming a refrigerant flow path. After the coolant flow path is formed in this manner, an organic insulating material is inserted between each conductor, bonded, and laminated to form a single power supply board. Epoxy resin was used as the organic insulating material in this case. In addition, the connection to the external power source is made through the input/output terminal 6, and the inflow and outflow of the refrigerant is conducted through a freely deformable conduit (
9, 10).
その場合、冷媒貯蔵タンクを導管の間には冷媒を供給す
るためのポンプを設ける。第６図の冷媒流路数を王、五
、九本と変えて製作した導体の冷却性能を示す。本実施
例によれば基板温度は１００°Ｃ以上にはならない。In that case, a pump for supplying refrigerant is provided between the refrigerant storage tank and the conduit. Fig. 6 shows the cooling performance of conductors manufactured by changing the number of refrigerant channels to 1, 5, or 9. According to this embodiment, the substrate temperature does not rise above 100°C.
本実施例によれば、導体部、すなわち、銅板中に微細な
冷媒流路が形成されているため、電源基板で発生する熱
が効率よく除去できる。尚、このように導体部に冷媒流
路を設けることによって、集積規模が高密度化した場合
には、冷媒を水、または、フレオン等の液体に置きかえ
ることができ、電源基板の発熱を抑えることが可能とな
る。そのため、冷却構造タイプの電源基板は、超大型コ
ンピュータの実用化に対しては不可欠なものである。According to this embodiment, since fine refrigerant channels are formed in the conductor portion, that is, the copper plate, heat generated in the power supply board can be efficiently removed. Furthermore, by providing a refrigerant flow path in the conductor section in this way, when the scale of integration becomes high density, the refrigerant can be replaced with water or a liquid such as Freon, thereby suppressing the heat generation of the power supply board. becomes possible. Therefore, a cooling structure type power supply board is essential for the practical application of ultra-large computers.
本発明によれば、冷却性能にすぐれた電源基板を提供す
ることができ、半導体素子の高密度実装に十分耐え、か
つ、コンパクトな半導体装置の製作が可能となる。According to the present invention, it is possible to provide a power supply board with excellent cooling performance, and it is possible to manufacture a compact semiconductor device that can sufficiently withstand high-density packaging of semiconductor elements.
第１図は本発明の一実施例の電源基板の斜視図。
第２図は電源基板を組み込んだ場合の半導体装置の平面
図、第３図は第１図に示した電源基板断面の拡大図、第
４図は第１図に示した電源基板で導体部分の冷媒流路図
、第５図は形成された冷媒流路の平面図、第６図は冷媒
流量と温度との関係を示す線図である。
１．１′・・・導体（銅板）、２・・・配線基板、３・
・・ＬＳＩチップ、４・・・封止キャップ、５・・・有
機純縁材、６・・・給電部、７・・・電源ピン、８・・
・電源スルホール、９・−冷媒供給パイプ、１０・・・
冷媒排出パイプ、１１・・・有機絶縁材接着位置合せ孔
、１２・・・接合の位置合せ孔、１３・・・冷媒流路溝
、１４・・・接合用合金膜。
γ
／１１ Ｈａ
第１ｍ
唱
■
第４０
第
図
４［量 （ｃｃ〕FIG. 1 is a perspective view of a power supply board according to an embodiment of the present invention. Figure 2 is a plan view of a semiconductor device with a power supply board installed, Figure 3 is an enlarged cross-sectional view of the power supply board shown in Figure 1, and Figure 4 is the power supply board shown in Figure 1 with conductor parts. FIG. 5 is a plan view of the formed refrigerant flow path, and FIG. 6 is a diagram showing the relationship between refrigerant flow rate and temperature. 1.1'...Conductor (copper plate), 2...Wiring board, 3...
... LSI chip, 4... Sealing cap, 5... Organic pure border material, 6... Power supply section, 7... Power supply pin, 8...
・Power supply through hole, 9・-refrigerant supply pipe, 10...
Refrigerant discharge pipe, 11...Organic insulating material adhesion alignment hole, 12...Joining alignment hole, 13...Refrigerant channel groove, 14...Joining alloy film. γ /11 Ha 1st m chant■ 40th figure 4 [amount (cc)]
Claims (1)
された導体部の一方に微細冷却孔を形成した後、拡散接
合で一体化し、一つの導体層を形成し、前記導体層と絶
縁層とを交互に積層し、前記絶縁層には放熱性のあるフ
ィラー材を混入して熱放散性を高めたことを特徴とする
半導体装置用電源基板の製作方法。 ２、特許請求項第１項において、 前記導体層に設ける前記微細冷却孔の形成は予め溝を施
した銅板と平銅板とを対面して接合することを特徴とす
る半導体装置用電源基板の製作方法。 ３、特許請求項第１項において、 積層構造体方式の前記電源基板は前記導体層の銅とＳｉ
Ｏ＿２、ＡｌＮ等を混入した有機樹脂の絶縁層を交互に
重ね合せたことを特徴とする半導体装置用電源基板の製
作方法。 ４、特許請求項第１項において、 前記微細冷却孔は前記導体層を貫通した一個以上の孔よ
りなることを特徴とする半導体装置用電源基板の製作方
法。 ５、特許請求項第２項において、 前記導体層の前記拡散接合の前に脱ガス処理を施すこと
を特徴とする半導体装置用電源基板の製作方法。[Claims] 1. In a method for manufacturing a laminated structure type power supply board, fine cooling holes are formed in one of the divided conductor parts, and then they are integrated by diffusion bonding to form one conductor layer, A method for manufacturing a power supply board for a semiconductor device, characterized in that conductive layers and insulating layers are alternately laminated, and a heat dissipating filler material is mixed in the insulating layers to improve heat dissipation. 2. Manufacturing a power supply board for a semiconductor device according to claim 1, wherein the fine cooling holes provided in the conductor layer are formed by bonding a copper plate with grooves in advance and a flat copper plate facing each other. Method. 3. In claim 1, the power supply board of a laminated structure type includes copper and Si of the conductor layer.
A method for manufacturing a power supply substrate for a semiconductor device, characterized in that insulating layers of organic resin mixed with O_2, AlN, etc. are stacked alternately. 4. The method of manufacturing a power supply board for a semiconductor device according to claim 1, wherein the fine cooling holes are formed of one or more holes penetrating the conductor layer. 5. The method of manufacturing a power supply substrate for a semiconductor device according to claim 2, wherein a degassing treatment is performed before the diffusion bonding of the conductor layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP30413388A JPH02151056A (en) | 1988-12-02 | 1988-12-02 | Manufacture of power supply board for semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP30413388A JPH02151056A (en) | 1988-12-02 | 1988-12-02 | Manufacture of power supply board for semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02151056A true JPH02151056A (en) | 1990-06-11 |
Family
ID=17929438
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP30413388A Pending JPH02151056A (en) | 1988-12-02 | 1988-12-02 | Manufacture of power supply board for semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02151056A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102008061468A1 (en) * | 2008-12-10 | 2010-06-17 | Siemens Aktiengesellschaft | Power converter module with cooled busbar |
| JP2019096863A (en) * | 2017-10-12 | 2019-06-20 | トヨタ モーター エンジニアリング アンド マニュファクチャリング ノース アメリカ，インコーポレイティド | Cooling assemblies for cooling heat generating components, and vehicles and electronics assemblies incorporating the same |
-
1988
- 1988-12-02 JP JP30413388A patent/JPH02151056A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102008061468A1 (en) * | 2008-12-10 | 2010-06-17 | Siemens Aktiengesellschaft | Power converter module with cooled busbar |
| US8432694B2 (en) | 2008-12-10 | 2013-04-30 | Siemens Aktiengesellschaft | Power converter module with cooled busbar arrangement |
| JP2019096863A (en) * | 2017-10-12 | 2019-06-20 | トヨタ モーター エンジニアリング アンド マニュファクチャリング ノース アメリカ，インコーポレイティド | Cooling assemblies for cooling heat generating components, and vehicles and electronics assemblies incorporating the same |
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