JPH01158702A - Composite functional electronic component - Google Patents

Composite functional electronic component

Info

Publication number
JPH01158702A
JPH01158702A JP62318270A JP31827087A JPH01158702A JP H01158702 A JPH01158702 A JP H01158702A JP 62318270 A JP62318270 A JP 62318270A JP 31827087 A JP31827087 A JP 31827087A JP H01158702 A JPH01158702 A JP H01158702A
Authority
JP
Japan
Prior art keywords
electronic component
thermistor
varistor
ceramic layer
unsintered
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62318270A
Other languages
Japanese (ja)
Inventor
Yukio Sakabe
行雄 坂部
Yasuyuki Naito
康行 内藤
Hiroshi Morii
博史 森井
Takeshi Azumi
健 安積
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP62318270A priority Critical patent/JPH01158702A/en
Publication of JPH01158702A publication Critical patent/JPH01158702A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To improve absorption capacity of an overcurrent, a surge voltage generated in an electronic device and to respond to requirements for a reduction in size and a complexity by laminating an unsintered molding of a varistor ceramic layer and an unsintered molding of a thermistor ceramic layer, and integrally sintering both. CONSTITUTION:A composite functional electronic component 1 is composed by laminating an unsintered varistor molding 3 formed by superposing many varistor ceramic layers 2, and an unsintered thermistor molding 5 formed by superposing many thermistor ceramic layers, interposing a palladium layer 6 as for prevention of diffusion between the moldings 3 and 5, and integrally sintering both. Further, electrode films 7 for connecting to an external circuit are formed on the upper and lower faces of the component 1. Then, the layers 2 operate as the function of surge voltage absorbers, and the layers 4 operate as the function of overcurrent absorbers, and a countermeasure for an overcurrent, a surge voltage can be provided even by one electronic component.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、例えば電子機器に発生する過電流。[Detailed description of the invention] [Industrial application field] The present invention relates to an overcurrent generated in, for example, an electronic device.

サージ電圧を吸収するために採用される電子部品に関し
、特に上記過電流、サージ電圧吸収機能を1つの部品に
よって実現できるように開発した複合機能の電子部品に
関する。
The present invention relates to an electronic component employed to absorb surge voltage, and particularly to a multifunctional electronic component developed so that the above-mentioned overcurrent and surge voltage absorbing functions can be realized with a single component.

〔従来の技術〕[Conventional technology]

一般に、電子機器では、該機器の回路や半導体素子に規
定値を越えた過電流、又はサージ電圧が加わるのを防止
することが必要である。この場合、過電流保護用部品と
しては、温度により抵抗値が大きく変化する正特性サー
ミスタが、サージ電圧保護用部品としては、印加された
電圧により抵抗値が非直線的に変化する電圧非直線性抵
抗体(以下、バリスタという)がそれぞれ採用されてい
る。
Generally, in electronic equipment, it is necessary to prevent overcurrent or surge voltage exceeding a specified value from being applied to the circuits and semiconductor elements of the equipment. In this case, the overcurrent protection component is a positive characteristic thermistor whose resistance value changes greatly depending on temperature, and the surge voltage protection component is a voltage nonlinear thermistor whose resistance value changes nonlinearly depending on the applied voltage. A resistor (hereinafter referred to as a varistor) is used for each.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

ところで、上記過電流及びサージ電圧の両方に対する保
護が必要な場合は、上記正特性サーミスタ及びバリスタ
の両方を採用することとなる。−方、近年、上記電子機
器の小型化、Fit形化が進むなかで、該機器を構成す
る電子部品等についても上記小型、薄形化の要請に対応
した小形化、複合化が要求されている。ところが、上記
正特性サーミスタ及びバリスタの両方を採用する場合は
、当然ながら該両部品の配置が必要であり、上述の小形
化におけるネックとなっている。
By the way, if protection against both the above-mentioned overcurrent and surge voltage is required, both the above-mentioned positive temperature coefficient thermistor and varistor will be employed. -In recent years, as the electronic devices described above have become smaller and more compact, the electronic components that make up the devices are also required to be smaller and more complex in order to meet the demands for smaller size and thinner profile. There is. However, when both the PTC thermistor and the varistor are employed, it is necessary to arrange the two components, which is a bottleneck in the miniaturization described above.

本発明は、上記要請に応えるためになされたもので、電
子機器に発生ずる過電流、サージ電圧の吸収能力に優れ
、かつ小形化、複合化の要求に応えられる複合機能電子
部品を提供することを目的としている。
The present invention has been made in response to the above-mentioned demands, and it is an object of the present invention to provide a multifunctional electronic component that has excellent ability to absorb overcurrents and surge voltages generated in electronic equipment, and that can meet the demands for miniaturization and complexity. It is an object.

〔問題点を解決するだめの手段〕[Failure to solve the problem]

そこで、本発明は、電圧非直線性抵抗として機能するバ
リスタセラミクス層の未焼結成形体と、正特性サーミス
タとして機能するサーミスタセラミクス層の未焼結成形
体とを積層し、両者を一体焼結したことを特徴とする複
合機能電子部品である。
Therefore, the present invention is to laminate an unsintered compact of a varistor ceramic layer that functions as a voltage nonlinear resistance and an unsintered compact of a thermistor ceramic layer that functions as a positive temperature coefficient thermistor, and sinter both together. It is a multi-functional electronic component characterized by:

ここで、上記バリスタセラミクス層とサーミスタセラミ
クス層との間に、高融点貴金属、例えばパラジュウム層
を介在させることにより上記両セラミクス層の拡散を防
止することができる。
Here, by interposing a layer of a high melting point noble metal such as palladium between the varistor ceramic layer and the thermistor ceramic layer, diffusion of both the ceramic layers can be prevented.

〔作用〕[Effect]

本発明に係る複合機能電子部品によれば、未焼結成形体
のバリスタセラミクス層とサーミスタセラミクス層とを
積層して一体焼結したので、過電流、サージ電圧保護を
1つの部品によって実現できる。即ち、サーミスタセラ
ミクス層が過電流保護として機能し、バリスタセラミク
ス層がサージ電圧保護として機能することになる。その
結果、従来2つの部品を別個に採用していたのに比べて
実装スペースを縮小でき、それだけ上述した電子機器の
小形化、N形化の要請に応えられる。
According to the multifunctional electronic component according to the present invention, since the varistor ceramic layer and the thermistor ceramic layer of the green compact are laminated and integrally sintered, overcurrent and surge voltage protection can be realized with one component. That is, the thermistor ceramic layer functions as overcurrent protection, and the varistor ceramic layer functions as surge voltage protection. As a result, the mounting space can be reduced compared to conventionally employing two separate components, and the above-mentioned demands for miniaturization and N-shape electronic devices can be met.

〔実施例〕〔Example〕

以下、本発明の実施例を図について説明する。 Hereinafter, embodiments of the present invention will be described with reference to the drawings.

第1図及び第2図は本発明の一実施例による複合機能電
子部品を示す図である。
1 and 2 are diagrams showing a multifunctional electronic component according to an embodiment of the present invention.

図において、]は本本実例の複合機能電子部品であり、
これの外形は、3m+sφX0.5mm1程度の円柱状
のものである。上記複合機能電子部品1は、多数のバリ
スタセラミクス層2を重ね合わせたバリスタ来焼結成形
体3と、多数のサーミスタセラミクス層4を重ね合わせ
たサーミスタ未焼結成形体5とを積層するとともに、上
記両バリスタ、サーミスタ未焼結成形体3.5の間に拡
散防止としてのパラジュウム層6を介在させて、一体焼
結して構成されている。また、上記複合機能電子部品1
の上面、下面には外部回路接続用の電極膜7が形成され
ている。
In the figure, ] is the multi-function electronic component of this example,
The outer shape of this is a cylindrical shape of about 3 m + sφ x 0.5 mm1. The above-mentioned multi-functional electronic component 1 is constructed by laminating a varistor unsintered formed body 3 in which a large number of varistor ceramic layers 2 are stacked together, and a thermistor unsintered formed body 5 in which a large number of thermistor ceramic layers 4 are stacked together. A palladium layer 6 is interposed between the varistor and thermistor unsintered bodies 3.5 to prevent diffusion, and they are integrally sintered. In addition, the above multi-function electronic component 1
Electrode films 7 for connecting external circuits are formed on the upper and lower surfaces of.

次に本実施例の作用効果について説明する。Next, the effects of this embodiment will be explained.

本実施例の複合機能電子部品1によりば、バリスタとし
て機能するバリスタセラミクス層2と、サーミスタとし
て機能するサーミスタセラミクス層4とが積層された焼
結体としたので、上記バリスタセラミクスN2がサージ
電圧吸収素子として機能するとともに、サーミスタセラ
ミクスN4が過電流吸収素子として機能することになり
、1つの電子部品でもって過電流、サージ電圧対策がで
きる。
According to the multifunctional electronic component 1 of this embodiment, the varistor ceramic layer 2 functioning as a varistor and the thermistor ceramic layer 4 functioning as a thermistor are laminated to form a sintered body, so that the varistor ceramic N2 absorbs surge voltage. In addition to functioning as an element, the thermistor ceramic N4 also functions as an overcurrent absorbing element, making it possible to take measures against overcurrent and surge voltage with a single electronic component.

また、従来の正特性サーミスタとバリスタとの2つの部
品を別個に使用していた場合に比べて、部品点数を削減
できるとともに、それだけ実装スペースを縮小でき、そ
の結果電子機器の小形化等の要請に応えられる。
In addition, compared to the conventional case where the positive temperature coefficient thermistor and varistor were used as two separate parts, the number of parts can be reduced, and the mounting space can be reduced accordingly.As a result, the demand for miniaturization of electronic devices, etc. can be met.

さらに、本実施例では、上記バリスタセラミクス層2と
サーミスタセラミクス層4との間にバラジュウム層6を
形成したので、上記両セラミクス層2.4の拡散を防止
できる。
Furthermore, in this embodiment, since the baradium layer 6 is formed between the varistor ceramic layer 2 and the thermistor ceramic layer 4, diffusion of both the ceramic layers 2.4 can be prevented.

次に本実施例の複合機能電子部品の効果を確認するため
に行った実験について、その方法及び結果を説明する。
Next, the method and results of an experiment conducted to confirm the effects of the multifunctional electronic component of this example will be explained.

まず、本実験に採用した複合機能電子部品の製造方法に
ついて説明する。
First, the method for manufacturing the multifunctional electronic component used in this experiment will be explained.

i 、  0.99Zn O+0.O05P rb  
Or+ +0.005  CO2O3の化学成分からな
り、酸化亜鉛を主成分とする八;Jスタ用セラミクス材
料、および(Bao、qqs Yo、oo5) T i
 +、ooe O3+0.O05Mn Oの化学成分か
らなり、チタン酸バリウムを特徴とする特性サーミスタ
用セラミクス材料の各窯業原料を用意し、この各セラミ
クス材料に有機樹脂バインダー204%を混合し、スラ
リー状にした。
i, 0.99ZnO+0. O05P rb
Or+ +0.005 Ceramics material for J star, consisting of chemical components of CO2O3 and mainly containing zinc oxide, and (Bao, qqs Yo, oo5) T i
+, ooe O3+0. Each ceramic raw material for a ceramic material for a characteristic thermistor consisting of a chemical component of O05MnO and characterized by barium titanate was prepared, and each ceramic material was mixed with 204% of an organic resin binder to form a slurry.

11、上記スラリー状の各バリスタ、サーミスタ用セラ
ミクス材料をドクターブレード法によって、厚み100
μ顛のグリーンシートを各々5枚作成した。
11. The slurry-like ceramic materials for varistors and thermistors were processed to a thickness of 100 mm using a doctor blade method.
Five μ-sized green sheets were prepared.

iii 、次に、サーミスタ用のグリーンシートのうち
の1枚の上面にバラジュウムの導電ペーストを全面に厚
膜状に印刷した後、乾燥させた。
iii. Next, a conductive paste of baradium was printed in a thick film over the entire surface of one of the green sheets for the thermistor, and then dried.

lv、そして、上記バリスタ用グリーンシートを5枚重
ね合わせるとともに、バラジュウム層が上面になるよう
にサーミスタ用グリーンシートをこれも5枚重ね合わせ
て、上記両積層体をバラジュウム層を挟むように積層し
た。これによりバリスタセラミクス層とサーミスタセラ
ミクス層との厚さ略1flの積層体が形成されたことに
なる。さらに、この未焼結成形体を60゛Cに加熱して
接着させた後、これの積層方向に2ton/ cm2の
圧力をかけて圧着した。
Then, five of the above green sheets for varistor were stacked together, and five green sheets for thermistor were also stacked so that the baradium layer was on the top surface, and both of the above laminates were stacked with the baradium layer sandwiched between them. . As a result, a laminate of the varistor ceramic layer and thermistor ceramic layer having a thickness of approximately 1 fl was formed. Furthermore, this unsintered compact was heated to 60° C. to bond it, and then a pressure of 2 tons/cm 2 was applied in the direction of lamination.

−■、次に、上記圧着された積層体を10fiφの大き
さに打ち抜き、未焼結成形体を形成した。しかる後、こ
れを1350“Cの高温大気雰囲気中にて2時間加熱し
、焼結体を生成した。この焼結体は、約3mmφX0.
5mtに縮小していた。このようにして、本実験に採用
される複合機能電子部品を作成した。
-■ Next, the press-bonded laminate was punched out into a size of 10 fiφ to form an unsintered compact. Thereafter, this was heated in a high temperature air atmosphere at 1350"C for 2 hours to produce a sintered body. This sintered body had a diameter of about 3 mmφX0.
It had been reduced to 5mt. In this way, the multifunctional electronic component used in this experiment was created.

次に、上記製造方法によって生成された複合機能電子部
品の実験方法及びその結果について説明する。
Next, an experimental method and the results of the multifunctional electronic component produced by the above manufacturing method will be explained.

まず、上記複合機能電子部品の積層面を鏡面研磨し、X
線マイクロアナライザにより元素分析を行った。
First, the laminated surface of the above multifunctional electronic component is mirror polished, and
Elemental analysis was performed using a line microanalyzer.

第3図+81. (blは、それぞれBa線分析、  
Zn線分析を行った結果を示す顕微鏡写真である。この
写真において、右側のZnO部分は、酸化亜鉛層つまり
バリスタセラミクス層を、左側のPTC部分はチタン酸
バリウム層つまりサーミスタセラミクス層を、中央のP
d部分はバラジュウム層をそれぞれ示す。同写真からも
明らかなように、Ba線分析によって、バリスタセラミ
クス層(ZnO部分)側にはBaはほとんど存在してい
ないことが示されており、またZn線分析によってサー
ミスタセラミクス層(PTC部分)にはZnはほとんど
存在していないことが示されており、これにより、両層
間での拡散が防止されていることがわかる。これは両層
間にパラジュウム層を介在させることによる効果が大き
いものと考えられる。
Figure 3 +81. (bl is Ba line analysis, respectively.
It is a micrograph showing the results of Zn line analysis. In this photo, the ZnO part on the right is a zinc oxide layer or a varistor ceramic layer, the PTC part on the left is a barium titanate layer or a thermistor ceramic layer, and the PTC part in the center is a zinc oxide layer or a varistor ceramic layer.
The d portions each represent a baradium layer. As is clear from the same photo, Ba line analysis shows that almost no Ba exists on the varistor ceramic layer (ZnO part) side, and Zn line analysis shows that almost no Ba exists on the thermistor ceramic layer (PTC part) side. It is shown that almost no Zn exists, which indicates that diffusion between both layers is prevented. This is thought to be due to the great effect of interposing the palladium layer between both layers.

続いて、上記複合機能電子部品の上面、下面にそれぞれ
オーミック性を有する電極膜としてInGa合金を塗布
し、これを陰極とするとともに、上記バラジュウム層を
陽極として正特性サーミスタ、バリスタとしての電気特
性を調べた。その結果、サーミスタセラミクス層では、
120℃にて抵抗値の急増が認められた。また、バリス
タセラミクス層では、V+mA−45v、  α(非直
線係数)−15が得られた。
Next, an InGa alloy is applied as an electrode film having ohmic properties on the upper and lower surfaces of the multifunctional electronic component, respectively, and these are used as cathodes, and the baladium layer is used as an anode to obtain electrical properties as a positive temperature coefficient thermistor or a varistor. Examined. As a result, in the thermistor ceramic layer,
A rapid increase in resistance value was observed at 120°C. Further, in the varistor ceramic layer, V+mA-45v and α (nonlinear coefficient) -15 were obtained.

なお、上記実施例では、いわゆるドクターブレード法に
より形成されたグリーンシートを積層した未焼結成形体
を一対積層し、これを焼結するようにしたが、本発明の
未焼結成形体は勿論この方法によるものに限られるもの
ではない。例えば、押出し成形法により所定の厚みの未
焼結セラミクス層を形成し、これを一対積層して焼結し
てもよく、またスクリーン印刷法により順次積層しても
よい。
In the above example, a pair of unsintered green sheets formed by stacking green sheets formed by the so-called doctor blade method were laminated and sintered, but the green sheets of the present invention can of course be formed using this method. It is not limited to those based on For example, an unsintered ceramic layer having a predetermined thickness may be formed by extrusion molding, and a pair of unsintered ceramic layers may be laminated and sintered, or they may be sequentially laminated by screen printing.

また、上記実施例では複合機能電子部品を円柱状に形成
した場合を例にとって説明したが、勿論本発明はこれに
限るものではなく、例えば直方体状に形成してもよい。
Further, in the above embodiments, the case where the multifunctional electronic component is formed in a cylindrical shape has been described as an example, but the present invention is of course not limited to this, and may be formed in a rectangular parallelepiped shape, for example.

さらに、上記実施例では、拡散防止用としてパラジュウ
ムを採用したが、この拡散防止用+4料としては他に白
金、金、銀等でもよく、要は焼結温度に耐える高融点貴
金属を採用すればよい。また、本発明ではこの拡散防止
層は必ずしも必要ではな、く、これを採用しない場合に
も複合機能電子部品を得ることができる。
Furthermore, in the above embodiment, palladium was used for diffusion prevention, but platinum, gold, silver, etc. may also be used as the +4 material for diffusion prevention.In short, if a high melting point noble metal that can withstand the sintering temperature is used. good. Further, in the present invention, this diffusion prevention layer is not necessarily required, and a multifunctional electronic component can be obtained even when this layer is not employed.

〔発明の効果〕〔Effect of the invention〕

以上のように本発明に係る複合機能電子部品によれば、
電圧非直線性抵抗として機能するバリスタセラミクス層
の未焼結成形体と、正特性サーミスタとして機能するサ
ーミスタセラミクス層の未焼結成形体とを積層し、両者
を一体焼結したので、過電流、サージ電圧保護の両方の
機能を1つの電子部品で得られる効果があり、また電子
機器の小形化、薄形化の要請に応えられる効果がある。
As described above, according to the multifunctional electronic component according to the present invention,
An unsintered varistor ceramic layer that functions as a voltage nonlinear resistor and an unsintered thermistor ceramic layer that functions as a positive temperature coefficient thermistor are laminated and sintered together, which reduces overcurrent and surge voltage. This has the effect of providing both protection functions with one electronic component, and also has the effect of meeting the demands for smaller and thinner electronic devices.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例による複合機能電子部品を示
す斜視図、第2図はその積層状態を示す正面図、第3図
+a+及び第3図(b)はそれぞれBa線分析、Zn線
分析結果を示ずオシロ波形写真である。 図において、1は複合機能電子部品、2はバリスタセラ
ミクス層、3はバリスタ未焼結成形体、4はサーミスタ
セラミクス層、5はサーミスタ未焼結成形体、6はバラ
ジュウム層(高融点貴金属層)。
Fig. 1 is a perspective view showing a multifunctional electronic component according to an embodiment of the present invention, Fig. 2 is a front view showing its laminated state, Fig. 3 + a + and Fig. 3 (b) are Ba line analysis and Zn This is an oscilloscope waveform photograph without line analysis results. In the figure, 1 is a multifunctional electronic component, 2 is a varistor ceramic layer, 3 is a varistor green body, 4 is a thermistor ceramic layer, 5 is a thermistor green body, and 6 is a baradium layer (high melting point noble metal layer).

Claims (3)

【特許請求の範囲】[Claims] (1)電圧非直線性抵抗として機能するバリスタセラミ
クス層の未焼結成形体と、正特性サーミスタとして機能
するサーミスタセラミクス層の未焼結成形体とを積層し
、両者を一体焼結してなることを特徴とする複合機能電
子部品。
(1) An unsintered compact of a varistor ceramic layer that functions as a voltage nonlinear resistance and an unsintered compact of a thermistor ceramic layer that functions as a positive temperature coefficient thermistor are laminated and both are sintered together. Features a multifunctional electronic component.
(2)上記バリスタセラミクス層とサーミスタセラミク
ス層との間に拡散防止用の高融点貴金属層が形成されて
いることを特徴とする特許請求の範囲第1項記載の複合
機能電子部品。
(2) The multifunctional electronic component according to claim 1, wherein a high melting point precious metal layer for diffusion prevention is formed between the varistor ceramic layer and the thermistor ceramic layer.
(3)上記高融点貴金属層がパラジュウムであることを
特徴とする特許請求の範囲第2項記載の複合機能電子部
品。
(3) The multifunctional electronic component according to claim 2, wherein the high melting point noble metal layer is palladium.
JP62318270A 1987-12-15 1987-12-15 Composite functional electronic component Pending JPH01158702A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62318270A JPH01158702A (en) 1987-12-15 1987-12-15 Composite functional electronic component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62318270A JPH01158702A (en) 1987-12-15 1987-12-15 Composite functional electronic component

Publications (1)

Publication Number Publication Date
JPH01158702A true JPH01158702A (en) 1989-06-21

Family

ID=18097325

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62318270A Pending JPH01158702A (en) 1987-12-15 1987-12-15 Composite functional electronic component

Country Status (1)

Country Link
JP (1) JPH01158702A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0548606A2 (en) * 1991-12-21 1993-06-30 Asea Brown Boveri Ag Resistance with PTC-behaviour
EP0798750A2 (en) * 1996-03-30 1997-10-01 Abb Research Ltd. Current limiting resistor with PTC-behaviour
KR100437895B1 (en) * 2001-11-14 2004-06-25 엘지전선 주식회사 Repeatedly usable cylindrical ptc fuse

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0548606A2 (en) * 1991-12-21 1993-06-30 Asea Brown Boveri Ag Resistance with PTC-behaviour
EP0548606A3 (en) * 1991-12-21 1994-04-06 Asea Brown Boveri
EP0798750A2 (en) * 1996-03-30 1997-10-01 Abb Research Ltd. Current limiting resistor with PTC-behaviour
EP0798750A3 (en) * 1996-03-30 1998-12-02 Abb Research Ltd. Current limiting resistor with PTC-behaviour
KR100437895B1 (en) * 2001-11-14 2004-06-25 엘지전선 주식회사 Repeatedly usable cylindrical ptc fuse

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