JPH01142224U - - Google Patents
Info
- Publication number
- JPH01142224U JPH01142224U JP3850788U JP3850788U JPH01142224U JP H01142224 U JPH01142224 U JP H01142224U JP 3850788 U JP3850788 U JP 3850788U JP 3850788 U JP3850788 U JP 3850788U JP H01142224 U JPH01142224 U JP H01142224U
- Authority
- JP
- Japan
- Prior art keywords
- input
- signal
- circuit
- input signal
- monostable multivibrator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Electronic Switches (AREA)
Description
第１図はこの考案の一実施例による信号選択回
路の回路図、第２図は従来の信号選択回路の回路
図である。
図において、１は第１の入力信号、２は他の入
力信号である第２の入力信号、３は切り替え装置
、４は切り替え信号、６は単安定マルチバイブレ
ーター、７はＡＮＤ回路、８はＯＲ回路、５は出
力信号である。なお、図中、同一符号は同一また
は相当部分を示す。
FIG. 1 is a circuit diagram of a signal selection circuit according to an embodiment of this invention, and FIG. 2 is a circuit diagram of a conventional signal selection circuit. In the figure, 1 is a first input signal, 2 is a second input signal which is another input signal, 3 is a switching device, 4 is a switching signal, 6 is a monostable multivibrator, 7 is an AND circuit, and 8 is an OR circuit. 5 is the output signal of the circuit. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.
Claims (1)
イブレータと、この単安定マルチバイブレータの
出力信号と他の入力信号が入力されるＡＮＤ回路
と、このＡＮＤ回路からの上記第１の入力信号ま
たは上記他の入力信号が入力される信号を出力す
るＯＲ回路とを備え、このＯＲ回路に第１の入力
信号と他の入力信号が入力されたときは第１の入
力信号のみ出力するようにしたことを特徴とする
信号選択回路。 a monostable multivibrator operated by a first input signal; an AND circuit to which the output signal of the monostable multivibrator and other input signals are input; and the first input signal from the AND circuit or the other input signal; An OR circuit that outputs a signal to which an input signal is input is provided, and when the first input signal and another input signal are input to the OR circuit, only the first input signal is output. signal selection circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3850788U JPH01142224U (en) | 1988-03-24 | 1988-03-24 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3850788U JPH01142224U (en) | 1988-03-24 | 1988-03-24 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01142224U true JPH01142224U (en) | 1989-09-29 |
Family
ID=31265051
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3850788U Pending JPH01142224U (en) | 1988-03-24 | 1988-03-24 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01142224U (en) |
-
1988
- 1988-03-24 JP JP3850788U patent/JPH01142224U/ja active Pending