JP6074785B2 - Silicon carbide semiconductor device manufacturing method and silicon carbide semiconductor device - Google Patents

Description

  The present invention relates to a method for manufacturing a silicon carbide semiconductor device and a silicon carbide semiconductor device. In particular, the present invention relates to a method for manufacturing a silicon carbide semiconductor device that can prevent an increase in interface state density when planarizing an insulating film by reflow treatment.

  In recent years, silicon carbide (hereinafter referred to as SiC) has attracted attention as one of semiconductor materials that can replace silicon (hereinafter referred to as Si). This SiC has a band gap of 3.25 eV in 4H-SiC, which is nearly three times larger than the Si band gap of 1.12 eV. In addition, the dielectric breakdown electric field strength is 3.0 MV / cm for 4H-SiC, which is about an order of magnitude higher than the dielectric breakdown electric field strength of Si of 0.25 MV / cm. As a result, the resistance (on resistance) of the element in the on state, which works with the inverse of the cube of the dielectric breakdown electric field strength, is reduced, and the power loss in the steady state can be reduced.

Furthermore, the thermal conductivity is 4.9 W / cm · K for 4H-SiC, more than three times higher than the thermal conductivity of Si, 1.5 W / cmK. It also has the advantage of being able to. Since the saturation drift speed is as large as 2 × 10 ⁷ cm / s, it is excellent in high-speed operation. For these reasons, SiC is expected to be applied to power semiconductor elements (hereinafter referred to as power devices), high-frequency devices, high-temperature operating devices, and the like.

  MOSFET development so far has been carried out on the (0001) plane because of the existence of epitaxial wafers with good crystallinity and relatively low cost. However, on this (0001) plane, the channel mobility at the MOS interface is low, and it is difficult to reduce the on-resistance. On the other hand, in the (000-1) plane which is the back surface of the (0001) plane, the channel mobility at the MOS interface is greatly influenced by the thermal oxidation atmosphere, and when oxidized in a wet atmosphere, the channel mobility is higher than that of the (0001) plane. It is reported to show. Therefore, it is expected that a low on-resistance MOSFET can be realized by using this (000-1) plane.

  In semiconductor devices, as an interlayer insulating film under a metal wiring, a film that can be flattened by heat treatment (reflow treatment) is often used. One type of such an interlayer insulating film is a boron-phosphosilicate glass (BPSG) film. In this BPSG film, the concentration of B (Boron) and P (Phosphorus) is often increased to improve the reflow performance. In manufacturing a semiconductor device, this BPSG film is formed on a substrate by a chemical vapor deposition (CVD) method, and then subjected to a reflow process at a high temperature of 800 to 900 ° C. The surface of the film is flattened.

  Here, a MOS capacitor was fabricated using a silicon carbide substrate, and the interface state density (Dit) characteristics of the interface between the silicon carbide substrate and the gate insulating film with and without reflow treatment using only an inert gas were compared. I tried. As a result, the MOS capacitor has a Dit characteristic significantly higher than that of an oxide film (gate insulating film) formed on a silicon carbide n-type substrate (no reflow process), but with a reflow process. Increased. This is thought to be because hydrogen is released from the interface when reflow treatment is performed in an inert gas. Since this increase in Dit characteristics suggests a decrease in channel mobility, the reflow process using only an inert gas cannot be applied to a MOSFET manufacturing process using a silicon carbide semiconductor.

  A heat treatment for forming an ohmic contact on a silicon carbide substrate is a technique for performing a heat treatment using an inert gas after forming a gate insulating film, and a technique for producing a silicon carbide semiconductor device having a low on-resistance by reducing ohmic resistance. Is disclosed (for example, refer to Patent Document 1 below).

JP 2007-242744 A

  However, when the reflow process of the insulating film formed on the silicon carbide substrate is performed in the above-described inert gas, there occurs a problem that the interface state density increases and the channel characteristics (channel mobility) decrease. In order to suppress an increase in interface state density at the interface between the silicon carbide substrate and the gate insulating film when the interlayer insulating film is planarized, the atmosphere during the reflow treatment of the interlayer insulating film, the interlayer insulating film, The reflow temperature and time combination must be taken into consideration.

  In view of the above problems, the present invention can flatten the surface of an interlayer insulating film without significantly increasing the interface state density between the insulating film and silicon carbide, and can manufacture a silicon carbide semiconductor device with low on-resistance. An object is to provide a method for manufacturing a semiconductor device and a silicon carbide semiconductor device.

  In order to achieve the above object, a method for manufacturing a silicon carbide semiconductor device according to the present invention includes a (000-1) plane (preferably on a 4H-SiC (000-1) plane) or (11- 20) forming a first insulating film in contact with the surface; forming a gate electrode on the first insulating film; removing a part of the gate electrode to form an opening; In a method for manufacturing a silicon carbide semiconductor device, the method comprising: forming a second insulating film on at least a part of the opening; and performing planarization of the second insulating film by reflow processing. In an atmosphere using hydrogen or a mixed gas of an inert gas and hydrogen, the process is performed including a state in which the atmosphere is heated to at least 400 ° C. or higher.

  Further, at the time of raising the temperature of the reflow treatment, the temperature at the time of substituting from the atmosphere of atmosphere or inert gas to the atmosphere using hydrogen or a mixed gas of inert gas and hydrogen is 400 ° C. or less, and When the temperature of the reflow treatment is lowered, the temperature at the time of replacing the atmosphere using hydrogen or a mixed gas of an inert gas and hydrogen with the atmosphere of an atmosphere or an inert gas is 400 ° C. or lower.

  The step of thermally oxidizing in a gas containing at least oxygen and water vapor to form the first insulating film so as to be in contact with the (000-1) plane of the silicon carbide semiconductor is a step of forming a gate insulating film. It is characterized by being at least part of.

  The inert gas may be helium, argon, or nitrogen.

  Further, the maximum processing temperature in the reflow processing is in a range of 600 ° C. or higher and 1100 ° C. or lower.

  In addition, the hydrogen concentration in the mixed gas of the inert gas and hydrogen is in the range of 1% to 4%.

A silicon carbide semiconductor device of the present invention is a silicon carbide semiconductor device manufactured by the method for manufacturing a silicon carbide semiconductor device described above, wherein the silicon carbide semiconductor device has a hydrogen concentration in the first insulating film. The range is from 5 × 10 ¹⁹ cm ^{−3 to} 1 × 10 ²² cm ⁻³ .

  According to the above configuration, the silicon carbide semiconductor device on the (000-1) plane is formed with the first insulating film by thermal oxidation or CVD, and the interface state between the first insulating film and the silicon carbide substrate is hydrogenated. Then, the second insulating film is reflowed in a gas containing hydrogen. This suppresses desorption of hydrogen terminating dangling bonds on the surface of the silicon carbide substrate at the interface between the first insulating film and the silicon carbide substrate during the reflow processing of the second insulating film. Therefore, the planarization of the second insulating film can be realized while maintaining a low interface state density, so that a low on-resistance silicon carbide semiconductor device can be manufactured.

  According to the present invention, it is possible to realize planarization of the insulating film by the reflow process while maintaining the interface state density between the insulating film and silicon carbide, and to produce a low on-resistance silicon carbide semiconductor device.

It is sectional drawing which shows the MOS capacitor as a silicon carbide semiconductor device concerning embodiment of this invention. It is a timing chart which shows the temperature of the reflow process by 1st Embodiment of this invention, and the procedure of replacement | exchange of the gas in reflow. It is a block diagram which performs the capacitance-voltage measurement of a MOS capacitor. It is a graph which shows the interface state density distribution obtained from the measurement result of the MOS capacitor. It is a graph which shows the interface state density according to the reflow process temperature in inert gas atmosphere. It is a timing chart which shows the temperature of the reflow process by the 2nd Embodiment of this invention, and the procedure of replacement | exchange of the gas in reflow. It is a timing chart which shows the temperature of the reflow process by the 3rd Embodiment of this invention, and the procedure of replacement | exchange of the gas in reflow.

  A preferred embodiment of a method for manufacturing a silicon carbide semiconductor device and a silicon carbide semiconductor device according to the present invention will be described below in detail with reference to the accompanying drawings. In the present specification and the accompanying drawings, it means that electrons or holes are majority carriers in layers and regions with n or p, respectively. Further, + and − attached to n and p mean that the impurity concentration is higher and lower than that of the layer or region where it is not attached. In the present specification, in the Miller index notation, “−” means a bar attached to an integer immediately after that, and “−” is added before the integer to indicate a negative index.

(First embodiment)
FIG. 1 is a cross-sectional view showing a MOS capacitor as a silicon carbide semiconductor device according to an embodiment of the present invention. This MOS capacitor 1 is doped with low-concentration nitrogen on the surface of a first conductivity type (n-type) high-concentration silicon carbide substrate 11 having a (0001) plane of 300 μm thickness doped with high-concentration nitrogen. Silicon carbide epitaxial layer 12 made of the first conductive type (n-type) semiconductor layer is provided.

The silicon carbide substrate 11 is a 0 to 8 degree off substrate, preferably a 0 to 1 degree off substrate from the (000-1) plane of the n-type 4H—SiC (000-1) semiconductor. Silicon carbide epitaxial layer 12 is formed by growing an n-type epitaxial film having a donor density of 1 × 10 ¹⁶ cm ⁻³ . Note that a 4H—SiC substrate alone or a substrate composed of a 4H—SiC substrate and an epitaxial film is called a 4H—SiC semiconductor.

  A first insulating film (gate insulating film) 13 is formed on silicon carbide epitaxial layer 12, and a gate electrode 14 is formed on gate insulating film 13. The gate insulating film 13 and the gate electrode 14 are covered with a second insulating film (interlayer insulating film) 17. Gate insulating film 13 is formed so as to be in contact with the (000-1) plane of silicon carbide substrate 11 by performing thermal oxidation in a gas (wet atmosphere) containing at least oxygen and water vapor.

  In addition, the gate insulating film 13 may be deposited by a film forming method such as a CVD method. The gate insulating film 13 may be formed on the (11-20) plane of an n-type 4H—SiC semiconductor. In addition, although not shown, a source region and a drain region are formed in the 4H—SiC semiconductor.

  FIG. 2 is a timing chart showing the temperature of the reflow process according to the first embodiment of the present invention and the procedure for replacing the gas during the reflow. In the figure, the horizontal axis indicates time, and the vertical axis indicates the temperature in the reflow furnace. In addition, as an example of different types of gases used for the atmosphere during the reflow process, in the illustrated example, the replacement timing of the forming gas and the inert gas is shown. Each of the following procedures is performed after forming silicon carbide epitaxial layer 12 on the surface of silicon carbide substrate 11 as a 4H—SiC semiconductor.

After the 4H—SiC semiconductor is washed, wet oxidation at 1000 ° C. is performed for 30 minutes to form a gate insulating film 13 having a thickness of 50 nm and cooled to room temperature. After cooling to room temperature, the reflow process shown in FIG. 2 is performed. First, the atmosphere is changed from the atmospheric state to the forming gas (N ₂ +1 to 20% H ₂ , or preferably N ₂ +1 to 4% H ₂ , or particularly preferably N ₂ + 3.4% H ₂ ) at time t1. Is replaced. As this forming gas, hydrogen or a mixed gas of an inert gas such as nitrogen and hydrogen is used.

  Thereafter, the temperature is raised to 800 ° C. from time t2 to time t3. Thereafter, a temperature of 800 ° C. is maintained in a forming gas atmosphere for a desired processing time, for example, 10 minutes (period T1). Thereafter, the temperature is lowered from time t4 to t5. The maximum processing temperature during reflow is in the range of 600 ° C to 1100 ° C.

  Thereafter, at time t6, the forming gas is replaced with the atmosphere or an inert gas. Then, a gate electrode 14 is vapor-deposited on the gate insulating film 13 with dot-like Al or the like, and a back electrode 15 is formed on the entire back surface of the silicon carbide substrate 11 by vapor deposition of Al or the like to produce a MOS capacitor.

  FIG. 3 is a configuration diagram for measuring capacitance-voltage of a MOS capacitor. The MOS capacitor 1 can measure capacitance-voltage by connecting a CV meter 31 between the front surface and the back surface.

  FIG. 4 is a chart showing the interface state density distribution obtained from the measurement results of the MOS capacitor. In the figure, the horizontal axis represents the energy from the conductor, and the vertical axis represents the interface state density. The capacitance-voltage measurement of the MOS capacitor 1 was performed using the CV meter 31 shown in FIG. 3, and the influence of the atmosphere by the reflow process on the interface state density of the gate insulating film 13 was examined.

4B shows a state in which the MOS capacitor 1 is manufactured without a reflow process, and FIG. 4A shows a process in which the MOS capacitor 1 is manufactured in an inert gas (N ₂ gas). This is the case where As shown in FIG. 4A, it can be seen that the interface state density is significantly increased in the MOS capacitor 1 heat-treated in N ₂ gas, compared with the case without reflow treatment.

  And according to this Embodiment 1, it turns out that the increase in an interface state density is suppressed by performing the reflow process in forming gas, as shown in FIG.4 (c). Thus, after forming gate insulating film 13 by wet oxidation, reflow treatment of interlayer insulating film 17 is performed in an atmosphere containing hydrogen, so that gate insulating film 13 and silicon carbide epitaxial layer 12 obtained by wet oxidation are obtained. It can be seen that an increase in interface state density at the interface can be suppressed. In particular, it was verified that by reflowing the interlayer insulating film 17 under conditions suitable for the gate insulating film 13, an increase in the interface activation density can be prevented and the interlayer insulating film 17 can be planarized. In addition, regarding the reflow effect of the interlayer insulating film 17, there was no difference between the reflow process using an inert gas and the reflow process using a forming gas.

  FIG. 5 is a chart showing the interface state density for each reflow treatment temperature in an inert gas atmosphere. It can be seen that the interface state density is hardly increased at about 400 ° C. even in an inert gas atmosphere. In view of the above, in order to prevent an increase in interface state density that is considered to be hydrogen detachment from the interface of the gate insulating film 13, the 4H-SiC semiconductor may exist in a forming gas atmosphere when heated to 400 ° C. preferable. This corresponds to the period of time t2 to t3 as seen in FIG.

According to the manufacturing method of the present invention, the hydrogen concentration in the gate insulating film 13 (near the interface) is in the range of 5 × 10 ¹⁹ cm ⁻³ or more and 1 × 10 ²² cm ⁻³ or less. Can be included. Thereby, even after reflow of interlayer insulating film 17, dangling bonds on the surface of silicon carbide epitaxial layer 12 at the interface between gate insulating film 13 and silicon carbide epitaxial layer 12 can be terminated with hydrogen. An increase in interface state density at the interface with silicon carbide epitaxial layer 12 can be avoided.

(Second Embodiment)
Next, a second embodiment of the present invention will be described. FIG. 6 is a timing chart showing the temperature of the reflow process and the procedure for replacing the gas during the reflow according to the second embodiment of the present invention. In the second embodiment, as the reflow process for the 4H—SiC semiconductor, the temperature is raised from room temperature (time t1), but the atmosphere is replaced with the forming gas from the inert gas at the time when the temperature exceeds 400 ° C. (time t2). ). This gas replacement may be performed in parallel with the temperature increase.

  Thereafter, the temperature is raised to a desired treatment temperature (for example, 800 ° C.) (time t3), held for a desired treatment time, for example, 10 minutes (period T1), and then lowered from time t4 to time t6. When the temperature is lowered, the forming gas is replaced with an inert gas or the atmosphere at a timing (time t5) when the room temperature falls below 400 ° C. This gas replacement may be performed in parallel with the temperature drop.

  Thus, according to the second embodiment, the amount of gas used as the forming gas can be reduced and the production cost can be reduced by shortening the time for which the forming gas is used.

(Third embodiment)
Next, a third embodiment of the present invention will be described. FIG. 7 is a timing chart showing the temperature of the reflow process and the procedure for replacing the gas during the reflow according to the third embodiment of the present invention. In the third embodiment, an example will be described in which a 4H-SiC semiconductor reflow process is applied to a reflow furnace (for example, a vertical annealing furnace, a diffusion furnace, etc.) with excellent productivity. As described in the first embodiment and the second embodiment, the time for raising the temperature from room temperature to the desired treatment temperature (800 ° C.) and the time for lowering the temperature from the desired treatment temperature to room temperature are both long. This leads to an increase in tact time and lowers productivity. The third embodiment of the present invention eliminates such an increase in tact time and increases productivity.

  As shown in FIG. 7, the temperature of the furnace is kept at 400 ° C., and the 4H—SiC semiconductor is put into the furnace at 400 ° C. (time t0). The gas atmosphere at this time may be an inert gas. Thereafter, the gas atmosphere is replaced from an inert gas to a forming gas (time t1). After the inside of the furnace is filled with the forming gas, the temperature is raised to a desired processing temperature (for example, 800 ° C.) (time t2 to t3), and a desired processing time, for example, 10 minutes (period T1) is maintained. The temperature is lowered to the following (time t4 to t5). Thereafter, replacement of the forming gas with an inert gas or the atmosphere is performed (time t6), and the 4H—SiC semiconductor is discharged from the furnace.

  Thus, according to 3rd Embodiment, it carries out in the state which raised the injection | throwing temperature and discharge | emission temperature of 4H-SiC semiconductor to about 400 degreeC. As a result, the period during which the 4H—SiC semiconductor is put into the reflow furnace can be shortened, and manufacturing using the reflow furnace with high productivity becomes possible.

  According to each embodiment described above, in the manufacturing process of the silicon carbide semiconductor device on the (000-1) plane, the gate insulating film is formed by thermal oxidation or the CVD method, and the gate insulating film and the silicon carbide are formed. After the interface state is terminated with hydrogen, the interlayer insulating film is reflowed in a gas containing hydrogen. As a result, hydrogen that terminates the interface state between the insulating film and silicon carbide can be prevented from desorbing during the reflow process, so that the interlayer insulating film can be planarized while maintaining a low interface state density. Since this can be realized, it is possible to manufacture a silicon carbide semiconductor device with low on-resistance.

  In particular, the reflow treatment was performed at 400 ° C. or higher in hydrogen or a mixed gas of an inert gas and hydrogen as a forming gas. As a result, when the 4H—SiC semiconductor is heated to 400 ° C. or higher, it is present in the forming gas atmosphere, so that a large amount of hydrogen can be contained in the vicinity of the interface, and it is considered that hydrogen is detached from the interface of the gate insulating film 13. The increase in the interface state density can be prevented.

  As described above, the method for manufacturing a silicon carbide semiconductor device and the silicon carbide semiconductor device according to the present invention include a power semiconductor device such as a power device, a power used for motor control and engine control for industrial or automobile use. Useful for semiconductor devices.

1 MOS capacitor 11 Silicon carbide substrate (4H-SiC substrate)
12 Silicon carbide epitaxial layer 13 Gate insulating film 14 Gate electrode 15 Back electrode 17 Interlayer insulating film 31 CV meter

Claims (6)

A step of forming a first insulating film so as to be in contact with a (000-1) plane or a (11-20) plane of a silicon carbide semiconductor; and a step of forming a gate electrode on the first insulating film; Removing a part of the gate electrode to form an opening; forming a second insulating film on at least a part of the opening; and planarizing the second insulating film by a reflow process. In a method for manufacturing a silicon carbide semiconductor device having:
In the reflow process, the temperature of the reflow furnace is maintained at a predetermined temperature at which the interface order density does not increase, and the silicon carbide semiconductor on which the second insulating film is formed is placed in the reflow furnace, and the atmosphere of an atmosphere or an inert gas After replacing with an atmosphere using hydrogen or a mixed gas of inert gas and hydrogen, the temperature is raised to the desired treatment temperature ,
The method for manufacturing a silicon carbide semiconductor device, wherein the predetermined temperature is about 400 ° C.   In the reflow process, after the temperature is raised to the desired processing temperature, the desired processing temperature is maintained for a desired processing time, and then the temperature is lowered to the predetermined temperature or lower, and the mixed gas is replaced with the atmosphere of air or an inert gas. The silicon carbide semiconductor device manufacturing method according to claim 1, wherein the silicon carbide semiconductor is discharged from the reflow furnace. The step of thermally oxidizing in a gas containing at least oxygen and water vapor and forming the first insulating film so as to be in contact with the (000-1) plane of the silicon carbide semiconductor is at least a step of forming a gate insulating film the method for manufacturing the silicon carbide semiconductor device according to claim 1 or 2, characterized in that part. Wherein the inert gas in the mixed gas is helium, argon, method for manufacturing the silicon carbide semiconductor device according to any one of claims 1-3, characterized by using one of the nitrogen. The method for manufacturing the silicon carbide semiconductor device according to any one of claims 1-4, wherein the treatment desired temperature is in the range of 600 ° C. or higher 1100 ° C. or less. The method for manufacturing the silicon carbide semiconductor device according to any one of claims 1 to 5, wherein the hydrogen concentration in the mixed gas is in the range of 1% or more and 4% or less.

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