JP5577530B2 - 六フッ化硫黄(sf6)および炭化水素ガスを用いた反射防止層のパターニング方法 - Google Patents
六フッ化硫黄(sf6)および炭化水素ガスを用いた反射防止層のパターニング方法 Download PDFInfo
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Description
また、本発明は、基板上の反射防止(ARC)層をエッチングして構造を形成する方法に関する。詳細には、SF6および炭化水素ガスを含有する処理ガスで形成されるプラズマを用い、シリコンを含有するARC層をエッチングして幾何形状パターンを形成する方法に関する。
なお、以下の説明の便宜上、「孤立した−密集したCD偏差」を「疎密CD偏差」と記し、「ネスト化された」を「密集した」と記す。また、「密集した」および「孤立した」は相対的なものであって、密集した構造は、孤立した構造のパターン密度よりも高いパターン密度を有していればよい。
第1の電力レベルは、約200W以下であって良く、また約100W以下であって良い。
第2の電力レベルは、約100Wから約500Wまでの範囲にあって良く、約100Wから約300Wまでの範囲にあって良い。
SF6処理ガス流量は、約100sccmから約300sccmまでの範囲にあって良く、また約150sccmから約250sccmまでの範囲にあって良い。
C2H4などの炭化水素処理ガス流量は、約10sccmから約50sccmまでの範囲にあって良く、約20sccmから約40sccmまでの範囲にあって良い。
SF6処理ガス流量に対するC2H4などの炭化水素処理ガス流量の比は、約0.05から約0.3までの範囲にあって良く、また約0.1から約0.2までの範囲にあって良い。
第1のプロセスレシピにおいて、第1の電力レベルは、約200W以下であって良く、また約100W以下であって良い。
第1のプロセスレシピにおいて、第2の電力レベルは、約100Wから約500Wまでの範囲にあって良く、約100Wから約300Wまでの範囲にあって良い。
第1のプロセスレシピにおいて、SF6処理ガス流量は、約100sccmから約300sccmまでの範囲にあって良く、また約150sccmから約250sccmまでの範囲にあって良い。
C2H4などの炭化水素処理ガス流量は、約10sccmから約50sccmまでの範囲にあって良く、約20sccmから約40sccmまでの範囲にあって良い。
SF6処理ガス流量に対するC2H4などの炭化水素処理ガス流量の比は、約0.05から約0.3までの範囲にあって良く、また約0.1から約0.2までの範囲にあって良い。
第2のプロセスレシピにおいて、第1の電力レベルは、約200W以下であって良く、また約100W以下であって良い。
第2のプロセスレシピにおいて、第2の電力レベルは、約100Wから約1000Wまでの範囲にあって良く、約400Wから約600Wまでの範囲にあって良い。
第2のプロセスレシピにおいて、CO2処理ガス流量は、約50sccmから約150sccmまでの範囲にあって良い。また、第2のプロセスレシピにおいて、O2処理ガス流量は、約10sccmから約100sccmまでの範囲にあって良い。第2のプロセスレシピにおいて、He処理ガス流量は、約100sccmから約300sccmまでの範囲にあって良い。第2のプロセスレシピにおいて、HBr処理ガス流量は、約10sccmから約100sccmまでの範囲にあって良い。
Claims (19)
- 基板の反射防止(ARC)層を乾式現像する方法であって、
フォトリソグラフィプロセスを用いて形成される、密集した構造と孤立した構造を有する幾何形状パターンを含むリソグラフィ層であって、シリコン含有反射防止層を覆う当該リソグラフィ層を含む多層マスクを備える基板をプラズマ処理システムに配置し、
前記シリコン含有反射防止層に前記幾何形状パターンを転写するためのプロセスレシピを決定し、
前記密集した構造についての初期限界寸法と最終限界寸法との間の限界寸法偏差の目標値、前記孤立した構造についての初期限界寸法と最終限界寸法との間の限界寸法偏差の目標値、および前記密集した構造についての前記最終限界寸法と前記孤立した構造についての前記最終限界寸法との間の限界寸法偏差の目標値を含む一又は二以上の性能評価基準を前記プロセスレシピに対して決定し、
前記プロセスレシピに従って、六フッ化硫黄(SF6)およびC x H y タイプの炭化水素ガスからなる処理ガスを前記プラズマ処理システムへ導入し、
前記一又は二以上の性能評価基準の少なくとも一つを実現するため、前記プロセスレシピにおける前記SF6の流量に対する前記炭化水素ガスの流量を調整し、
前記プロセスレシピに従って、前記プラズマ処理システムにおいて前記処理ガスからプラズマを生成し、
前記リソグラフィ層における前記幾何形状パターンを下地の前記シリコン含有反射防止層へ転写するため、前記基板を前記プラズマに晒す、
各工程を含む方法。 - 前記一又は二以上の性能評価基準には、前記密集した構造についての最大粗さと、前記孤立した構造についての最大粗さとが更に含まれる、請求項1に記載の方法。
- 前記一又は二以上の性能評価基準には、前記密集した構造についての限界寸法均一性と、前記孤立した構造についての限界寸法均一性とが更に含まれる、請求項1または2に記載の方法。
- 前記密集した構造についての前記最終限界寸法と前記孤立した構造についての前記最終限界寸法との間の限界寸法偏差の目標値と実際の値とが3nm未満である、請求項1から3のいずれか一項に記載の方法。
- 前記炭化水素ガスが、C2H4,CH4,C2H2,C2H6,C3H4,C3H6,C3H8,C4H6,C4H8,C4H10,C5H8,C5H10,C6H6,C6H10,およびC6H12からなるグループから選択される、請求項1から4のいずれか一項に記載の方法。
- 前記処理ガスがSF6およびC2H4からなる、請求項1から5のいずれか一項に記載の方法。
- SF6の流量が150sccmから250sccmまでの範囲にあり、前記炭化水素ガスの流量が20sccmから40sccmまでの範囲にある、請求項1から6のいずれか一項に記載の方法。
- 前記炭化水素ガスの流量と前記SF6の流量との間の比が0.1から0.2までの範囲にある、請求項1から7のいずれか一項に記載の方法。
- 前記プロセスレシピが、
前記プラズマ処理システムの圧力を設定し、
前記基板を支持する基板ホルダ内の下部電極へ印加される第1の高周波信号についての第1の電力レベルを設定し、
前記基板の上方において、前記下部電極に対向する上部電極へ印加される第2の高周波信号についての第2の電力レベルを設定する、
各工程を更に含む、請求項1から8のいずれか一項に記載の方法。 - 前記圧力を設定する工程において、当該圧力が50mTorr以下に設定され、
前記第1の電力レベルを設定する工程において、当該第1の電力レベルが100Wに設定され、
前記第2の電力レベルを設定する工程において、当該第2の電力レベルが100Wから300Wまでに設定される、請求項9に記載の方法。 - 前記シリコン含有反射防止層と前記基板との間に有機誘電体層(ODL)を形成し、
ドライエッチングプロセスを用いて前記シリコン含有反射防止層の前記幾何形状パターンを前記有機誘電体層へ転写し、
前記有機誘電体層と前記基板の間に誘電体層を形成し、
ドライエッチングプロセスを用いて前記有機誘電体層の前記幾何形状パターンを前記誘電体層へ転写する、
各工程を更に含む、請求項1から10のいずれか一項に記載の方法。 - 前記誘電体層が窒化シリコンを含む、請求項11に記載の方法。
- 前記幾何形状パターンには、シャロー・トレンチ分離構造のためのトレンチパターンが含まれる、請求項11に記載の方法。
- 基板のシリコン含有反射防止(ARC)層をパターンエッチングする方法であって、
SF6およびC x H y タイプの炭化水素ガスからなる処理ガスから生成されるプラズマを用いてシリコン含有反射防止層をエッチングして幾何形状パターンを形成し、
前記幾何形状パターンにおける密集した構造についての最終限界寸法と、前記幾何形状パターンにおける孤立した構造についての最終限界寸法との限界寸法偏差を低減するため、前記SF6の流量に対する前記炭化水素ガスの流量を調整する、
各工程を含む方法。 - 前記幾何形状パターンを前記シリコン含有反射防止層へ転写するゼロ・トリムエッチングプロセスを決定する、請求項14に記載の方法。
- 前記処理ガスがSF6およびC2H4からなる、請求項14または15に記載の方法。
- 基板の反射防止(ARC)層をパターンエッチングする方法であって、
シリコン含有反射防止層を含む基板をプラズマ処理システムに配置し、
SF6、およびCxHyタイプの炭化水素ガスからなる処理ガスを前記プラズマ処理システムに導入し、
前記処理ガスからプラズマを生成し、
前記プラズマに前記基板を晒す、
各工程を含む方法。 - 前記処理ガスがSF 6 とC 2 H 4 からなる、請求項17に記載の方法。
- 前記炭化水素ガスが、C 2 H 4 ,CH 4 ,C 2 H 2 ,C 2 H 6 ,C 3 H 4 ,C 3 H 6 ,C 3 H 8 ,C 4 H 6 ,C 4 H 8 ,C 4 H 10 ,C 5 H 8 ,C 5 H 10 ,C 6 H 6 ,C 6 H 10 ,およびC 6 H 12 からなるグループから選択される、請求項14に記載の方法。
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US9153457B2 (en) | 2013-06-14 | 2015-10-06 | Tokyo Electron Limited | Etch process for reducing directed self assembly pattern defectivity using direct current positioning |
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US9607843B2 (en) | 2015-02-13 | 2017-03-28 | Tokyo Electron Limited | Method for roughness improvement and selectivity enhancement during arc layer etch via adjustment of carbon-fluorine content |
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JP6587580B2 (ja) * | 2016-06-10 | 2019-10-09 | 東京エレクトロン株式会社 | エッチング処理方法 |
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