JP5419806B2 - Cross-connect device - Google Patents

Description

  The present invention relates to a packet transmission technique, and more particularly to a cross-connect device.

  Internet traffic has been increasing in recent years with the expansion of the use of ICT (Information and Communication Technology) services. OTN (Optical Transport Network) (Non-Patent Document 1) is a basic platform for backbone networks that can efficiently transfer increasing Internet traffic over a wide area. ITU-T (International Telecommunication Union Telecommunication Standardization Sector) ). OTN has a robust monitoring function and can transfer client signals over a wide area with high reliability.

  Although OTN has been conventionally regulated to accommodate SDH / SONET (Synchronous Digital Hierarchy / Synchronous Optical NETwork) widely used in backbone networks and Ethernet (registered trademark) widely used in LAN, WAN, etc. In order to accommodate a variety of client signals more flexibly, a new rule called ODUflex (Optical Channel Data Unit) has recently been established. Conventionally, ODU0, ODU1, ODU2, ODU2e, ODU3, and ODU4 were accommodated in frames with a fixed bit rate, but ODUflex can provide a payload capacity of 1.25 Gbit / s unit to the client signal, It is a provision that increases the flexibility of client signals that will appear in the near future. In the future, as the transmission capacity increases, the ODU frame signal accommodated per wavelength will be diversified. For example, the 100G wavelength OTU4 (Optical Channel Transport Unit) has an ODU frame with a fixed payload capacity described above and 1.25 The ODUflex frame of Gbit / s unit is mixed and accommodated, and a technology for efficiently transferring such various ODU frames is required.

  Under such circumstances, development of a cross-connect device (ODU cross-connect device) is now active in order to construct a network efficiently and economically. The ODU cross-connect device can switch the ODU path to any route, and by switching the ODU path to the optimal route, the number of wavelengths used can be reduced, enabling efficient network operation and management. Become.

  Currently, studies are underway to install switch fabrics that have been matured with technologies such as core routers in such ODU cross-connect devices. By applying the fabric of the packet switch used in the core router or the like to the ODU cross-connect device as it is, it becomes possible to shorten the development period and reduce the cost of the device.

Special table 2005-520375

ITU-T Recommendation G.709 "Interfaces for the Optical Transport Network (OTN)"

  FIG. 1 shows a basic configuration of a cross-connect device using a packet switch according to the prior art. The illustrated cross-connect device includes a receiving unit that is a network side interface, a packetizing unit that packetizes a constant bit rate CBR (Constant Bit Rate) signal, a packet switching unit that switches a packet signal, and a packet signal It consists of a depacketizer that restores the CBR signal and a transmitter that is a network side interface. Normally, when converting from a CBR signal to a packet signal, packetization processing is performed using an independent clock, so the frequency information of the CBR signal is lost during packetization processing, and when the CBR signal is reproduced from the packet signal It becomes difficult to recover the clock (the shaded area in FIG. 1 indicates the clock domain).

  In Patent Document 1, an architecture of a TDM cross-connect device using a packet switch fabric is shown. This is a system that combines a conventional TDM switch and a packet switch, and incorporates at least two packet-switched line cards into the existing TDM switch to filter, shape, monitor, forward and schedule with the TDM cross-connect of the existing infrastructure. A way to do it is provided. However, Patent Document 1 does not describe a specific method for restoring the clock between the CBR signal and the packet signal.

  Accordingly, an object of the present invention is to provide a cross-connect device that can regenerate a CBR signal clock before and after packetization processing in a cross-connect device using a packet switch.

  In order to solve the above-described problem, one aspect of the present invention provides packetizing means for converting a CBR signal received from one or more input ports into a packet signal, and clock information processing means for extracting a clock of the received CBR signal. A packet switching means for routing the converted packet signal to one or more output ports, and a depacketizing means for restoring the routed packet signal to a CBR signal using the extracted clock. It relates to the connect device.

  According to the present invention, in a cross-connect device using a packet switch, it is possible to provide a cross-connect device that can regenerate a CBR signal clock before and after packetization processing.

FIG. 1 shows a configuration of a conventional cross-connect device. FIG. 2 shows the configuration of the cross-connect device according to the first embodiment of the present invention. FIG. 3 shows the configuration of the reception unit and transmission unit of the cross-connect device of FIG. FIG. 4 shows the configuration of the packetization unit and the depacketization unit of the cross-connect device of FIG. FIG. 5 shows the configuration of the packet switch unit of the cross-connect device of FIG. FIG. 6 shows the configuration of the cross switch section of the cross connect device of FIG. FIG. 7 shows a configuration of a cross-connect device according to the second embodiment of the present invention. FIG. 8 shows the configuration of the cross-connect device of FIG. 7 in detail. FIG. 9 shows various methods for storing frequency information. FIG. 10 shows the configuration of the cross-connect device according to the third embodiment of the present invention. FIG. 11 shows the configuration of the cross-connect device of FIG. 10 in detail.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  The cross-connect device according to the present invention is newly provided with means for extracting clock information of a constant bit rate CBR (Constant Bit Rate) signal before packetization processing, and based on the clock information, the clock of the CBR signal is processed during reverse packet processing. Reproduce. More specifically, the clock of the CBR signal can be reproduced by the cross-connect device according to the following three embodiments.

  First, a cross-connect device according to a first embodiment of the present invention will be described with reference to FIGS. In this embodiment, the cross-connect device regenerates the clock of the CBR signal using a clock switch.

As shown in FIG. 2, the cross-connect device 100 includes one or more reception units 110 (110 ₀ , 110 ₁ , 110 ₂ ,...) And one or more packetization units 120 (120 ₀ , 120 ₁ ,. 120 ₂ ,...), The packet switch unit 130, one or more depacketization units 140 (140 ₀ , 140 ₁ , 140 ₂ ,...), And one or more transmission units 150 (150 ₀ , 150). ₁ , 150 ₂ ,...) And a clock switch unit 160.

The receiving units 110 ₀ , 110 ₁ , 110 ₂ ,... Are provided corresponding to each port of the cross-connect device 100. In the illustrated embodiment, one packetizing unit 120 is connected to one receiving unit 110. However, the CBR signal multiplexed by the receiving unit 110 is separated, and one or more When one CBR signal is output, one or more packetizers 120 are connected to one receiver 110. Each receiving unit 110 receives an optical signal from a transmission path or another device package, photoelectrically converts the received optical signal, and outputs a CBR signal of one or more electrical signals to the packet unit 120. More specifically, as shown in FIG. 3, the receiving unit 110 receives an optical signal from a transmission path and converts the optical signal into an electric signal, and a CBR of the converted electric signal. A framer / separation function unit 114 that performs demapping processing on the signal and separates the signal into one or more CBR signals. The CBR signal generated by the framer / separation function unit 114 is output to the corresponding packetizing unit 120.

The packetizing units 120 ₀ , 120 ₁ , 120 ₂ ,... Are provided corresponding to the respective ports of the packet switch unit 130. Each packetizer 120 receives one or more CBR signals from the corresponding receiver 110, generates a packet signal based on the received CBR signal, and extracts a clock of the received CBR signal. More specifically, as shown in FIG. 4, the packetizing unit 120 converts one or more CBR signals received from the receiving unit 110 into packet signals, and outputs the generated packet signals to the packet switch unit 130. And a clock extraction unit 124 that extracts clocks of one or more CBR signals received from the reception unit 110 and outputs the generated clock signals to the clock switch unit 160. Although the packetizing unit extracts the clock of the CBR signal, the receiving unit may extract the clock of the CBR signal.

  The packet switch unit 130 has one or more input ports and one or more output ports (Port0, Port1, Port2,...). The packet switch unit 130 routes the packet signal received from each packetization unit 120 via the input port, and outputs it to any output port. Note that the packet switch unit 130 may output only to a specific output port instead of an arbitrary output port. More specifically, as shown in FIG. 5, the packet switch unit 130 monitors the packet signal received from the packetizing unit 120 and rewrites the inside of the header of the packet and the like as necessary. In accordance with the address information in the packet header, the relay processor 134 that routes the packet signal to the destination port and the packet signal received from the relay processor 134 are monitored, and the packet header is rewritten as necessary. And an input / output processing unit 134 for outputting to a designated destination port. Typically, these processes are executed by a CPU (Central Processing Unit) or the like.

The clock switch unit 160 receives the clock signal of the CBR signal from each packetization unit 120, selects an appropriate clock signal for each inverse packetization unit 140 from these received clock signals, and selects the selected clock signal. The packet is output to the inverse packetizer 140. More specifically, as shown in FIG. 6, the clock switch unit 160 includes one or more clock distribution units 162 (162 ₀ , 162 ₁ , 162 ₂ ,...) Provided corresponding to the ports of the cross-connect device 100. ..), A switching control unit 164, and one or more clock selection units 166 (166 ₀ , 166 ₁ , 166 ₂ ,...) Provided corresponding to the ports of the cross-connect device 100.

  Each clock distribution unit 162 distributes the clock signal of the CBR signal received from the corresponding packetizing unit 120 to each clock selection unit 166. Here, the clock selection unit 166 recognizes which port the received clock signal is output from the clock distribution unit 162 corresponding to.

  The switching control unit 164 controls the clock selection of each clock selection unit 166 according to the switching control signal received from each packetizing unit 120. Specifically, each packetization unit 120 includes information indicating to which depacketization processing unit 140 the packet signal output from the packetization unit 120 should be switched, that is, the transfer source of each packet signal. The information indicating the packetizing unit 120 and the transfer destination inverse packetizing unit 140 is output to the switching control unit 164 as a switching control signal. The switching control unit 164 controls each clock selection unit 166 based on the received switching control signal, and from the clock signal received from each clock distribution unit 162 to the clock selection unit 166, a packetizing unit that is a transfer source of each packet signal The clock signal corresponding to the information indicating 120 and the depacketization unit 140 of the transfer destination is selected and output to the depacketization unit 140.

  In the illustrated embodiment, the switching control unit 164 obtains the switching control signal from the packetization processing unit 122, but each packet is input from the input / output processing units 132 and 136 of the packet switch unit 130 or the relay processing unit 134. The address information in the header is acquired, the packetizer 120 of the transfer source of each packet signal and the inverse packetizer 140 of the transfer destination are confirmed, and based on this, the clock selection of each clock selector 166 is controlled. Also good.

The inverse packetizers 140 ₀ , 140 ₁ , 140 ₂ ,... Are provided corresponding to the respective ports of the packet switch unit 130. Each inverse packetization unit 140 receives the packet signal from the clock switch unit 130, further receives the clock signal from the clock switch unit 160, and restores the CBR signal from the received packet signal using the received clock signal. More specifically, as shown in FIG. 4, the depacketization unit 140 includes a depacketization processing unit 142, generates a CBR signal based on the received packet signal and the clock signal, and generates the generated CBR signal. Are output to the corresponding transmitting unit 150.

Transmitters 150 ₀ , 150 ₁ , 150 ₂ ,... Are provided corresponding to each port of the cross-connect device 100. In the illustrated embodiment, one inverse packetizer 140 is connected to one transmitter 150. However, when a plurality of CBR signals are multiplexed and transmitted to another device package, In this configuration, one or more inverse packetizers 140 are connected to one transmitter 150. Each transmission unit 150 converts the CBR signal of the electrical signal received from the corresponding inverse packetization unit 140 into an optical signal, and transmits the optical signal to a transmission path or another device package. More specifically, as illustrated in FIG. 3, the transmission unit 150 performs various processes such as multiplexing and frame processing on one or more CBR signals of electrical signals received from the corresponding inverse packetization unit 140. And a photoelectric conversion unit 154 that converts a CBR signal of the generated electrical signal into an optical signal. The generated optical signal is transmitted from the corresponding port.

  According to the present embodiment, in order to perform clock recovery of the CBR signal, the cross connect device 100 extracts the clock signal when the packetizing unit 120 packetizes each CBR signal, and the cross switch unit 160 extracts these clock signals. Thus, the clock signal can be restored when each CBR signal is depacketized by the depacketizer 140.

  Next, a cross-connect device according to a second embodiment of the present invention will be described with reference to FIGS. In the present embodiment, the cross-connect device regenerates the clock of the CBR signal by including in the packet frequency information indicating the clock before packet processing.

As shown in FIG. 7, the cross-connect device 200 includes one or more receiving units 210 (210 ₀ , 210 ₁ , 210 ₂ ,...) And one or more packetizing units 220 (220 ₀ , 220 ₁ ,. 220 ₂ ,...), The packet switch unit 230, one or more depacketization units 240 (240 ₀ , 240 ₁ , 240 ₂ ,...), And one or more transmission units 250 (250 ₀ , 250 ₁ , 250 ₂ ,...). Since the receiving unit 210, the packet switch unit 230, and the transmitting unit 250 have the same configuration and operation as the receiving unit 110, the packet switch unit 130, and the transmitting unit 150 of the first embodiment described above, The duplicate explanation is omitted.

The packetizing units 220 ₀ , 220 ₁ , 220 ₂ ,... Are provided corresponding to each port of the packet switch unit 230. Each packetizing unit 220 receives a CBR signal from the corresponding receiving unit 210. When generating a packet signal from the received CBR signal, the packetizing unit 220 generates frequency information from the clock of the CBR signal, adds the frequency information to the packet signal, and outputs the packet signal to the packet switch unit 230. More specifically, the packetization unit 220 includes a packetization processing unit 222 and a frequency deviation detection unit 224, as shown in FIG. The packetization processing unit 222 converts the CBR signal received from the reception unit 210 into a packet signal. The frequency deviation detector 224 detects the frequency deviation between the clock of the CBR signal received from the receiver 210 and the common clock in the cross-connect device 200, and outputs the detected frequency deviation to the packetization processor 222 as frequency information. . The packetization processing unit 222 adds the frequency information received from the frequency deviation detection unit 224 to the generated packet signal and outputs it to the packet switch unit 230.

  Here, as a method of adding frequency information to the packet signal, for example, there is a method as shown in FIG. As shown in FIG. 9A, the frequency information may be inserted into the header of each packet included in the packet signal. Further, as shown in FIG. 9B, the frequency information may be inserted into the header of a specific packet of the packet signal. In this case, for example, frequency information may be periodically inserted every several packets. Further, as shown in FIG. 9C, a packet storing only frequency information may be generated and a higher priority may be set than other packets. The present invention is not limited to the addition method described above, and any other appropriate addition method may be used.

  The packet switch unit 230 monitors the packet signal to which the frequency information is added, routes the packet signal to which the frequency information is added to the destination port according to the address information in the packet header, and outputs the packet signal to the corresponding inverse packetization unit 240. To do.

The inverse packetizers 240 ₀ , 240 ₁ , 240 ₂ ,... Are provided corresponding to the respective ports of the packet switch unit 230. Each inverse packetization unit 240 receives the packet signal to which the frequency information is added from the packet switch unit 230, regenerates the clock of the CBR signal from the frequency information, and generates the CBR signal from the received packet signal using the regenerated clock. To restore. More specifically, the depacketization unit 240 includes a clock recovery unit 242 and a depacketization processing unit 244, as shown in FIG. The clock recovery unit 242 extracts frequency information from the packet signal received from the packet switch unit 230. Thereafter, the clock recovery unit 242 recovers the clock of the CBR signal based on the frequency deviation of the extracted frequency information and the common clock in the cross-connect device 200, and outputs it to the inverse packetization processing unit 244. The inverse packetization processing unit 244 uses the clock of the CBR signal received from the clock recovery unit 242 to generate a CBR signal whose clock is restored from the packet signal provided from the packet switch unit 230.

  According to the present embodiment, in order to perform clock recovery of the CBR signal, the cross-connect device 200 adds frequency information to the packet signal generated from each CBR signal in the packetization unit 220, and each CBR in the inverse packetization unit 240. When the signal is depacketized, it is possible to generate a CBR signal in which the clock signal is restored using this frequency information.

  Next, a cross-connect device according to a third embodiment of the present invention will be described with reference to FIGS. In this embodiment, the cross-connect device regenerates the clock of the CBR signal by counting the number of data.

As shown in FIG. 10, the cross-connect device 300 includes one or more receiving units 310 (310 ₀ , 310 ₁ , 310 ₂ ,...) And one or more packetizing units 320 (320 ₀ , 320 ₁ ,. 320 ₂ ,...), Packet switch unit 330, one or more inverse packetization units 340 (340 ₀ , 340 ₁ , 340 ₂ ,...), And one or more transmission units 350 (350 ₀ , 350 ₁ , 350 ₂ ,...), One or more data count units 360 (360 ₀ , 360 ₁ , 360 ₂ ,...), And one or more clock recovery units 370 (370 ₀ , 370 ₁ , 370 _2). ,... The reception unit 310, the packetization unit 320, the packet switch unit 330, and the transmission unit 350 are configured in the same manner as the reception unit 110, the packet switch unit 130, and the transmission unit 150 of the first embodiment described above. And redundant description is omitted.

  The packetization unit 320 includes a packetization processing unit 122 that converts the received CBR signal into a packet signal and outputs the packet signal to the packet switch unit 330 in the same manner as the packetization unit 120 of the first embodiment. It is not necessary to have.

  When receiving the packet signal from the packet switch unit 330, the inverse packetization unit 340 provides the received packet signal to the inverse packetization processing unit 342 (FIG. 11) in the inverse packetization unit 340 and a corresponding data count unit. To 360.

Data count units 360 ₀ , 360 ₁ , 360 ₂ ,... Are provided corresponding to each port of the packet switch unit 330. Each data count unit 360 observes the amount of data in the packet signal received from the depacketization unit 340 at a fixed time with a common clock in the cross-connect device 300, and counts the number of data and the number of data corresponding to the frequency deviation. Compare with. More specifically, as shown in FIG. 11, the data count unit 360 includes a first counter 362 that counts the common clock in the cross-connect device 300 and the number of data in the packet signal received from the depacketization unit 340. And a comparator 366 that compares the output results from the second counter 364.

  When the first counter 362 exceeds a predetermined count number, the first counter 362 outputs a signal designating the start of measurement to the second counter 364. When the measurement start signal is received from the first counter 362, the second counter 364 outputs the number of data in the packet signal counted up to the reception time point to the comparator 366, and resets the counter in the second counter 364. Start counting again.

  For example, when the common clock in the cross-connect device 300 is 100 MHz and the count number of the first counter 362 is 10,000, the counter value of the second counter 364 is updated at a cycle of 100 μs. The second counter 364 receives the measurement start signal from the first counter 362, counts the number of data in the packet signal until the next measurement start signal is received, and outputs it to the comparator 366. The comparator 366 holds a value when the frequency deviation between the clock of the CBR signal and the common clock in the cross-connect device 300 is 0 in advance. For example, when the clock of the CBR signal is 70 MHz, the value held by the comparator 366 is 7000, and the frequency deviation changes by 1/10000 = 100 ppm each time the counter value of the second counter 364 changes from 7000. I understand. The comparator 366 compares the counter value of the second counter 364 with the value of the comparator 366 and outputs a control signal corresponding to the frequency deviation to the corresponding clock recovery unit 370.

Clock recovery units 370 ₀ , 370 ₁ , 370 ₂ ,... Are provided corresponding to each port of the packet switch unit 330. Each clock recovery unit 370 regenerates the clock of the CBR signal according to the control signal received from the corresponding data count unit 360 and transmits it to the corresponding inverse packetization unit 340. When receiving the clock from the clock recovery unit 370, the depacketization processing unit 342 restores the CBR signal using the received clock and transmits it to the corresponding transmission unit 350.

  According to the present embodiment, in order to perform clock recovery of the CBR signal, the cross-connect device 300 can generate a CBR signal using the clock recovered by the data count unit 360 and the clock recovery unit 370. .

  As mentioned above, although the Example of this invention was explained in full detail, this invention is not limited to the specific embodiment mentioned above, In the range of the summary of this invention described in the claim, various deformation | transformation・ Change is possible.

100, 200, 300 Cross-connect devices 110, 210, 310 Receivers 120, 220, 320 Packetizers 130, 230, 330 Packet switchers 140, 240, 340 Reverse packetizers 150, 250, 350 Transmitter 160 Clock switch 360 Data count unit 370 Clock recovery unit

Claims (9)

Packetizing means for converting CBR signals received from one or more input ports into packet signals;
Clock information processing means for extracting the clock of the received CBR signal;
Packet switch means for routing the converted packet signal to one or more output ports;
Depacketizing means for restoring the routed packet signal into a CBR signal using the extracted clock;
A cross-connect device. The packetizing means has one or more packetizing units corresponding to the one or more input ports,
The cross-connect device according to claim 1, wherein the depacketization unit includes one or more depacketization units corresponding to the one or more output ports.   The cross-connect device according to claim 2, wherein the clock information processing unit includes a clock switch unit that outputs the extracted clock to a depacketization unit that is a routing destination of the received CBR signal. The clock switch unit includes one or more clock distribution units provided corresponding to the one or more packetization units, one or more clock selection units provided corresponding to the one or more inverse packetization units, A switching control unit connected to one or more packetization processing units,
The clock distribution unit distributes the clock of the CBR signal received by the corresponding packetization unit to the one or more clock selection units;
The switching control unit receives a switching control signal indicating a routing source and a routing destination of each packet signal from the one or more packetization processing units, and controls the one or more clock selection units according to the switching control signal;
4. The cross-connect device according to claim 3, wherein the clock selection unit outputs the clock distributed from the one or more clock selection units to the corresponding inverse packetization unit in accordance with control by the switching control unit. The clock information processing unit includes a frequency information adding unit that generates frequency information from the extracted clock and adds the frequency information to the packet signal converted by the packetizing unit,
The cross-connect device according to claim 1, wherein the depacketization means restores the routed packet signal to a CBR signal using the added frequency information. The frequency information adding unit includes a frequency deviation detecting unit that detects a frequency deviation between the extracted clock and a common clock of the cross-connect device, and generates the frequency information from the detected frequency deviation.
6. The cross-connect device according to claim 5, wherein the inverse packetizing means includes a clock recovery unit that recovers the clock by referring to the common clock from a frequency deviation of frequency information added to the packet signal.   The frequency information adding unit stores the frequency information in a header of each packet of the packet signal, a header of a packet for each predetermined number of packet signals, or a predetermined packet of the packet signal. 6. The cross-connect device according to 6. The clock information processing means counts the number of data stored in the packet signal in a predetermined period and generates a control signal according to a frequency deviation, and a control signal received from the data count section. And a clock recovery unit that recovers the clock using a common clock of the cross-connect device,
The cross-connect device according to claim 1, wherein the depacketizing means restores the routed packet signal to a CBR signal using the regenerated clock. The data count unit
A first counter for counting the common clock;
A second counter that counts the number of data stored in the packet signal in response to a measurement start instruction from the first counter;
A comparator that compares the number of data counted by the second counter with a predetermined reference value and generates the control signal in accordance with the detected frequency deviation;
The cross-connect device according to claim 8, comprising:

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